Use nuclei-sdk functions for init code
Instead of using the HAL functions we can just use the defines from the board support for the longan nano that comes with the nuclei-sdk. Also we move some includes and defines to the header file.
This commit is contained in:
Stefan Kerkmann
parent
6e287a7c5e
commit
733a362436
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@ -37,38 +37,21 @@ void USBFS_IRQHandler(void) { tud_int_handler(0); }
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// MACRO TYPEDEF CONSTANT ENUM
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//--------------------------------------------------------------------+
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#define HXTAL_VALUE \
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((uint32_t)8000000) /*!< value of the external oscillator in Hz */
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#define USB_NO_VBUS_PIN
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//--------------------------------------------------------------------+
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// LED
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//--------------------------------------------------------------------+
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#define LED_PORT GPIOC
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#define LED_PIN GPIO_PIN_13
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#define LED_STATE_ON 1
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#define BUTTON_PORT GPIOA
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#define BUTTON_PIN GPIO_PIN_0
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#define BUTTON_PORT GPIOA
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#define BUTTON_PIN GPIO_PIN_0
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#define BUTTON_STATE_ACTIVE 1
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//--------------------------------------------------------------------+
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// UART
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//--------------------------------------------------------------------+
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#define UART_DEV SOC_DEBUG_UART
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#define UART_DEV USART0
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#define UART_GPIO_PORT GPIOA
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#define UART_TX_PIN GPIO_PIN_9
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#define UART_RX_PIN GPIO_PIN_10
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#define LED_PIN LED_R
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void board_init(void) {
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/* Disable interrupts during init */
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__disable_irq();
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/* Reset eclic configuration registers */
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ECLIC->CFG = 0;
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ECLIC->MTH = 0;
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ECLIC_Init();
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/* Reset eclic interrupt registers */
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for (int32_t i = 0; i < SOC_INT_MAX; i++) {
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@ -103,37 +86,11 @@ void board_init(void) {
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#endif
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#ifdef LED_PIN
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gpio_init(LED_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, LED_PIN);
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board_led_write(0);
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gd_led_init(LED_PIN);
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#endif
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#if defined(UART_DEV)
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/* enable GPIO TX and RX clock */
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rcu_periph_clock_enable(GD32_COM_TX_GPIO_CLK);
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rcu_periph_clock_enable(GD32_COM_RX_GPIO_CLK);
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/* enable USART clock */
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rcu_periph_clock_enable(GD32_COM_CLK);
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/* connect port to USARTx_Tx */
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gpio_init(GD32_COM_TX_GPIO_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ,
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GD32_COM_TX_PIN);
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/* connect port to USARTx_Rx */
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gpio_init(GD32_COM_RX_GPIO_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ,
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GD32_COM_RX_PIN);
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/* USART configure */
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usart_deinit(UART_DEV);
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usart_baudrate_set(UART_DEV, 115200U);
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usart_word_length_set(UART_DEV, USART_WL_8BIT);
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usart_stop_bit_set(UART_DEV, USART_STB_1BIT);
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usart_parity_config(UART_DEV, USART_PM_NONE);
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usart_hardware_flow_rts_config(UART_DEV, USART_RTS_DISABLE);
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usart_hardware_flow_cts_config(UART_DEV, USART_CTS_DISABLE);
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usart_receive_config(UART_DEV, USART_RECEIVE_ENABLE);
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usart_transmit_config(UART_DEV, USART_TRANSMIT_ENABLE);
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usart_enable(UART_DEV);
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gd_com_init(UART_DEV);
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#endif
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/* USB D+ and D- pins don't need to be configured. */
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@ -153,7 +110,7 @@ void board_init(void) {
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rcu_periph_reset_disable(RCU_USBFSRST);
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/* Set IRQ priority and trigger */
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ECLIC_SetLevelIRQ(USBFS_IRQn, 15);
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ECLIC_SetLevelIRQ(USBFS_IRQn, 3);
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ECLIC_SetTrigIRQ(USBFS_IRQn, ECLIC_POSTIVE_EDGE_TRIGGER);
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/* Retrieve otg core registers */
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@ -172,14 +129,6 @@ void board_init(void) {
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__enable_irq();
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}
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#include "gd32vf103_dbg.h"
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#define DBG_KEY_UNLOCK 0x4B5A6978
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#define DBG_CMD_RESET 0x1
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#define DBG_KEY REG32(DBG + 0x0C)
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#define DBG_CMD REG32(DBG + 0x08)
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void gd32vf103_reset(void) {
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/* The MTIMER unit of the GD32VF103 doesn't have the MSFRST
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* register to generate a software reset request.
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@ -196,7 +145,11 @@ void gd32vf103_reset(void) {
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//--------------------------------------------------------------------+
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void board_led_write(bool state) {
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gpio_bit_write(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
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if (state) {
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gd_led_on(LED_PIN);
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} else {
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gd_led_off(LED_PIN);
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}
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}
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uint32_t board_button_read(void) {
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@ -1,29 +1,19 @@
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// See LICENSE for license details.
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#ifndef _NUCLEI_SDK_HAL_H
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#define _NUCLEI_SDK_HAL_H
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#include "nmsis_gcc.h"
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#include "gd32vf103.h"
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#include "gd32vf103_libopt.h"
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#include "gd32vf103c_longan_nano.h"
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#include "drv_usb_hw.h"
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#include "drv_usb_dev.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// 4 bits for interrupt level, 0 for priority.
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// level 0 = lowest priority, level 15 = highest priority.
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#define __ECLIC_INTCTLBITS 4
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/* sipeed longan nano board UART com port */
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#define SOC_DEBUG_UART USART0
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#define GD32_COM0 USART0
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#define GD32_COM_CLK RCU_USART0
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#define GD32_COM_TX_PIN GPIO_PIN_9
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#define GD32_COM_RX_PIN GPIO_PIN_10
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#define GD32_COM_TX_GPIO_PORT GPIOA
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#define GD32_COM_RX_GPIO_PORT GPIOA
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#define GD32_COM_TX_GPIO_CLK RCU_GPIOA
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#define GD32_COM_RX_GPIO_CLK RCU_GPIOA
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#define SOC_DEBUG_UART GD32_COM0
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#define DBG_KEY_UNLOCK 0x4B5A6978
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#define DBG_CMD_RESET 0x1
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#define DBG_KEY REG32(DBG + 0x0C)
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#define DBG_CMD REG32(DBG + 0x08)
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#ifdef __cplusplus
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}
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#endif
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#endif
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