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separate data & status from dcd_pipe_control_xfer

This commit is contained in:
hathach 2013-11-15 14:15:05 +07:00
parent 05c439e45a
commit 699edf9485
4 changed files with 22 additions and 23 deletions
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1
tinyusb/class/hid_device.c
View File

@ -160,7 +160,6 @@ tusb_error_t hidd_control_request(uint8_t coreid, tusb_control_request_t const *
{
case HID_REQUEST_CONTROL_SET_IDLE:
// idle_rate = u16_high_u8(p_request->wValue);
dcd_pipe_control_xfer(coreid, TUSB_DIR_HOST_TO_DEV, NULL, 0);
break;
case HID_REQUEST_CONTROL_SET_REPORT:

2
tinyusb/device/dcd.h
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@ -81,7 +81,7 @@ void dcd_controller_set_address(uint8_t coreid, uint8_t dev_addr);
void dcd_controller_set_configuration(uint8_t coreid);
//------------- PIPE API -------------//
tusb_error_t dcd_pipe_control_xfer(uint8_t coreid, tusb_direction_t dir, void * buffer, uint16_t length);
tusb_error_t dcd_pipe_control_xfer(uint8_t coreid, tusb_direction_t dir, void * p_buffer, uint16_t length);
void dcd_pipe_control_stall(uint8_t coreid);
//tusb_error_t dcd_pipe_control_write(uint8_t coreid, void const * buffer, uint16_t length);

36
tinyusb/device/dcd_lpc_11uxx_13uxx.c
View File

@ -283,28 +283,28 @@ void dcd_pipe_control_stall(uint8_t coreid)
dcd_data.qhd[0][0].stall = dcd_data.qhd[1][0].stall = 1;
}
// control transfer does not need to use qtd find function
tusb_error_t dcd_pipe_control_xfer(uint8_t coreid, tusb_direction_t dir, void * buffer, uint16_t length)
// used for data phase only
//tusb_error_t dcd_pipe_control_queue_xfer(uint8_t coreid, tusb_direction_t dir, void * p_buffer, uint16_t length)
//{
// (void) coreid;
//
// uint8_t const ep_id = dir; // IN : 1, OUT = 0
//
// dcd_data.qhd[ep_id][0].buff_addr_offset = (length ? addr_offset(p_buffer) : 0 );
// dcd_data.qhd[ep_id][0].total_bytes = length;
//
//}
// can be data phase (long data) or status phase
tusb_error_t dcd_pipe_control_xfer(uint8_t coreid, tusb_direction_t dir, void * p_buffer, uint16_t length)
{
(void) coreid;
// determine Endpoint where Data & Status phase occurred (IN or OUT)
uint8_t const endpoint_data = (dir == TUSB_DIR_DEV_TO_HOST) ? 1 : 0;
uint8_t const endpoint_status = 1 - endpoint_data;
//------------- Data Phase -------------//
if (length)
{
dcd_data.qhd[endpoint_data][0].buff_addr_offset = addr_offset(buffer);
dcd_data.qhd[endpoint_data][0].total_bytes = length;
dcd_data.qhd[endpoint_data][0].active = 1 ;
}
//------------- Status Phase -------------//
dcd_data.qhd[endpoint_status][0].buff_addr_offset = 0;
dcd_data.qhd[endpoint_status][0].total_bytes = 0;
dcd_data.qhd[endpoint_status][0].active = 1 ;
uint8_t const ep_id = dir; // IN : 1, OUT = 0
dcd_data.qhd[ep_id][0].buff_addr_offset = (length ? addr_offset(p_buffer) : 0 );
dcd_data.qhd[ep_id][0].total_bytes = length;
dcd_data.qhd[ep_id][0].active = 1 ;
return TUSB_ERROR_NONE;
}

6
tinyusb/device/usbd.c
View File

@ -157,12 +157,10 @@ tusb_error_t usbd_body_subtask(void)
{
dcd_controller_set_address(event.coreid, (uint8_t) p_request->wValue);
p_device->state = TUSB_DEVICE_STATE_ADDRESSED;
dcd_pipe_control_xfer(event.coreid, TUSB_DIR_HOST_TO_DEV, NULL, 0); // zero length
}
else if ( TUSB_REQUEST_SET_CONFIGURATION == p_request->bRequest )
{
usbd_set_configure_received(event.coreid, (uint8_t) p_request->wValue);
dcd_pipe_control_xfer(event.coreid, TUSB_DIR_HOST_TO_DEV, NULL, 0); // zero length
}else
{
error = TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
@ -189,7 +187,6 @@ tusb_error_t usbd_body_subtask(void)
if ( TUSB_REQUEST_CLEAR_FEATURE == p_request->bRequest )
{
dcd_pipe_clear_stall(event.coreid, u16_low_u8(p_request->wIndex) );
dcd_pipe_control_xfer(event.coreid, TUSB_DIR_HOST_TO_DEV, NULL, 0); // zero length
} else
{
error = TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
@ -203,6 +200,9 @@ tusb_error_t usbd_body_subtask(void)
{ // Response with Protocol Stall if request is not supported
dcd_pipe_control_stall(event.coreid);
// ASSERT(error == TUSB_ERROR_NONE, VOID_RETURN);
}else
{ // status phase
dcd_pipe_control_xfer(event.coreid, 1-p_request->bmRequestType_bit.direction, NULL, 0); // zero length
}
}