merge tusb_dcd_control_stall() to tusb_dcd_edpt_stall()

This commit is contained in:
hathach 2018-03-21 16:08:42 +07:00
parent 9a487a238a
commit 3ed83c4d98
4 changed files with 45 additions and 24 deletions

View File

@ -85,7 +85,7 @@ typedef struct
}_dcd;
/*------------------------------------------------------------------*/
/* Controller API
/* Controller Start up Sequence
*------------------------------------------------------------------*/
static bool hfclk_running(void)
{
@ -351,12 +351,6 @@ bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint
return true;
}
void tusb_dcd_control_stall (uint8_t port)
{
(void) port;
NRF_USBD->TASKS_EP0STALL = 1;
__ISB(); __DSB();
}
/*------------------------------------------------------------------*/
/*
@ -449,12 +443,26 @@ bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer,
void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr)
{
(void) port;
if ( ep_addr == 0)
{
NRF_USBD->TASKS_EP0STALL = 1;
}else
{
NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_Stall << USBD_EPSTALL_STALL_Pos) | ep_addr;
}
__ISB(); __DSB();
}
void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t ep_addr)
{
(void) port;
if ( ep_addr )
{
NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep_addr;
}
}
bool tusb_dcd_edpt_busy (uint8_t port, uint8_t ep_addr)

View File

@ -230,10 +230,6 @@ static inline uint8_t qtd_find_free(uint8_t port)
//--------------------------------------------------------------------+
// CONTROL PIPE API
//--------------------------------------------------------------------+
void tusb_dcd_control_stall(uint8_t port)
{
LPC_USB[port]->ENDPTCTRL0 |= (ENDPTCTRL_MASK_STALL << 16); // stall Control IN TODO stall control OUT as well
}
// control transfer does not need to use qtd find function
// follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
@ -277,7 +273,14 @@ void tusb_dcd_edpt_stall(uint8_t port, uint8_t ep_addr)
uint8_t ep_idx = edpt_addr2phy(ep_addr);
volatile uint32_t * reg_control = get_reg_control_addr(port, ep_idx);
(*reg_control) |= ENDPTCTRL_MASK_STALL << (ep_idx & 0x01 ? 16 : 0);
if ( ep_addr == 0)
{
// Stall both Control IN and OUT
(*reg_control) |= ( (ENDPTCTRL_MASK_STALL << 16) || (ENDPTCTRL_MASK_STALL << 0) );
}else
{
(*reg_control) |= ENDPTCTRL_MASK_STALL << (ep_idx & 0x01 ? 16 : 0);
}
}
void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t ep_addr)
@ -475,7 +478,9 @@ void hal_dcd_isr(uint8_t port)
if ( p_qtd->int_on_complete )
{
bool succeeded = ( p_qtd->xact_err || p_qtd->halted || p_qtd->buffer_err ) ? false : true;
tusb_dcd_xfer_complete(port, 0, 0, succeeded); // TODO xferred bytes for control xfer is not needed yet !!!!
(void) succeeded;
tusb_dcd_control_complete(port);
}
}
}

View File

@ -382,7 +382,7 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
if(TUSB_ERROR_NONE != error)
{
// Response with Protocol Stall if request is not supported
tusb_dcd_control_stall(port);
tusb_dcd_edpt_stall(port, 0);
}else if (p_request->wLength == 0)
{
usbd_control_status(port, 1-p_request->bmRequestType_bit.direction);
@ -546,6 +546,10 @@ void tusb_dcd_xfer_complete(uint8_t port, uint8_t ep_addr, uint32_t xferred_byte
{
if (ep_addr == 0 )
{
(void) port;
(void) xferred_bytes;
(void) succeeded;
// Control Transfer
osal_semaphore_post( usbd_control_xfer_sem_hdl );
}else
@ -557,7 +561,7 @@ void tusb_dcd_xfer_complete(uint8_t port, uint8_t ep_addr, uint32_t xferred_byte
.sub_event_id = succeeded ? TUSB_EVENT_XFER_COMPLETE : TUSB_EVENT_XFER_ERROR
};
task_event.xfer_done.ep_addr = ep_addr;
task_event.xfer_done.ep_addr = ep_addr;
task_event.xfer_done.xferred_byte = xferred_bytes;
osal_queue_send(usbd_queue_hdl, &task_event);

View File

@ -73,24 +73,28 @@ void tusb_dcd_set_config (uint8_t port, uint8_t config_num);
*------------------------------------------------------------------*/
void tusb_dcd_bus_event (uint8_t port, usbd_bus_event_type_t bus_event);
void tusb_dcd_setup_received (uint8_t port, uint8_t const* p_request);
void tusb_dcd_xfer_complete (uint8_t port, uint8_t edpt_addr, uint32_t xferred_bytes, bool succeeded);
void tusb_dcd_xfer_complete (uint8_t port, uint8_t ep_addr, uint32_t xferred_bytes, bool succeeded);
static inline void tusb_dcd_control_complete(uint8_t port)
{
// TODO all control complete is successful !!
tusb_dcd_xfer_complete(port, 0, 0, true);
}
/*------------------------------------------------------------------*/
/* Endpoint API
*------------------------------------------------------------------*/
//------------- Control Endpoint -------------//
bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint16_t length);
void tusb_dcd_control_stall (uint8_t port);
//------------- Other Endpoints -------------//
bool tusb_dcd_edpt_open (uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc);
bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t edpt_addr, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t edpt_addr, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
bool tusb_dcd_edpt_busy (uint8_t port, uint8_t edpt_addr);
bool tusb_dcd_edpt_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
bool tusb_dcd_edpt_queue_xfer (uint8_t port, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
bool tusb_dcd_edpt_busy (uint8_t port, uint8_t ep_addr);
void tusb_dcd_edpt_stall (uint8_t port, uint8_t edpt_addr);
void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t edpt_addr);
void tusb_dcd_edpt_stall (uint8_t port, uint8_t ep_addr);
void tusb_dcd_edpt_clear_stall (uint8_t port, uint8_t ep_addr);
#ifdef __cplusplus
}