add test & code for hcd_pipe_control_open

This commit is contained in:
hathach 2013-03-05 14:26:36 +07:00
parent 2c8596edeb
commit 3ed29f5f3c
9 changed files with 283 additions and 19 deletions

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@ -42,9 +42,12 @@
#include "hal.h"
#include "mock_osal.h"
#include "hcd.h"
#include "usbh_hcd.h"
#include "ehci.h"
extern ehci_data_t ehci_data;
usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1];
LPC_USB0_Type lpc_usb0;
LPC_USB1_Type lpc_usb1;
@ -83,7 +86,7 @@ void test_hcd_init_usbint(void)
for(uint32_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
ehci_registers_t* const regs = get_operational_register(i+CONTROLLER_HOST_START_INDEX);
ehci_registers_t* const regs = get_operational_register(i+TEST_CONTROLLER_HOST_START_INDEX);
//------------- USB INT Enable-------------//
TEST_ASSERT(regs->usb_int_enable_bit.usb_error);
@ -107,7 +110,7 @@ void test_hcd_init_async_list(void)
for(uint32_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t hostid = i+CONTROLLER_HOST_START_INDEX;
uint8_t hostid = i+TEST_CONTROLLER_HOST_START_INDEX;
ehci_registers_t * const regs = get_operational_register(hostid);
ehci_qhd_t * const async_head = get_async_head(hostid);
@ -132,7 +135,7 @@ void test_hcd_init_period_list(void)
for(uint32_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t const hostid = i+CONTROLLER_HOST_START_INDEX;
uint8_t const hostid = i+TEST_CONTROLLER_HOST_START_INDEX;
ehci_registers_t* const regs = get_operational_register(hostid);
ehci_qhd_t * const period_head = get_period_head(hostid);
ehci_link_t * const framelist = get_period_frame_list(hostid);
@ -160,7 +163,7 @@ void test_hcd_init_tt_control(void)
for(uint32_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t const hostid = i+CONTROLLER_HOST_START_INDEX;
uint8_t const hostid = i+TEST_CONTROLLER_HOST_START_INDEX;
ehci_registers_t* const regs = get_operational_register(hostid);
TEST_ASSERT_EQUAL(0, regs->tt_control);
@ -173,7 +176,7 @@ void test_hcd_init_usbcmd(void)
for(uint32_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t const hostid = i+CONTROLLER_HOST_START_INDEX;
uint8_t const hostid = i+TEST_CONTROLLER_HOST_START_INDEX;
ehci_registers_t* const regs = get_operational_register(hostid);
TEST_ASSERT(regs->usb_cmd_bit.async_enable);

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@ -0,0 +1,191 @@
/*
* test_ehci_pipe.c
*
* Created on: Feb 27, 2013
* Author: hathach
*/
/*
* Software License Agreement (BSD License)
* Copyright (c) 2012, hathach (tinyusb.net)
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the tiny usb stack.
*/
#include "unity.h"
#include "tusb_option.h"
#include "errors.h"
#include "binary.h"
#include "hal.h"
#include "mock_osal.h"
#include "hcd.h"
#include "usbh_hcd.h"
#include "ehci.h"
extern ehci_data_t ehci_data;
usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1];
LPC_USB0_Type lpc_usb0;
LPC_USB1_Type lpc_usb1;
uint8_t const max_packet_size = 64;
uint8_t dev_addr = 0;
uint8_t hub_addr;
uint8_t hub_port;
//--------------------------------------------------------------------+
// Setup/Teardown + helper declare
//--------------------------------------------------------------------+
void setUp(void)
{
memclr_(&lpc_usb0, sizeof(LPC_USB0_Type));
memclr_(&lpc_usb1, sizeof(LPC_USB1_Type));
memclr_(usbh_device_info_pool, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1));
dev_addr = 0;
hub_addr = 2;
hub_port = 2;
}
void tearDown(void)
{
}
//--------------------------------------------------------------------+
// CONTROL PIPE
//--------------------------------------------------------------------+
void verify_control_open_qhd(ehci_qhd_t *p_qhd)
{
TEST_ASSERT_EQUAL(dev_addr, p_qhd->device_address);
TEST_ASSERT_FALSE(p_qhd->inactive_next_xact);
TEST_ASSERT_EQUAL(0, p_qhd->endpoint_number);
TEST_ASSERT_EQUAL(1, p_qhd->data_toggle_control);
TEST_ASSERT_EQUAL(max_packet_size, p_qhd->max_package_size);
TEST_ASSERT_EQUAL(0, p_qhd->nak_count_reload); // TODO NAK Reload disable
TEST_ASSERT_EQUAL(0, p_qhd->smask);
TEST_ASSERT_EQUAL(0, p_qhd->cmask);
TEST_ASSERT_EQUAL(hub_addr, p_qhd->hub_address);
TEST_ASSERT_EQUAL(hub_port, p_qhd->hub_port);
TEST_ASSERT_EQUAL(1, p_qhd->mult);
TEST_ASSERT(p_qhd->qtd_overlay.next.terminate);
TEST_ASSERT(p_qhd->qtd_overlay.alternate.terminate);
TEST_ASSERT(p_qhd->qtd_overlay.halted);
//------------- HCD -------------//
TEST_ASSERT(p_qhd->used);
TEST_ASSERT_NULL(p_qhd->p_qtd_list);
}
void test_control_open_addr0_qhd_data(void)
{
dev_addr = 0;
for (uint8_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t hostid = i + TEST_CONTROLLER_HOST_START_INDEX;
ehci_qhd_t * const p_qhd = get_async_head( hostid );
usbh_device_info_pool[dev_addr].core_id = hostid;
usbh_device_info_pool[dev_addr].hub_addr = hub_addr;
usbh_device_info_pool[dev_addr].hub_port = hub_port;
hcd_pipe_control_open(dev_addr, max_packet_size);
verify_control_open_qhd(p_qhd);
TEST_ASSERT(p_qhd->head_list_flag);
}
}
void test_control_open_qhd_data(void)
{
dev_addr = 1;
for (uint8_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t hostid = i + TEST_CONTROLLER_HOST_START_INDEX;
ehci_qhd_t * const async_head = get_async_head( hostid );
ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
usbh_device_info_pool[dev_addr].core_id = hostid;
usbh_device_info_pool[dev_addr].hub_addr = hub_addr;
usbh_device_info_pool[dev_addr].hub_port = hub_port;
hcd_pipe_control_open(dev_addr, max_packet_size);
verify_control_open_qhd(p_qhd);
TEST_ASSERT_FALSE(p_qhd->head_list_flag);
//------------- async list check -------------//
TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
TEST_ASSERT_FALSE(async_head->next.terminate);
TEST_ASSERT_EQUAL(EHCI_QUEUE_ELEMENT_QHD, async_head->next.type);
}
}
void test_control_open_highspeed(void)
{
dev_addr = 1;
for (uint8_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t hostid = i + TEST_CONTROLLER_HOST_START_INDEX;
ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
usbh_device_info_pool[dev_addr].core_id = hostid;
usbh_device_info_pool[dev_addr].speed = TUSB_SPEED_HIGH;
hcd_pipe_control_open(dev_addr, max_packet_size);
TEST_ASSERT_EQUAL(TUSB_SPEED_HIGH, p_qhd->endpoint_speed);
TEST_ASSERT_FALSE(p_qhd->non_hs_control_endpoint);
}
}
void test_control_open_non_highspeed(void)
{
dev_addr = 1;
for (uint8_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t hostid = i + TEST_CONTROLLER_HOST_START_INDEX;
ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
usbh_device_info_pool[dev_addr].core_id = hostid;
usbh_device_info_pool[dev_addr].speed = TUSB_SPEED_FULL;
hcd_pipe_control_open(dev_addr, max_packet_size);
TEST_ASSERT_EQUAL(TUSB_SPEED_FULL, p_qhd->endpoint_speed);
TEST_ASSERT_TRUE(p_qhd->non_hs_control_endpoint);
}
}
void test_control_open_device_not_connected(void)
{
}

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@ -42,9 +42,13 @@
#include "hal.h"
#include "mock_osal.h"
#include "hcd.h"
#include "usbh_hcd.h"
#include "ehci.h"
extern ehci_data_t ehci_data;
usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1];
LPC_USB0_Type lpc_usb0;
LPC_USB1_Type lpc_usb1;
@ -151,7 +155,7 @@ void test_qhd_structure(void)
TEST_ASSERT_EQUAL( 0, BITFIELD_OFFSET_OF_UINT32(ehci_qhd_t, 2, smask) );
TEST_ASSERT_EQUAL( 8, BITFIELD_OFFSET_OF_UINT32(ehci_qhd_t, 2, cmask) );
TEST_ASSERT_EQUAL( 16, BITFIELD_OFFSET_OF_UINT32(ehci_qhd_t, 2, hub_address) );
TEST_ASSERT_EQUAL( 23, BITFIELD_OFFSET_OF_UINT32(ehci_qhd_t, 2, port_number) );
TEST_ASSERT_EQUAL( 23, BITFIELD_OFFSET_OF_UINT32(ehci_qhd_t, 2, hub_port) );
TEST_ASSERT_EQUAL( 30, BITFIELD_OFFSET_OF_UINT32(ehci_qhd_t, 2, mult) );
TEST_ASSERT_EQUAL( 3*4, offsetof(ehci_qhd_t, qtd_addr));
@ -305,7 +309,7 @@ void test_ehci_data(void)
{
for(uint32_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
{
uint8_t hostid = i+CONTROLLER_HOST_START_INDEX;
uint8_t hostid = i+TEST_CONTROLLER_HOST_START_INDEX;
TEST_ASSERT_BITS_LOW(4096-1, (uint32_t)get_period_frame_list(hostid) );
}

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@ -78,7 +78,7 @@
#define HOST_HCD_XFER_ISOCHRONOUS
// Test support
#define CONTROLLER_HOST_START_INDEX ( ((CONTROLLER_HOST_NUMBER == 1) && (TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST)) ? 1 : 0)
#define TEST_CONTROLLER_HOST_START_INDEX ( ((CONTROLLER_HOST_NUMBER == 1) && (TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST)) ? 1 : 0)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

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@ -44,6 +44,9 @@
#include "hal/hal.h"
#include "osal/osal.h"
#include "common/timeout_timer.h"
#include "../hcd.h"
#include "../usbh_hcd.h"
#include "ehci.h"
//--------------------------------------------------------------------+
@ -219,6 +222,7 @@ tusb_error_t hcd_controller_stop(uint8_t hostid)
return timeout_expired(&timeout) ? TUSB_ERROR_OSAL_TIMEOUT : TUSB_ERROR_NONE;
}
//TODO host/device mode must be set immediately after a reset
tusb_error_t hcd_controller_reset(uint8_t hostid) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_controller_reset(uint8_t hostid)
{
@ -246,5 +250,66 @@ tusb_error_t hcd_controller_reset(uint8_t hostid)
//--------------------------------------------------------------------+
// PIPE API
//--------------------------------------------------------------------+
tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
{
ehci_qhd_t *p_qhd;
if (dev_addr == 0)
{
// async head of selected controller is used as Addr0 Endpoint --> horizontal link have to be preserved
p_qhd = get_async_head( usbh_device_info_pool[dev_addr].core_id );
p_qhd->head_list_flag = 1; // make sure it is still head of list
}else
{
p_qhd = &ehci_data.device[dev_addr].control.qhd;
p_qhd->head_list_flag = 0; // make sure it is still head of list
}
p_qhd->device_address = dev_addr;
p_qhd->inactive_next_xact = 0;
p_qhd->endpoint_number = 0;
p_qhd->endpoint_speed = usbh_device_info_pool[dev_addr].speed;
p_qhd->data_toggle_control = 1;
p_qhd->max_package_size = max_packet_size;
p_qhd->non_hs_control_endpoint = (usbh_device_info_pool[dev_addr].speed != TUSB_SPEED_HIGH) ? 1 : 0;
p_qhd->nak_count_reload = 0;
p_qhd->smask = 0;
p_qhd->cmask = 0;
p_qhd->hub_address = usbh_device_info_pool[dev_addr].hub_addr;
p_qhd->hub_port = usbh_device_info_pool[dev_addr].hub_port;
p_qhd->mult = 1; // TODO not use high bandwidth/park mode yet
//------------- inactive when just opened -------------//
p_qhd->qtd_overlay.next.terminate = 1;
p_qhd->qtd_overlay.alternate.terminate = 1;
p_qhd->qtd_overlay.halted = 1;
//------------- HCD Management Data -------------//
p_qhd->used = 1;
p_qhd->p_qtd_list = NULL;
//------------- insert to async list -------------//
// TODO disable async list first if got error
if (dev_addr != 0)
{
ehci_qhd_t * const async_head = get_async_head(usbh_device_info_pool[dev_addr].core_id);
p_qhd->next = async_head->next;
async_head->next.address = (uint32_t) p_qhd;
async_head->next.type = EHCI_QUEUE_ELEMENT_QHD;
}
return TUSB_ERROR_NONE;
}
//
//tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const * p_request, uint8_t data[])
//{
// return TUSB_ERROR_NONE;
//}
//
//pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * endpoint_desc)
//{
// return TUSB_ERROR_NONE;
//}
#endif

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@ -175,7 +175,7 @@ typedef struct {
uint32_t smask : 8 ; ///< This field is used for all endpoint speeds. Software should set this field to a zero when the queue head is on the asynchronous schedule. A non-zero value in this field indicates an interrupt endpoint
uint32_t cmask : 8 ; ///< This field is ignored by the host controller unless the EPSfield indicates this device is a low- or full-speed device and this queue head is in the periodic list. This field (along with the Activeand SplitX-statefields) is used to determine during which micro-frames the host controller should execute a complete-split transaction
uint32_t hub_address : 7 ; ///< This field is ignored by the host controller unless the EPSfield indicates a full- or low-speed device. The value is the USB device address of the USB 2.0 Hub below which the full- or low-speed device associated with this endpoint is attached. This field is used in the split-transaction protocol. See Section 4.12.
uint32_t port_number : 7 ; ///< This field is ignored by the host controller unless the EPSfield indicates a full- or low-speed device. The value is the port number identifier on the USB 2.0 Hub (for hub at device address Hub Addrbelow), below which the full- or low-speed device associated with this endpoint is attached. This information is used in the split-transaction protocol. See Section 4.12.
uint32_t hub_port : 7 ; ///< This field is ignored by the host controller unless the EPSfield indicates a full- or low-speed device. The value is the port number identifier on the USB 2.0 Hub (for hub at device address Hub Addrbelow), below which the full- or low-speed device associated with this endpoint is attached. This information is used in the split-transaction protocol. See Section 4.12.
uint32_t mult : 2 ; ///< This field is a multiplier used to key the host controller as the number of successive packets the host controller may submit to the endpoint in the current execution. 00b=Reserved 01b,10b,11b= 1 (2, 3) Transaction for this endpoint/micro frame
uint32_t : 0 ; // padding to the end of current storage unit
// End of Word 2
@ -186,15 +186,15 @@ typedef struct {
/// Word 4-11: Transfer Overlay
volatile ehci_qtd_t qtd_overlay;
/// Due to the fact QHD is 32 bytes algined but occupies 48 bytes thus there are 16 bytes padding free that we can make use of.
uint32_t used : 1;
uint32_t direction : 2;
uint32_t interval : 5;
uint32_t list_index : 20; /* not support full period list */
uint32_t : 0; /* Force next member on next storage unit */
/// Due to the fact QHD is 32 bytes aligned but occupies only 48 bytes
/// thus there are 16 bytes padding free that we can make use of.
uint8_t used;
uint8_t list_index;
uint8_t reserved[2];
ehci_qtd_t *p_qtd_list; /* used as TD head to clean up TD chain when transfer done */ // TODO consider using ehci_link_t (terminate bit)
volatile uint32_t status; // TODO will remove volatile after remove all HcdQHD function
uint32_t FirstQtd; /* used as TD head to clean up TD chain when transfer done */
uint16_t *pActualTransferCount; /* total transferred bytes of a usb request */
}ATTR_ALIGNED(32) ehci_qhd_t;

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@ -66,7 +66,7 @@ typedef uint32_t pipe_handle_t;
//--------------------------------------------------------------------+
// USBH-HCD API
//--------------------------------------------------------------------+
tusb_error_t hcd_init() ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_init(void) ATTR_WARN_UNUSED_RESULT;
void hcd_isr(uint8_t hostid);
//--------------------------------------------------------------------+

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@ -56,7 +56,7 @@
//--------------------------------------------------------------------+
// INTERNAL OBJECT & FUNCTION DECLARATION
//--------------------------------------------------------------------+
STATIC_ usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1]; // including zero-address
usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1]; // including zero-address
//------------- Enumeration Task Data -------------//
OSAL_TASK_DEF(enum_task, usbh_enumeration_task, 128, OSAL_PRIO_HIGH);

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@ -85,7 +85,7 @@ typedef struct { // TODO internal structure, re-order members
//------------- configuration descriptor info -------------//
uint8_t interface_count; // bNumInterfaces alias
tusbh_device_status_t status;
uint8_t status; // value from enum tusbh_device_status_
// pipe_handle_t pipe_control; NOTE: use device address/handle instead
tusb_std_request_t request_control;
@ -101,6 +101,7 @@ typedef struct { // TODO internal structure, re-order members
} usbh_device_info_t;
extern usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1]; // including zero-address
//--------------------------------------------------------------------+
// ADDRESS 0 API
//--------------------------------------------------------------------+