rename OPT_MODE_

This commit is contained in:
hathach 2018-04-12 13:17:58 +07:00
parent 08a24ee224
commit 3d31f92106
11 changed files with 35 additions and 35 deletions

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@ -48,8 +48,8 @@
//--------------------------------------------------------------------+
//#define CFG_TUSB_MCU will be passed from IDE/command line for easy board/mcu switching
#define CFG_TUSB_CONTROLLER_0_MODE (TUSB_MODE_DEVICE)
//#define CFG_TUSB_CONTROLLER_1_MODE (TUSB_MODE_DEVICE)
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_DEVICE)
//#define CFG_TUSB_CONTROLLER_1_MODE (OPT_MODE_DEVICE)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

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@ -49,7 +49,7 @@
//#define CFG_TUSB_MCU will be passed from IDE/command line for easy board/mcu switching
#define CFG_TUSB_MCU OPT_MCU_NRF5X
#define CFG_TUSB_CONTROLLER_0_MODE (TUSB_MODE_DEVICE)
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_DEVICE)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

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@ -48,8 +48,8 @@
//--------------------------------------------------------------------+
//#define CFG_TUSB_MCU will be passed from IDE/command line for easy board/mcu switching
#define CFG_TUSB_CONTROLLER_0_MODE (TUSB_MODE_DEVICE)
//#define CFG_TUSB_CONTROLLER_1_MODE (TUSB_MODE_DEVICE)
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_DEVICE)
//#define CFG_TUSB_CONTROLLER_1_MODE (OPT_MODE_DEVICE)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

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@ -47,7 +47,7 @@
// CONTROLLER CONFIGURATION
//--------------------------------------------------------------------+
//#define CFG_TUSB_MCU will be passed from IDE for easy board/mcu switching
#define CFG_TUSB_CONTROLLER_0_MODE (TUSB_MODE_HOST)
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_HOST)
//--------------------------------------------------------------------+
// HOST CONFIGURATION

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@ -99,7 +99,7 @@ void board_init(void)
// USB0 Power: EA4357 channel B U20 GPIO26 active low (base board), P2_3 on LPC4357
scu_pinmux(0x02, 3, MD_PUP | MD_EZI, FUNC7); // USB0 VBus Power
#if CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_DEVICE
#if CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE
scu_pinmux(0x09, 5, GPIO_PDN, FUNC4); // P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low.
GPIO_SetDir(5, BIT_(18), 1);
#endif

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@ -46,8 +46,8 @@
//--------------------------------------------------------------------+
// CONTROLLER CONFIGURATION
//--------------------------------------------------------------------+
#define CFG_TUSB_CONTROLLER_0_MODE (TUSB_MODE_HOST | TUSB_MODE_DEVICE)
#define CFG_TUSB_CONTROLLER_1_MODE (TUSB_MODE_NONE)
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_HOST | OPT_MODE_DEVICE)
#define CFG_TUSB_CONTROLLER_1_MODE (OPT_MODE_NONE)
//--------------------------------------------------------------------+
// HOST CONFIGURATION
@ -65,7 +65,7 @@
// Test support
#define TEST_CONTROLLER_HOST_START_INDEX \
( ((CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST)) ? 1 : 0)
( ((CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)) ? 1 : 0)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

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@ -200,11 +200,11 @@ static tusb_error_t usbd_main_st(void);
tusb_error_t usbd_init (void)
{
#if (CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_DEVICE)
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE)
dcd_init(0);
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_DEVICE)
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_DEVICE)
dcd_init(1);
#endif

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@ -61,7 +61,7 @@ CFG_TUSB_ATTR_USBRAM STATIC_VAR ehci_data_t ehci_data;
#if EHCI_PERIODIC_LIST
#if (CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_HOST)
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE];
#ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma
@ -69,7 +69,7 @@ CFG_TUSB_ATTR_USBRAM STATIC_VAR ehci_data_t ehci_data;
#endif
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST)
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list1[EHCI_FRAMELIST_SIZE];
#ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma
@ -133,11 +133,11 @@ tusb_error_t hcd_init(void)
//------------- Data Structure init -------------//
memclr_(&ehci_data, sizeof(ehci_data_t));
#if (CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_HOST)
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST)
ASSERT_ERR (hcd_controller_init(0));
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST)
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
ASSERT_ERR (hcd_controller_init(1));
#endif
@ -794,12 +794,12 @@ static inline ehci_link_t* get_period_frame_list(uint8_t hostid)
{
switch(hostid)
{
#if (CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_HOST)
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST)
case 0:
return period_frame_list0;
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST)
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
case 1:
return period_frame_list1;
#endif
@ -811,7 +811,7 @@ static inline ehci_link_t* get_period_frame_list(uint8_t hostid)
static inline uint8_t hostid_to_data_idx(uint8_t hostid)
{
#if (CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST)
#if (CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
(void) hostid;
return 0;
#else

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@ -70,11 +70,11 @@ typedef struct {
extern ATTR_WEAK dcd_data_t dcd_data0;
extern ATTR_WEAK dcd_data_t dcd_data1;
#if (CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_DEVICE)
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data0;
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_DEVICE)
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_DEVICE)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data1;
#endif

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@ -93,7 +93,7 @@ bool tusb_hal_init(void)
// reset controller & set role
hal_controller_reset(0);
#if CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_HOST
#if CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST
LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
LPC_USB0->USBMODE_D = LPC43XX_USBMODE_DEVICE;
@ -111,11 +111,11 @@ bool tusb_hal_init(void)
/* connect CLK_USB1 to 60 MHz clock */
CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */
LPC_SCU->SFSUSB = (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
LPC_SCU->SFSUSB = (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
hal_controller_reset(1);
#if CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST
#if CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST
LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
LPC_USB1->USBMODE_D = LPC43XX_USBMODE_DEVICE;

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@ -60,7 +60,7 @@
/** @} */
/** \defgroup group_supported_os Supported RTOS
* \brief \ref CFG_TUSB_OS must be defined to one of these
* \ref CFG_TUSB_OS must be defined to one of these
* @{ */
#define OPT_OS_NONE 1 ///< No RTOS is used
#define OPT_OS_FREERTOS 2 ///< FreeRTOS is used
@ -83,32 +83,32 @@
/** \defgroup group_mode Controller Mode Selection
* \brief CFG_TUSB_CONTROLLER_N_MODE must be defined with these
* @{ */
#define TUSB_MODE_HOST 0x02 ///< Host Mode
#define TUSB_MODE_DEVICE 0x01 ///< Device Mode
#define TUSB_MODE_NONE 0x00 ///< Disabled
#define OPT_MODE_HOST 0x02 ///< Host Mode
#define OPT_MODE_DEVICE 0x01 ///< Device Mode
#define OPT_MODE_NONE 0x00 ///< Disabled
/** @} */
#ifndef CFG_TUSB_CONTROLLER_0_MODE
#define CFG_TUSB_CONTROLLER_0_MODE TUSB_MODE_NONE
#define CFG_TUSB_CONTROLLER_0_MODE OPT_MODE_NONE
#endif
#ifndef CFG_TUSB_CONTROLLER_1_MODE
#define CFG_TUSB_CONTROLLER_1_MODE TUSB_MODE_NONE
#define CFG_TUSB_CONTROLLER_1_MODE OPT_MODE_NONE
#endif
#define CONTROLLER_HOST_NUMBER (\
((CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_HOST) ? 1 : 0) + \
((CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST) ? 1 : 0))
((CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST) ? 1 : 0) + \
((CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST) ? 1 : 0))
#define CONTROLLER_DEVICE_NUMBER (\
((CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_DEVICE) ? 1 : 0) + \
((CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_DEVICE) ? 1 : 0))
((CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE) ? 1 : 0) + \
((CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_DEVICE) ? 1 : 0))
#define MODE_HOST_SUPPORTED (CONTROLLER_HOST_NUMBER > 0)
#define MODE_DEVICE_SUPPORTED (CONTROLLER_DEVICE_NUMBER > 0)
#if !MODE_HOST_SUPPORTED && !MODE_DEVICE_SUPPORTED
#error please configure at least 1 CFG_TUSB_CONTROLLER_N_MODE to TUSB_MODE_HOST and/or TUSB_MODE_DEVICE
#error please configure at least 1 CFG_TUSB_CONTROLLER_N_MODE to OPT_MODE_HOST and/or OPT_MODE_DEVICE
#endif
//--------------------------------------------------------------------+