add stlinkv3mini to f7 group
This commit is contained in:
hathach
parent
fecad9bab4
commit
39d2c219b5
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@ -1,63 +0,0 @@
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# Only OTG-HS has a connector on this board
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SPEED ?= high
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CFLAGS += \
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-flto \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m7 \
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-mfloat-abi=hard \
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-mfpu=fpv5-d16 \
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-nostdlib -nostartfiles \
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-DSTM32F723xx \
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-DHSE_VALUE=25000000 \
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-DCFG_TUSB_MCU=OPT_MCU_STM32F7 \
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-DBOARD_DEVICE_RHPORT_NUM=1
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ifeq ($(SPEED), high)
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CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED
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$(info "Using OTG_HS in HighSpeed mode")
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else
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CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_FULL_SPEED
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$(info "Using OTG_HS in FullSpeed mode")
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endif
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# mcu driver cause following warnings
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CFLAGS += -Wno-error=shadow -Wno-error=cast-align
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ST_FAMILY = f7
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ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
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ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/$(BOARD)/STM32F723xE_FLASH.ld
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SRC_C += \
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$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c
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SRC_S += \
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$(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
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INC += \
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$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
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$(TOP)/$(ST_CMSIS)/Include \
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$(TOP)/$(ST_HAL_DRIVER)/Inc \
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$(TOP)/hw/bsp/$(BOARD)
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# For TinyUSB port source
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VENDOR = st
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CHIP_FAMILY = synopsys
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM7/r0p1
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# flash target using on-board stlink
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flash: flash-stlink
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@ -1,298 +0,0 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020 Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de),
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* Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "../board.h"
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#include "stm32f7xx_hal.h"
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
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//--------------------------------------------------------------------+
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void OTG_FS_IRQHandler(void)
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{
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tud_int_handler(0);
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}
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// Despite being call USB2_OTG
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// OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port
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void OTG_HS_IRQHandler(void)
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{
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tud_int_handler(1);
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}
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// Pin configuartion with help from
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// RadioOperator/CMSIS-DAP_for_STLINK-V3MINI.git
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// CMSIS-DAP_for_STLINK-V3MINI/STLINK-V3MINI/Sch/STLINK-V3MINI_GPIOs.JPG
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM
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//--------------------------------------------------------------------+
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#define LED_PORT GPIOA
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#define LED_PIN GPIO_PIN_10
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#define LED_STATE_ON 1
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/* No Buttom */
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#define UARTx USART6
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#define UART_GPIO_PORT GPIOG
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#define UART_GPIO_AF GPIO_AF8_USART6
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#define UART_TX_PIN GPIO_PIN_9
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#define UART_RX_PIN GPIO_PIN_14
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UART_HandleTypeDef UartHandle;
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// enable all LED, Button, Uart, USB clock
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static void all_rcc_clk_enable(void)
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{
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__HAL_RCC_GPIOA_CLK_ENABLE(); // USB D+, D-, LED
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__HAL_RCC_GPIOB_CLK_ENABLE(); // OTG_HS
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__HAL_RCC_GPIOD_CLK_ENABLE(); // OTG_HS ID
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__HAL_RCC_GPIOG_CLK_ENABLE(); // Uart TX, RX
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__HAL_RCC_USART6_CLK_ENABLE(); // Uart module
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}
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/**
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* @brief System Clock Configuration
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* The system Clock is configured as follow :
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* System Clock source = PLL (HSE)
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* SYSCLK(Hz) = 216000000
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* HCLK(Hz) = 216000000
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* AHB Prescaler = 1
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* APB1 Prescaler = 4
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* APB2 Prescaler = 2
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* HSE Frequency(Hz) = 25000000
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* PLL_M = HSE_VALUE/1000000
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* PLL_N = 432
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* PLL_P = 2
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* PLL_Q = 9
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* VDD(V) = 3.3
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* Main regulator output voltage = Scale1 mode
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* Flash Latency(WS) = 7
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* The USB clock configuration from PLLSAI:
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* PLLSAIP = 8
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* PLLSAIN = 384
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* PLLSAIQ = 7
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* @param None
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct;
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/* Enable Power Control clock */
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__HAL_RCC_PWR_CLK_ENABLE();
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/* The voltage scaling allows optimizing the power consumption when the device is
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clocked below the maximum system frequency, to update the voltage scaling value
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regarding system frequency refer to product datasheet. */
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
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RCC_OscInitStruct.PLL.PLLN = 432;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 9;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Activate the OverDrive to reach the 216 MHz Frequency */
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HAL_PWREx_EnableOverDrive();
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/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
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}
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void board_init(void)
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{
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SystemClock_Config();
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all_rcc_clk_enable();
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#if CFG_TUSB_OS == OPT_OS_NONE
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// 1ms tick timer
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SysTick_Config(SystemCoreClock / 1000);
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#endif
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GPIO_InitTypeDef GPIO_InitStruct;
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// LED
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GPIO_InitStruct.Pin = LED_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
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// Uart
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GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.Alternate = UART_GPIO_AF;
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HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
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UartHandle.Instance = UARTx;
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UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
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UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
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UartHandle.Init.StopBits = UART_STOPBITS_1;
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UartHandle.Init.Parity = UART_PARITY_NONE;
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UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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UartHandle.Init.Mode = UART_MODE_TX_RX;
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UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
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HAL_UART_Init(&UartHandle);
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#if BOARD_DEVICE_RHPORT_NUM == 0
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/* Configure USB FS GPIOs */
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/* Configure DM DP Pins */
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GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* Configure VBUS Pin */
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GPIO_InitStruct.Pin = GPIO_PIN_9;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* Configure OTG-FS ID pin */
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GPIO_InitStruct.Pin = GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* Enable USB FS Clocks */
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__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
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// Enable VBUS sense (B device) via pin PA9
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USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
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#else
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/* Configure USB HS GPIOs */
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/* Configure DM DP Pins */
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GPIO_InitStruct.Pin = (GPIO_PIN_14 | GPIO_PIN_15);
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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// Enable HS VBUS sense (B device) via pin PB13
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USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBDEN;
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/* Configure OTG-HS ID pin */
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GPIO_InitStruct.Pin = GPIO_PIN_13;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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/* Enable PHYC Clocks */
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__HAL_RCC_OTGPHYC_CLK_ENABLE();
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/* Enable USB HS Clocks */
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__HAL_RCC_USB_OTG_HS_CLK_ENABLE();
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__HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE();
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// Enable VBUS sense (B device) via pin PA9
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USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
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// B-peripheral session valid override enable
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USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
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USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
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// Force device mode
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USB_OTG_HS->GUSBCFG &= ~USB_OTG_GUSBCFG_FHMOD;
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USB_OTG_HS->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
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#endif
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}
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
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void board_led_write(bool state)
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{
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HAL_GPIO_WritePin(LED_PORT, LED_PIN, state);
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}
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uint32_t board_button_read(void)
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{
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return 0;
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}
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int board_uart_read(uint8_t* buf, int len)
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{
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(void) buf; (void) len;
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return 0;
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}
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int board_uart_write(void const * buf, int len)
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{
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HAL_UART_Transmit(&UartHandle, (uint8_t*) buf, len, 0xffff);
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return len;
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}
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#if CFG_TUSB_OS == OPT_OS_NONE
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volatile uint32_t system_ticks = 0;
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void SysTick_Handler (void)
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{
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system_ticks++;
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}
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uint32_t board_millis(void)
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{
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return system_ticks;
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}
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#endif
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void HardFault_Handler (void)
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{
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asm("bkpt");
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}
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// Required by __libc_init_array in startup code if we are compiling using
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// -nostdlib/-nostartfiles.
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void _init(void)
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{
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}
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@ -0,0 +1,94 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
|
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* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define LED_PORT GPIOA
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#define LED_PIN GPIO_PIN_10
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#define LED_STATE_ON 1
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// No physical button is populated
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#define BUTTON_PORT GPIOA
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#define BUTTON_PIN GPIO_PIN_0
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#define BUTTON_STATE_ACTIVE 1
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#define UART_DEV USART6
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#define UART_CLK_EN __HAL_RCC_USART6_CLK_ENABLE
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#define UART_GPIO_PORT GPIOG
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#define UART_GPIO_AF GPIO_AF8_USART6
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#define UART_TX_PIN GPIO_PIN_9
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#define UART_RX_PIN GPIO_PIN_14
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//--------------------------------------------------------------------+
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// RCC Clock
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//--------------------------------------------------------------------+
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static inline void board_clock_init(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct;
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/* Enable Power Control clock */
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__HAL_RCC_PWR_CLK_ENABLE();
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|
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/* The voltage scaling allows optimizing the power consumption when the device is
|
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clocked below the maximum system frequency, to update the voltage scaling value
|
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regarding system frequency refer to product datasheet. */
|
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
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RCC_OscInitStruct.PLL.PLLN = 432;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 9;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Activate the OverDrive to reach the 216 MHz Frequency */
|
||||
HAL_PWREx_EnableOverDrive();
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* BOARD_H_ */
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
# Only OTG-HS has a connector on this board
|
||||
PORT ?= 1
|
||||
SPEED ?= high
|
||||
|
||||
CFLAGS += \
|
||||
-DSTM32F723xx \
|
||||
-DHSE_VALUE=25000000 \
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
|
||||
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
|
||||
|
||||
# flash target using on-board stlink
|
||||
flash: flash-stlink
|
||||
|
|
@ -60,6 +60,7 @@ void board_init(void)
|
|||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE(); // ULPI NXT
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE(); // ULPI NXT
|
||||
|
||||
|
|
@ -141,7 +142,7 @@ void board_init(void)
|
|||
#else
|
||||
// OTG_HS
|
||||
|
||||
#ifdef __HAL_RCC_OTGPHYC_CLK_ENABLE
|
||||
#ifdef USB_HS_PHYC
|
||||
// MCU with built-in HS PHY such as F723, F733, F730
|
||||
|
||||
/* Configure DM DP Pins */
|
||||
|
|
|
|||
Loading…
Reference in New Issue