refractor vendor/freertos
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hathach
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dcc58a7afc
commit
301be3203c
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@ -456,7 +456,11 @@
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</option>
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<option>
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<name>ADefines</name>
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<state></state>
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<state>CORE_M4</state>
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<state>TUSB_CFG_MCU=MCU_LPC43XX</state>
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<state>BOARD=BOARD_EA4357</state>
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<state>TUSB_CFG_OS=TUSB_OS_FREERTOS</state>
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<state>TUSB_CFG_OS_TASK_PRIO=configMAX_PRIORITIES-5</state>
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</option>
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<option>
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<name>AList</name>
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@ -552,7 +556,9 @@
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</option>
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<option>
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<name>AUserIncludes</name>
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<state></state>
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<state>$PROJ_DIR$\..\src</state>
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<state>$PROJ_DIR$\..\..\..\tinyusb</state>
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<state>$PROJ_DIR$\..\..\..\vendor\freertos</state>
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</option>
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<option>
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<name>AExtraOptionsCheckV2</name>
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@ -4,11 +4,14 @@
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#include "hal/hal.h"
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#if __CORTEX_M == 4
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#include "lpc43xx_m4_FreeRTOSConfig.h"
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#elif __CORTEX_M == 0
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#include "lpc43xx_m0_FreeRTOSConfig.h"
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#include "FreeRTOSConfig_cm4f.h"
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#elif __CORTEX_M == 3
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#include "FreeRTOSConfig_lpc175x_6x.h"
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#include "FreeRTOSConfig_cm3.h"
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#elif __CORTEX_M == 0
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#include "FreeRTOSConfig_cm0.h"
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#else
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#error "not yet supported MCU"
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#endif
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@ -55,7 +55,7 @@
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#define FREERTOS_CONFIG_H
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#include <stdint.h>
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#include "hal/hal.h"
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extern uint32_t SystemCoreClock;
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/*-----------------------------------------------------------
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@ -1,149 +0,0 @@
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/*
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* @brief LPC43xx dual-core example configuration file
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __LPC43XX_DUALCORE_CONFIG_H_
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#define __LPC43XX_DUALCORE_CONFIG_H_
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#include "board.h"
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/*
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* Users can enable any of the following macros so that the examples will be
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* built with that functionality.
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*/
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#define EXAMPLE_BLINKY
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#undef EXAMPLE_USB_DEVICE
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#undef EXAMPLE_USB_HOST
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#undef EXAMPLE_LWIP
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#undef EXAMPLE_EMWIN
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/*
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* Users can define any one of the following macros to use the appropriate OS.
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* For standalone executables both the macros should be disabled.
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*/
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#define OS_FREE_RTOS
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#undef OS_UCOS_III
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/*
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* The Stack sizes are currently used by Code Red LPCXpresso tool chain
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* only. In future, this will be used by Keil & IAR tool chains also
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*/
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#define STACK_SIZE 0x200
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#define HEAP_SIZE 0x4000
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/*
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* The following defines are used by the M4 image to locate the M0 image, and
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* one of the below macro must be defined based on your linker definition file.
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* If the linker file is made to generate image in SPIFI area then define
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* TARGET_SPIFI macro (so that M4 image will locate the corresponding M0 in the
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* SPIFI region). If none of them r defined the following defaults will be used
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* For LPC4330 NGX XPLORER BOARD: TARGET_SPIFI
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* For LPC4357 KEIL MCB BOARD: TARGET_IFLASH
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* For LPC4350 HITEX EVALUATION BOARD: TARGET_SPIFI
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*/
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#undef TARGET_SPIFI /* SPIFI Flash */
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#undef TARGET_IFLASH /* Internal Flash */
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#undef TARGET_XFLASH /* External NOR Flash */
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/* Priority of various tasks in dual-core examples */
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/* LWIP thread priority should always be greater than the
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* MAC priority ie., greater than TASK_PRIO_ETHERNET
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*/
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#ifdef OS_FREE_RTOS
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/* higher the number higher the priority */
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#define TASK_PRIO_LCD (tskIDLE_PRIORITY + 0UL)
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#define TASK_PRIO_TOUCHSCREEN (tskIDLE_PRIORITY + 1UL)
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#define TASK_PRIO_BLINKY_EVENT (tskIDLE_PRIORITY + 1UL)
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#define TASK_PRIO_ETHERNET (tskIDLE_PRIORITY + 2UL)
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#define TASK_PRIO_IPC_DISPATCH (tskIDLE_PRIORITY + 3UL)
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#define TASK_PRIO_USBDEVICE (tskIDLE_PRIORITY + 4UL)
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#define TASK_PRIO_LWIP_THREAD (tskIDLE_PRIORITY + 5UL)
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#elif defined(OS_UCOS_III)
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/* lower the number higher the priority */
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#define TASK_PRIO_BLINKY_EVENT 14
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#define TASK_PRIO_LCD 14
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#define TASK_PRIO_TOUCHSCREEN 13
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#define TASK_PRIO_ETHERNET 13
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#define TASK_PRIO_IPC_DISPATCH 12
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#define TASK_PRIO_USBDEVICE 11
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#define TASK_PRIO_LWIP_THREAD 10
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#endif
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/* Priority of various IRQs used in dual-core examples */
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/* lower the number higher the priority */
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#define IRQ_PRIO_IPC 7
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#define IRQ_PRIO_ETHERNET 6
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#define IRQ_PRIO_USBDEV 5
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/* Minimum stack size for UCOS-III Tasks */
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#define UCOS_MIN_STACK_SZ 128
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/*
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* Offset of M0 image from the starting of M4 image
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* Usually the size allocated for M0 image in scatter
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* file/ Linker Definition file / Memory configuration
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* in the IDE.
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* ####Don't change this value unless you are sure about what you are doing ####
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*/
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#define M0_IMAGE_OFFSET 0x40000
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/*
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* Absolute addresses used by both cores.
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* ####Don't change these values unless you are sure about what you are doing ####
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*/
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#define SHARED_MEM_M0 0x20000000
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#define SHARED_MEM_M4 0x20000020
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/* Size & location of RAM DISK used by FAT Filesystem */
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#define RAMDISK_LOCATION 0x20002000
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#define RAMDISK_SIZE 0x2000
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#ifdef CORE_M4
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/* Delay and LED to be blinked by M4 Core */
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#define BLINKY_DEFAULT_DELAY 1000
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#define BLINK_LED 1
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#endif /* CORE_M4 */
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#ifdef CORE_M0
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/* Delay and LED to be blinked by M4 Core */
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#define BLINK_LED 0
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#define BLINKY_DEFAULT_DELAY 500
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#endif /* CORE_M0 */
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/* Base address of various flashes */
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#define SPIFI_BASE_ADDR 0x14000000
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#define XFLASH_BASE_ADDR 0x1C000000
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#define IFLASH_BASE_ADDR 0x1A000000
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/* Include Common header here */
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#include "dualcore_common.h"
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#endif /* ifndef __LPC43XX_DUALCORE_CONFIG_H_ */
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