Ha Thach
GitHub
commit
29f42903f3
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@ -86,6 +86,7 @@ This code base already had supported for a handful of following boards (sorted a
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- [LPCXpresso 54114](https://www.nxp.com/design/microcontrollers-developer-resources/lpcxpresso-boards/lpcxpresso54114-board:OM13089)
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- [LPCXpresso 55s69 EVK](https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc5500-cortex-m33/lpcxpresso55s69-development-board:LPC55S69-EVK)
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- [NGX LPC4330-Xplorer](https://www.nxp.com/design/designs/lpc4330-xplorer-board:OM13027)
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- [Double M33 Express](https://www.crowdsupply.com/steiert-solutions/double-m33-express)
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### Sony
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@ -0,0 +1,234 @@
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/*
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** ###################################################################
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** Processors: LPC55S69JBD100_cm33_core0
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** LPC55S69JBD64_cm33_core0
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** LPC55S69JEV98_cm33_core0
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**
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** Compiler: GNU C Compiler
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** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019
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** Version: rev. 1.1, 2019-05-16
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** Build: b191008
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**
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** Abstract:
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** Linker file for the GNU C Compiler
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**
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** Copyright 2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2019 NXP
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** All rights reserved.
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**
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** ###################################################################
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
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STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800;
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RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x1800 : 0;
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/* Specify the memory areas */
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MEMORY
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{
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m_interrupts (RX) : ORIGIN = 0x00010000, LENGTH = 0x00000200
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m_text (RX) : ORIGIN = 0x00010200, LENGTH = 0x0007FE00
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m_core1_image (RX) : ORIGIN = 0x00090000, LENGTH = 0x00008000
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m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00033000 - RPMSG_SHMEM_SIZE
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rpmsg_sh_mem (RW) : ORIGIN = 0x20033000 - RPMSG_SHMEM_SIZE, LENGTH = RPMSG_SHMEM_SIZE
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m_usb_sram (RW) : ORIGIN = 0x40100000, LENGTH = 0x00004000
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}
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/* Define output sections */
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SECTIONS
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{
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/* section for storing the secondary core image */
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.m0code :
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{
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. = ALIGN(4) ;
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KEEP (*(.m0code))
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*(.m0code*)
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. = ALIGN(4) ;
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} > m_core1_image
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/* NOINIT section for rpmsg_sh_mem */
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.noinit_rpmsg_sh_mem (NOLOAD) : ALIGN(4)
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{
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__RPMSG_SH_MEM_START__ = .;
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*(.noinit.$rpmsg_sh_mem*)
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. = ALIGN(4) ;
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__RPMSG_SH_MEM_END__ = .;
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} > rpmsg_sh_mem
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/* The startup code goes first into internal flash */
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.interrupts :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} > m_interrupts
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/* The program code and other data goes into internal flash */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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} > m_text
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > m_text
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.ARM :
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{
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} > m_text
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.ctors :
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{
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__CTOR_LIST__ = .;
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/* gcc uses crtbegin.o to find the start of
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the constructors, so we make sure it is
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first. Because this is a wildcard, it
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doesn't matter if the user does not
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actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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doesn't matter which directory crtbegin.o
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is in. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*crtbegin?.o(.ctors))
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/* We don't want to include the .ctor section from
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from the crtend.o file until after the sorted ctors.
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The .ctor section from the crtend file contains the
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end of ctors marker and it must be last */
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KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__CTOR_END__ = .;
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} > m_text
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.dtors :
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{
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__DTOR_LIST__ = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*crtbegin?.o(.dtors))
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KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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__DTOR_END__ = .;
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} > m_text
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} > m_text
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} > m_text
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} > m_text
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__etext = .; /* define a global symbol at end of code */
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__DATA_ROM = .; /* Symbol is used by startup for data initialization */
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.data : AT(__DATA_ROM)
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{
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. = ALIGN(4);
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__DATA_RAM = .;
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__data_start__ = .; /* create a global symbol at data start */
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*(.ramfunc*) /* for functions in ram */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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KEEP(*(.jcr*))
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. = ALIGN(4);
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__data_end__ = .; /* define a global symbol at data end */
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} > m_data
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__DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
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text_end = ORIGIN(m_text) + LENGTH(m_text);
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ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
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/* Uninitialized data section */
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss section */
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. = ALIGN(4);
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__START_BSS = .;
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__bss_start__ = .;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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__END_BSS = .;
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} > m_data
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.heap :
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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__HeapBase = .;
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. += HEAP_SIZE;
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__HeapLimit = .;
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__heap_limit = .; /* Add for _sbrk */
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} > m_data
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.stack :
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{
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. = ALIGN(8);
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. += STACK_SIZE;
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} > m_data
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m_usb_bdt (NOLOAD) :
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{
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. = ALIGN(512);
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*(m_usb_bdt)
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} > m_usb_sram
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m_usb_global (NOLOAD) :
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{
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*(m_usb_global)
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} > m_usb_sram
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/* Initializes stack on the end of block */
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__StackTop = ORIGIN(m_data) + LENGTH(m_data);
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__StackLimit = __StackTop - STACK_SIZE;
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PROVIDE(__stack = __StackTop);
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.ARM.attributes 0 : { *(.ARM.attributes) }
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ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
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}
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@ -0,0 +1,51 @@
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CFLAGS += \
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-flto \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m33 \
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-mfloat-abi=hard \
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-mfpu=fpv5-sp-d16 \
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-DCPU_LPC55S69JBD100_cm33_core0 \
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-DCFG_TUSB_MCU=OPT_MCU_LPC55XX \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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# mcu driver cause following warnings
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CFLAGS += -Wno-error=unused-parameter -Wno-error=float-equal
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MCU_DIR = hw/mcu/nxp/sdk/devices/LPC55S69
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/$(BOARD)/LPC55S69_cm33_core0_uf2.ld
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SRC_C += \
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$(MCU_DIR)/system_LPC55S69_cm33_core0.c \
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$(MCU_DIR)/drivers/fsl_clock.c \
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$(MCU_DIR)/drivers/fsl_gpio.c \
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$(MCU_DIR)/drivers/fsl_power.c \
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$(MCU_DIR)/drivers/fsl_reset.c \
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$(MCU_DIR)/drivers/fsl_usart.c \
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$(MCU_DIR)/drivers/fsl_flexcomm.c
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INC += \
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$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
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$(TOP)/$(MCU_DIR) \
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$(TOP)/$(MCU_DIR)/drivers
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SRC_S += $(MCU_DIR)/gcc/startup_LPC55S69_cm33_core0.S
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LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
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# For TinyUSB port source
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VENDOR = nxp
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CHIP_FAMILY = lpc_ip3511
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM33_NTZ/non_secure
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# For flash-jlink target
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JLINK_DEVICE = LPC55S69
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# flash using pyocd
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flash: $(BUILD)/$(BOARD)-firmware.hex
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pyocd flash -t LPC55S69 $<
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@ -0,0 +1,400 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018, hathach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "../board.h"
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#include "fsl_device_registers.h"
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#include "fsl_gpio.h"
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#include "fsl_power.h"
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#include "fsl_iocon.h"
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#include "fsl_sctimer.h"
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
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//--------------------------------------------------------------------+
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void USB0_IRQHandler(void)
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{
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tud_int_handler(0);
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}
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void USB1_IRQHandler(void)
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{
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tud_int_handler(1);
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}
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM
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//--------------------------------------------------------------------+
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#define LED_PORT 0
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#define LED_PIN 1
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#define LED_STATE_ON 1
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// WAKE button
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#define BUTTON_PORT 0
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#define BUTTON_PIN 5
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#define BUTTON_STATE_ACTIVE 0
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// Number of neopixels
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#define NEOPIXEL_NUMBER 2
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#define NEOPIXEL_PORT 0
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#define NEOPIXEL_PIN 27
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// UART
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#define UART_DEV USART0
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// IOCON pin mux
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#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */
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#define IOCON_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */
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#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */
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#define IOCON_PIO_FUNC4 0x04u /*!<@brief Selects pin function 4 */
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#define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */
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#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
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#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
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#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
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#define IOCON_PIO_DIG_FUNC0_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC0) /*!<@brief Digital pin function 0 enabled */
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#define IOCON_PIO_DIG_FUNC1_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC1) /*!<@brief Digital pin function 1 enabled */
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#define IOCON_PIO_DIG_FUNC4_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC4) /*!<@brief Digital pin function 2 enabled */
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#define IOCON_PIO_DIG_FUNC7_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC7) /*!<@brief Digital pin function 2 enabled */
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//--------------------------------------------------------------------+
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// Neopixel Driver
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//--------------------------------------------------------------------+
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#define NEO_SCT SCT0
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#define NEO_MATCH_PERIOD 0
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#define NEO_MATCH_0 1
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#define NEO_MATCH_1 2
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#define NEO_EVENT_RISE 2
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#define NEO_EVENT_FALL_0 0
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#define NEO_EVENT_FALL_1 1
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#define NEO_EVENT_NEXT 3
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#define NEO_EVENT_START 4
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#define NEO_SCT_OUTPUT 6
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#define NEO_STATE_IDLE 24
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//#define NEO_ARRAY_SIZE (3 * NEOPIXEL_NUMBER)
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//volatile uint32_t _neopixel_array[NEO_ARRAY_SIZE] = {0x10, 0x20, 0x30, 0x40, 0x50, 0x60};
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volatile uint32_t _neopixel_array[NEOPIXEL_NUMBER] = {0x404040, 0x202020};
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volatile uint32_t _neopixel_count = 0;
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void neopixel_int_handler(void){
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uint32_t eventFlag = NEO_SCT->EVFLAG;
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if (eventFlag & (1 << NEO_EVENT_NEXT)) {
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_neopixel_count += 1;
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if (_neopixel_count < (NEOPIXEL_NUMBER)) {
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NEO_SCT->EV[NEO_EVENT_FALL_0].STATE = 0xFFFFFF & (~_neopixel_array[_neopixel_count]);
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NEO_SCT->CTRL &= ~(SCT_CTRL_HALT_L_MASK);
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}
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}
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||||
NEO_SCT->EVFLAG = eventFlag;
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||||
}
|
||||
|
||||
void SCT0_DriverIRQHandler(void){
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neopixel_int_handler();
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SDK_ISR_EXIT_BARRIER;
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||||
}
|
||||
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||||
void neopixel_set(uint32_t pixel, uint32_t color){
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if (pixel < NEOPIXEL_NUMBER) {
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_neopixel_array[pixel] = color;
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}
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||||
}
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||||
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||||
void neopixel_update(void){
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// while (NEO_SCT->CTRL & SCT_CTRL_HALT_L_MASK);
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_neopixel_count = 0;
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||||
NEO_SCT->EV[NEO_EVENT_FALL_0].STATE = 0xFFFFFF & (~_neopixel_array[0]);
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||||
NEO_SCT->CTRL &= ~(SCT_CTRL_HALT_L_MASK);
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||||
}
|
||||
|
||||
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||||
/*
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||||
void neopixel_int_handler(void){
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||||
uint32_t eventFlag = NEO_SCT->EVFLAG;
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||||
// if ((eventFlag & (1 << NEO_EVENT_NEXT)) && (_neopixel_count < (NEO_ARRAY_SIZE))) {
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||||
// NEO_SCT->EV[NEO_EVENT_FALL_0].STATE = 0xFF & (~_neopixel_array[_neopixel_count]);
|
||||
if ((eventFlag & (1 << NEO_EVENT_NEXT)) && (_neopixel_count < (NEOPIXEL_NUMBER))) {
|
||||
_neopixel_count += 1;
|
||||
NEO_SCT->EV[NEO_EVENT_FALL_0].STATE = 0xFFFFFF & (~_neopixel_array[_neopixel_count]);
|
||||
NEO_SCT->EVFLAG = eventFlag;
|
||||
NEO_SCT->CTRL &= ~(SCT_CTRL_HALT_L_MASK);
|
||||
} else {
|
||||
NEO_SCT->EVFLAG = eventFlag;
|
||||
}
|
||||
}
|
||||
|
||||
void SCT0_DriverIRQHandler(void){
|
||||
neopixel_int_handler();
|
||||
SDK_ISR_EXIT_BARRIER;
|
||||
}
|
||||
|
||||
void neopixel_update(uint32_t pixel, uint32_t color){
|
||||
if (pixel < NEOPIXEL_NUMBER) {
|
||||
_neopixel_array[pixel] = color;
|
||||
_neopixel_count = 0;
|
||||
// NEO_SCT->EV[NEO_EVENT_FALL_0].STATE = 0xFF & (~_neopixel_array[0]);
|
||||
NEO_SCT->EV[NEO_EVENT_FALL_0].STATE = 0xFFFFFF & (~_neopixel_array[0]);
|
||||
NEO_SCT->CTRL &= ~(SCT_CTRL_HALT_L_MASK);
|
||||
}
|
||||
}
|
||||
*/
|
||||
void neopixel_init(void) {
|
||||
CLOCK_EnableClock(kCLOCK_Sct0);
|
||||
RESET_PeripheralReset(kSCT0_RST_SHIFT_RSTn);
|
||||
|
||||
NEO_SCT->CONFIG = (
|
||||
SCT_CONFIG_UNIFY(1) |
|
||||
SCT_CONFIG_CLKMODE(kSCTIMER_System_ClockMode) |
|
||||
SCT_CONFIG_NORELOAD_L(1) );
|
||||
NEO_SCT->CTRL = (
|
||||
SCT_CTRL_HALT_L(1) |
|
||||
SCT_CTRL_CLRCTR_L(1) );
|
||||
|
||||
NEO_SCT->MATCH[NEO_MATCH_PERIOD] = 120;
|
||||
NEO_SCT->MATCH[NEO_MATCH_0] = 30;
|
||||
NEO_SCT->MATCH[NEO_MATCH_1] = 60;
|
||||
NEO_SCT->EV[NEO_EVENT_START].STATE = (1 << NEO_STATE_IDLE);
|
||||
NEO_SCT->EV[NEO_EVENT_START].CTRL = (
|
||||
kSCTIMER_OutputLowEvent | SCT_EV_CTRL_IOSEL(NEO_SCT_OUTPUT) |
|
||||
SCT_EV_CTRL_STATELD(1) | SCT_EV_CTRL_STATEV(23));
|
||||
// NEO_SCT->EV[NEO_EVENT_RISE].STATE = 0xFE;
|
||||
NEO_SCT->EV[NEO_EVENT_RISE].STATE = 0xFFFFFE;
|
||||
NEO_SCT->EV[NEO_EVENT_RISE].CTRL = (
|
||||
kSCTIMER_MatchEventOnly | SCT_EV_CTRL_MATCHSEL(NEO_MATCH_PERIOD) |
|
||||
SCT_EV_CTRL_STATELD(0) | SCT_EV_CTRL_STATEV(31));
|
||||
NEO_SCT->EV[NEO_EVENT_FALL_0].STATE = 0x0;
|
||||
NEO_SCT->EV[NEO_EVENT_FALL_0].CTRL = (
|
||||
kSCTIMER_MatchEventOnly | SCT_EV_CTRL_MATCHSEL(NEO_MATCH_0) |
|
||||
SCT_EV_CTRL_STATELD(0) );
|
||||
// NEO_SCT->EV[NEO_EVENT_FALL_1].STATE = 0xFF;
|
||||
NEO_SCT->EV[NEO_EVENT_FALL_1].STATE = 0xFFFFFF;
|
||||
NEO_SCT->EV[NEO_EVENT_FALL_1].CTRL = (
|
||||
kSCTIMER_MatchEventOnly | SCT_EV_CTRL_MATCHSEL(NEO_MATCH_1) |
|
||||
SCT_EV_CTRL_STATELD(0) );
|
||||
NEO_SCT->EV[NEO_EVENT_NEXT].STATE = 0x1;
|
||||
NEO_SCT->EV[NEO_EVENT_NEXT].CTRL = (
|
||||
kSCTIMER_MatchEventOnly | SCT_EV_CTRL_MATCHSEL(NEO_MATCH_PERIOD) |
|
||||
SCT_EV_CTRL_STATELD(1) | SCT_EV_CTRL_STATEV(NEO_STATE_IDLE));
|
||||
|
||||
NEO_SCT->LIMIT = (1 << NEO_EVENT_START) | (1 << NEO_EVENT_RISE) | (1 << NEO_EVENT_NEXT);
|
||||
NEO_SCT->HALT = (1 << NEO_EVENT_NEXT);
|
||||
NEO_SCT->START = (1 << NEO_EVENT_START);
|
||||
|
||||
NEO_SCT->OUT[NEO_SCT_OUTPUT].SET = (1 << NEO_EVENT_START) | (1 << NEO_EVENT_RISE);
|
||||
NEO_SCT->OUT[NEO_SCT_OUTPUT].CLR = (1 << NEO_EVENT_FALL_0) | (1 << NEO_EVENT_FALL_1) | (1 << NEO_EVENT_NEXT);
|
||||
|
||||
NEO_SCT->STATE = NEO_STATE_IDLE;
|
||||
NEO_SCT->OUTPUT = 0x0;
|
||||
NEO_SCT->RES = SCT_RES_O6RES(0x2);
|
||||
NEO_SCT->EVEN = (1 << NEO_EVENT_NEXT);
|
||||
EnableIRQ(SCT0_IRQn);
|
||||
|
||||
neopixel_set(0, 0x101000);
|
||||
neopixel_set(1, 0x101000);
|
||||
neopixel_update();
|
||||
}
|
||||
|
||||
|
||||
/****************************************************************
|
||||
name: BOARD_BootClockFROHF96M
|
||||
outputs:
|
||||
- {id: SYSTICK_clock.outFreq, value: 96 MHz}
|
||||
- {id: System_clock.outFreq, value: 96 MHz}
|
||||
settings:
|
||||
- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
|
||||
sources:
|
||||
- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
|
||||
******************************************************************/
|
||||
void BootClockFROHF96M(void)
|
||||
{
|
||||
/*!< Set up the clock sources */
|
||||
/*!< Set up FRO */
|
||||
POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on */
|
||||
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
|
||||
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
|
||||
accidentally being below the voltage for current speed */
|
||||
|
||||
CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
|
||||
|
||||
POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
|
||||
CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
|
||||
|
||||
/*!< Set up dividers */
|
||||
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
|
||||
|
||||
/*!< Set up clock selectors - Attach clocks to the peripheries */
|
||||
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
|
||||
|
||||
/*!< Set SystemCoreClock variable. */
|
||||
SystemCoreClock = 96000000U;
|
||||
}
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
// Enable IOCON clock
|
||||
CLOCK_EnableClock(kCLOCK_Iocon);
|
||||
|
||||
// Init 96 MHz clock
|
||||
BootClockFROHF96M();
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
GPIO_PortInit(GPIO, 0);
|
||||
GPIO_PortInit(GPIO, 1);
|
||||
|
||||
// LED
|
||||
/* PORT0 PIN1 configured as PIO0_1 */
|
||||
IOCON_PinMuxSet(IOCON, 0U, 1U, IOCON_PIO_DIG_FUNC0_EN);
|
||||
|
||||
gpio_pin_config_t const led_config = { kGPIO_DigitalOutput, 1};
|
||||
GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config);
|
||||
|
||||
// Neopixel
|
||||
/* PORT0 PIN27 configured as SCT0_OUT6 */
|
||||
IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN);
|
||||
|
||||
neopixel_init();
|
||||
|
||||
// Button
|
||||
/* PORT0 PIN5 configured as PIO0_5 */
|
||||
IOCON_PinMuxSet(IOCON, BUTTON_PORT, BUTTON_PIN, IOCON_PIO_DIG_FUNC0_EN);
|
||||
|
||||
gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
|
||||
GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config);
|
||||
|
||||
// UART
|
||||
/* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
|
||||
IOCON_PinMuxSet(IOCON, 0U, 29U, IOCON_PIO_DIG_FUNC1_EN);
|
||||
/* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
|
||||
IOCON_PinMuxSet(IOCON, 0U, 30U, IOCON_PIO_DIG_FUNC1_EN);
|
||||
|
||||
#if defined(UART_DEV) && CFG_TUSB_DEBUG
|
||||
// Enable UART when debug log is on
|
||||
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
|
||||
usart_config_t uart_config;
|
||||
USART_GetDefaultConfig(&uart_config);
|
||||
uart_config.baudRate_Bps = BOARD_UART_BAUDRATE;
|
||||
uart_config.enableTx = true;
|
||||
uart_config.enableRx = true;
|
||||
USART_Init(UART_DEV, &uart_config, 12000000);
|
||||
#endif
|
||||
|
||||
// USB VBUS
|
||||
/* PORT0 PIN22 configured as USB0_VBUS */
|
||||
IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN);
|
||||
|
||||
// USB Controller
|
||||
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB0 Phy */
|
||||
POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); /*< Turn on USB1 Phy */
|
||||
|
||||
/* reset the IP to make sure it's in reset state. */
|
||||
RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB1H_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB1D_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn);
|
||||
|
||||
#if (defined CFG_TUSB_RHPORT1_MODE) && (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
|
||||
CLOCK_EnableClock(kCLOCK_Usbh1);
|
||||
/* Put PHY powerdown under software control */
|
||||
USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK;
|
||||
/* According to reference mannual, device mode setting has to be set by access usb host register */
|
||||
USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK;
|
||||
/* enable usb1 host clock */
|
||||
CLOCK_DisableClock(kCLOCK_Usbh1);
|
||||
#endif
|
||||
|
||||
#if (defined CFG_TUSB_RHPORT0_MODE) && (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
|
||||
// Enable USB Clock Adjustments to trim the FRO for the full speed controller
|
||||
ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
|
||||
CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
|
||||
CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
|
||||
/* enable usb0 host clock */
|
||||
CLOCK_EnableClock(kCLOCK_Usbhsl0);
|
||||
/*According to reference mannual, device mode setting has to be set by access usb host register */
|
||||
USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
|
||||
/* disable usb0 host clock */
|
||||
CLOCK_DisableClock(kCLOCK_Usbhsl0);
|
||||
CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB Device clock */
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||
if (state) {
|
||||
neopixel_set(0, 0x100000);
|
||||
neopixel_set(1, 0x101010);
|
||||
} else {
|
||||
neopixel_set(0, 0x001000);
|
||||
neopixel_set(1, 0x000010);
|
||||
}
|
||||
neopixel_update();
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
// active low
|
||||
return BUTTON_STATE_ACTIVE == GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN);
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
Loading…
Reference in New Issue