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board_stm32h743nucleo: Route major clocks and LED pins.

This commit is contained in:
William D. Jones 2019-08-26 14:19:48 -04:00
parent 0fb9ab9a09
commit 1ef98e503a
1 changed files with 92 additions and 1 deletions
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93
hw/bsp/stm32h743nucleo/board_stm32h743nucleo.c
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@ -30,15 +30,106 @@
#include "stm32h7xx.h"
#include "stm32h7xx_hal_conf.h"
#define LED_PORT GPIOB
#define LED_PIN GPIO_PIN_0
/* PWR, RCC, GPIO (All): AHB4 (D3 domain)
USB{1,2} OTG_{H,F}S: AHB1 (D2 domain)
*/
/**
* @brief System Clock Configuration
* The system Clock is configured as follows :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 168000000
* ACLK(Hz) = 168000000
* HCLK(Hz) = 168000000
* AHB1-4 Prescaler = 1
* APB1 Prescaler (Domain 2) = 2
* APB2 Prescaler (Domain 2) = 2
* APB3 Prescaler (Domain 1) = 2
* APB4 Prescaler (Domain 3) = 2
* HSE Frequency(Hz) = 8000000
* PLL1_M = 8
* PLL1_N = 336
* PLL1_P = 2
* PLL1_Q = Unused (TODO: figure out how
* to gate from HAL?)
* VDD(V) = 3.3
* Main regulator output voltage = Scale3 mode
* Flash Latency(WS) = 4
* @param None
* @retval None
*/
static void SystemClock_Config(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
/* The PWR block is always enabled on the H7 series- there is no clock
enable. For now, use the default VOS3 scale mode (lowest) and limit clock
frequencies to avoid potential current draw problems from bus
power when using the max clock speeds throughout the chip. */
/* Enable HSE Oscillator and activate PLL1 with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_0;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
RCC_OscInitStruct.PLL.PLLFRACN = 0;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | \
RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | \
RCC_CLOCKTYPE_D3PCLK1);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
/* Unlike on the STM32F4 family, it appears the maximum APB frequencies are
device-dependent- 120 MHz for this board according to Figure 2 of
the datasheet. Dividing by half will be safe for now. */
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
/* 4 wait states required for 168MHz and VOS3. */
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
/* Like on F4, on H7, USB's actual peripheral clock and bus clock are
separate. However, the main system PLL (PLL1) doesn't have a direct
connection to the USB peripheral clock to generate 48 MHz, so we do this
dance. */
}
void board_init(void)
{
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#endif
SystemClock_Config();
SystemCoreClockUpdate();
GPIO_InitTypeDef GPIO_InitStruct;
__HAL_RCC_GPIOB_CLK_ENABLE();
GPIO_InitStruct.Pin = LED_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
}
//--------------------------------------------------------------------+
@ -47,7 +138,7 @@ void board_init(void)
void board_led_write(bool state)
{
SystemClock_Config();
HAL_GPIO_WritePin(LED_PORT, LED_PIN, state);
}
uint32_t board_button_read(void)