remove legacy blocking usbh_control_xfer()
reworking cdc host driver
This commit is contained in:
hathach
parent
2efdc2fb64
commit
14461beffa
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@ -51,9 +51,14 @@ typedef struct {
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//--------------------------------------------------------------------+
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static cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX];
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static inline cdch_data_t* get_itf(uint8_t dev_addr)
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{
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return &cdch_data[dev_addr-1];
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}
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bool tuh_cdc_mounted(uint8_t dev_addr)
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{
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cdch_data_t* cdc = &cdch_data[dev_addr-1];
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cdch_data_t* cdc = get_itf(dev_addr);
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return cdc->ep_in && cdc->ep_out;
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}
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@ -61,7 +66,7 @@ bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid)
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{
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if ( !tuh_cdc_mounted(dev_addr) ) return false;
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cdch_data_t const * p_cdc = &cdch_data[dev_addr-1];
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cdch_data_t const * p_cdc = get_itf(dev_addr);
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switch (pipeid)
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{
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@ -111,6 +116,27 @@ bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is
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return hcd_pipe_xfer(dev_addr, ep_in, p_buffer, length, is_notify);
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}
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bool tuh_cdc_set_control_line_state(uint8_t dev_addr, bool dtr, bool rts, tuh_control_complete_cb_t complete_cb)
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{
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cdch_data_t const * p_cdc = get_itf(dev_addr);
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tusb_control_request_t const request =
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{
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.bmRequestType_bit =
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{
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.recipient = TUSB_REQ_RCPT_INTERFACE,
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.type = TUSB_REQ_TYPE_CLASS,
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.direction = TUSB_DIR_OUT
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},
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.bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
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.wValue = (rts ? 2 : 0) | (dtr ? 1 : 0),
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.wIndex = p_cdc->itf_num,
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.wLength = 0
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};
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TU_ASSERT( tuh_control_xfer(dev_addr, &request, NULL, complete_cb) );
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return true;
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}
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//--------------------------------------------------------------------+
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// USBH-CLASS DRIVER API
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//--------------------------------------------------------------------+
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@ -132,7 +158,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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cdch_data_t * p_cdc;
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p_desc = tu_desc_next(itf_desc);
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p_cdc = &cdch_data[dev_addr-1];
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p_cdc = get_itf(dev_addr);
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p_cdc->itf_num = itf_desc->bInterfaceNumber;
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p_cdc->itf_protocol = itf_desc->bInterfaceProtocol; // TODO 0xff is consider as rndis candidate, other is virtual Com
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@ -194,18 +220,12 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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}
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}
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// FIXME move to seperate API : connect
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tusb_control_request_t request =
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{
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.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT },
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.bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
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.wValue = 0x03, // dtr on, cst on
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.wIndex = p_cdc->itf_num,
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.wLength = 0
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};
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TU_ASSERT( usbh_control_xfer(dev_addr, &request, NULL) );
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return true;
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}
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bool cdch_set_config(uint8_t dev_addr, uint8_t itf_num)
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{
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(void) dev_addr; (void) itf_num;
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return true;
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}
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@ -218,7 +238,7 @@ bool cdch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
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void cdch_close(uint8_t dev_addr)
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{
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cdch_data_t * p_cdc = &cdch_data[dev_addr-1];
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cdch_data_t * p_cdc = get_itf(dev_addr);
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tu_memclr(p_cdc, sizeof(cdch_data_t));
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}
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@ -44,6 +44,18 @@
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* \defgroup CDC_Serial_Host Host
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* @{ */
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bool tuh_cdc_set_control_line_state(uint8_t dev_addr, bool dtr, bool rts, tuh_control_complete_cb_t complete_cb);
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static inline bool tuh_cdc_connect(uint8_t dev_addr, tuh_control_complete_cb_t complete_cb)
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{
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return tuh_cdc_set_control_line_state(dev_addr, true, true, complete_cb);
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}
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static inline bool tuh_cdc_disconnect(uint8_t dev_addr, tuh_control_complete_cb_t complete_cb)
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{
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return tuh_cdc_set_control_line_state(dev_addr, false, false, complete_cb);
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}
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/** \brief Check if device support CDC Serial interface or not
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* \param[in] dev_addr device address
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* \retval true if device supports
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@ -113,6 +125,7 @@ void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_i
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//--------------------------------------------------------------------+
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void cdch_init(void);
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bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length);
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bool cdch_set_config(uint8_t dev_addr, uint8_t itf_num);
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bool cdch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
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void cdch_close(uint8_t dev_addr);
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@ -56,6 +56,7 @@ static usbh_class_driver_t const usbh_class_drivers[] =
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.class_code = TUSB_CLASS_CDC,
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.init = cdch_init,
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.open = cdch_open,
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.set_config = cdch_set_config,
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.xfer_cb = cdch_xfer_cb,
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.close = cdch_close
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},
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@ -174,9 +175,6 @@ bool tuh_init(void)
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{
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usbh_device_t * const dev = &_usbh_devices[i];
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dev->control.sem_hdl = osal_semaphore_create(&dev->control.sem_def);
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TU_ASSERT(dev->control.sem_hdl != NULL);
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#if CFG_TUSB_OS != OPT_OS_NONE
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dev->mutex = osal_mutex_create(&dev->mutexdef);
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TU_ASSERT(dev->mutex);
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@ -199,38 +197,6 @@ bool tuh_init(void)
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return true;
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}
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//------------- USBH control transfer -------------//
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// TODO remove
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bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data)
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{
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usbh_device_t* dev = &_usbh_devices[dev_addr];
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const uint8_t rhport = dev->rhport;
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dev->control.request = *request;
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dev->control.pipe_status = 0;
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// Setup Stage
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hcd_setup_send(rhport, dev_addr, (uint8_t*) &dev->control.request);
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TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
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// Data stage : first data toggle is always 1
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if ( request->wLength )
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{
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hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, request->bmRequestType_bit.direction), data, request->wLength);
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TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
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}
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// Status : data toggle is always 1
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hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0);
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TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
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if ( XFER_RESULT_STALLED == dev->control.pipe_status ) return false;
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if ( XFER_RESULT_FAILED == dev->control.pipe_status ) return false;
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return true;
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}
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bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr)
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{
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uint8_t const epnum = tu_edpt_number(ep_addr);
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@ -291,9 +257,6 @@ bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_
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bool usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
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{
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osal_semaphore_reset( _usbh_devices[dev_addr].control.sem_hdl );
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//osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl );
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tusb_desc_endpoint_t ep0_desc =
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{
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.bLength = sizeof(tusb_desc_endpoint_t),
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@ -349,15 +312,6 @@ void hcd_event_handler(hcd_event_t const* event, bool in_isr)
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// interrupt caused by a TD (with IOC=1) in pipe of class class_code
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void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t xferred_bytes, xfer_result_t result, bool in_isr)
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{
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usbh_device_t* dev = &_usbh_devices[ dev_addr ];
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if (0 == tu_edpt_number(ep_addr))
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{
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dev->control.pipe_status = result;
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// usbh_devices[ pipe_hdl.dev_addr ].control.xferred_bytes = xferred_bytes; not yet neccessary
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osal_semaphore_post( dev->control.sem_hdl, true ); // FIXME post within ISR
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}
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hcd_event_t event =
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{
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.rhport = 0, // TODO correct rhport
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@ -75,16 +75,6 @@ typedef struct {
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volatile uint8_t state; // device state, value from enum tusbh_device_state_t
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//------------- control pipe -------------//
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struct {
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volatile uint8_t pipe_status;
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// uint8_t xferred_bytes; TODO not yet necessary
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tusb_control_request_t request;
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osal_semaphore_def_t sem_def;
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osal_semaphore_t sem_hdl; // used to synchronize with HCD when control xfer complete
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} control;
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uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid)
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uint8_t ep2drv[CFG_TUH_EP_MAX][2]; // map endpoint to driver ( 0xff is invalid )
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