2021-03-28 09:45:53 +02:00
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DEPS_SUBMODULES += hw/mcu/renesas
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2021-03-04 17:38:49 +01:00
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CFLAGS += \
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-nostartfiles \
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-ffunction-sections \
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-fdata-sections \
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2021-03-27 16:10:53 +01:00
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-fshort-enums \
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2021-03-04 17:38:49 +01:00
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-mcpu=rx610 \
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-misa=v1 \
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-mlittle-endian-data \
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-DCFG_TUSB_MCU=OPT_MCU_RX63X
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# Cross Compiler for RX
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CROSS_COMPILE = rx-elf-
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2021-03-27 14:20:15 +01:00
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RX_NEWLIB ?= 1
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2021-03-04 17:38:49 +01:00
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ifeq ($(CMDEXE),1)
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OPTLIBINC="$(shell for /F "usebackq delims=" %%i in (`where rx-elf-gcc`) do echo %%~dpi..\rx-elf\optlibinc)"
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else
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OPTLIBINC=$(shell dirname `which rx-elf-gcc`)../rx-elf/optlibinc
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endif
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2021-03-27 14:20:15 +01:00
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ifeq ($(RX_NEWLIB),1)
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CFLAGS += -DSSIZE_MAX=__INT_MAX__
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else
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2021-03-27 11:12:34 +01:00
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# setup for optlib
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CFLAGS += -nostdinc \
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-isystem $(OPTLIBINC) \
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-DLWIP_NO_INTTYPES_H
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2021-03-04 17:38:49 +01:00
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2021-03-27 11:12:34 +01:00
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LIBS += -loptc -loptm
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endif
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2021-03-04 17:38:49 +01:00
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MCU_DIR = hw/mcu/renesas/rx63n
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# All source paths should be relative to the top level.
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2021-03-29 18:54:44 +02:00
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LD_FILE = $(BOARD_PATH)/r5f5631fd.ld
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2021-03-04 17:38:49 +01:00
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SRC_C += \
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2021-03-23 16:53:55 +01:00
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src/portable/renesas/usba/dcd_usba.c \
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2021-03-04 17:38:49 +01:00
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$(MCU_DIR)/vects.c
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INC += \
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2021-03-29 18:54:44 +02:00
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$(TOP)/$(BOARD_PATH) \
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2021-03-04 17:38:49 +01:00
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$(TOP)/$(MCU_DIR)
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SRC_S += $(MCU_DIR)/start.S
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# For freeRTOS port source
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FREERTOS_PORT = RX600
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# For flash-jlink target
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JLINK_DEVICE = R5F5631F
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JLINK_IF = JTAG
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# For flash-pyocd target
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PYOCD_TARGET =
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# flash using jlink
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flash: flash-jlink
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