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sch/brd: fix 6-40V feedback

This commit is contained in:
King Kévin 2022-10-15 15:37:47 +02:00
parent 08382b5221
commit 1e3a18c7b2
8 changed files with 29199 additions and 24964 deletions
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125
usb_hub-dfp1.sch
View File

@ -5,17 +5,17 @@ T 46500 51100 5 10 1 1 0 0 1
netname=PWR1 netname=PWR1
} }
C 45700 48900 1 0 0 VTRG.sym C 45700 48900 1 0 0 VTRG.sym
C 48300 45900 1 90 0 BSS138.sym C 49900 45900 1 90 0 BSS138.sym
{ {
T 48300 45900 5 8 0 0 90 0 1 T 49900 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 48300 45900 5 10 0 1 90 0 1 T 49900 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 48300 45900 5 10 0 0 90 0 1 T 49900 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 47460 47140 5 10 1 1 180 6 1 T 48960 47140 5 10 1 1 180 6 1
refdes=Q103 refdes=Q103
T 48060 46740 5 10 1 1 90 8 1 T 49660 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
C 46100 47900 1 270 1 40P05.sym C 46100 47900 1 270 1 40P05.sym
@ -33,10 +33,10 @@ refdes=Q106
T 46340 48740 5 10 1 1 270 2 1 T 46340 48740 5 10 1 1 270 2 1
device=40P05 device=40P05
} }
C 48500 46800 1 90 0 GND.sym C 50100 46800 1 90 0 GND.sym
N 47100 45700 47900 45700 4 N 48700 45700 49500 45700 4
{ {
T 47200 45700 5 10 1 1 0 0 1 T 48800 45700 5 10 1 1 0 0 1
netname=POW1 netname=POW1
} }
N 46300 49900 47000 49900 4 N 46300 49900 47000 49900 4
@ -61,29 +61,29 @@ refdes=J101
T 58500 47800 5 10 1 1 0 6 1 T 58500 47800 5 10 1 1 0 6 1
value=USB-A 2.0 RECEPTACLE value=USB-A 2.0 RECEPTACLE
} }
C 51000 48400 1 0 1 pwrjack-2.sym C 51500 48400 1 0 1 pwrjack-2.sym
{ {
T 51000 49300 5 10 0 0 0 6 1 T 51500 49300 5 10 0 0 0 6 1
device=PWRJACK device=PWRJACK
T 51000 49500 5 10 0 0 0 6 1 T 51500 49500 5 10 0 0 0 6 1
footprint=CONNECTOR_DC-005_2.0.lht footprint=CONNECTOR_DC-005_2.0.lht
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
lcsc=C16214 lcsc=C16214
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm
T 51000 49100 5 10 1 1 0 6 1 T 51500 49100 5 10 1 1 0 6 1
refdes=J102 refdes=J102
T 51000 48200 5 10 1 1 0 6 1 T 51500 48200 5 10 1 1 0 6 1
value=OUT 6-40V value=OUT 6-40V
} }
C 49700 48600 1 270 0 GND.sym C 50200 48600 1 270 0 GND.sym
C 49900 48800 1 180 0 nc-right-1.sym C 50400 48800 1 180 0 nc-right-1.sym
{ {
T 49800 48300 5 10 0 0 180 0 1 T 50300 48300 5 10 0 0 180 0 1
value=NoConnection value=NoConnection
T 49800 48100 5 10 0 0 180 0 1 T 50300 48100 5 10 0 0 180 0 1
device=DRC_Directive device=DRC_Directive
T 49800 47500 5 10 0 0 180 0 1 T 50300 47500 5 10 0 0 180 0 1
symversion=1.1 symversion=1.1
} }
N 55200 47500 56000 47500 4 N 55200 47500 56000 47500 4
@ -166,22 +166,22 @@ refdes=R106
T 49300 51000 5 10 1 1 0 0 1 T 49300 51000 5 10 1 1 0 0 1
value=1k value=1k
} }
C 49400 48900 1 90 1 capacitor-2.sym C 49900 48900 1 90 1 capacitor-2.sym
{ {
T 48700 48700 5 10 0 0 270 2 1 T 49200 48700 5 10 0 0 270 2 1
device=AEC device=AEC
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
footprint=CAPPRD250W50D630H700N.lht footprint=CAPPRD250W50D630H700N.lht
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
lcsc=C47891 lcsc=C47891
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
description=capacitor, AEC, radial, >=50V, >=-20% description=capacitor, AEC, radial, >=50V, >=-20%
T 48500 48600 5 10 1 1 0 0 1 T 49800 48200 5 10 1 1 0 0 1
refdes=C102 refdes=C102
T 48500 48200 5 10 1 1 0 0 1 T 49800 48000 5 10 1 1 0 0 1
value=100uF value=100uF
} }
C 49100 47800 1 0 0 GND.sym C 49600 47800 1 0 0 GND.sym
C 57000 45800 1 90 1 C0603.sym C 57000 45800 1 90 1 C0603.sym
{ {
T 57000 45800 5 8 0 0 270 2 1 T 57000 45800 5 8 0 0 270 2 1
@ -220,7 +220,7 @@ value=USB2517-JZX
} }
T 47100 51100 9 10 1 0 0 0 1 T 47100 51100 9 10 1 0 0 0 1
active high active high
T 48400 45700 9 10 1 0 0 0 4 T 47200 45900 9 10 1 0 0 0 4
invert power invert power
control signal control signal
and handle and handle
@ -237,7 +237,7 @@ T 47100 50300 9 10 1 0 0 0 3
USB speed USB speed
indication indication
mode used mode used
T 45100 47300 9 10 1 0 90 0 2 T 46600 47900 9 10 1 0 0 0 2
voltage divider voltage divider
for Vgs limit for Vgs limit
C 53000 43000 1 0 0 title.sym C 53000 43000 1 0 0 title.sym
@ -373,7 +373,7 @@ T 57600 50900 5 10 0 0 0 0 1
footprint=CAPPRD200W45D500H700N.lht footprint=CAPPRD200W45D500H700N.lht
T 57600 50900 5 10 0 0 0 0 1 T 57600 50900 5 10 0 0 0 0 1
lcsc=C2940240 lcsc=C2940240
T 57600 50600 5 10 1 1 0 0 1 T 57500 50600 5 10 1 1 0 0 1
refdes=C101 refdes=C101
T 57500 50100 5 10 1 1 0 0 1 T 57500 50100 5 10 1 1 0 0 1
value=150uF value=150uF
@ -449,10 +449,10 @@ refdes=R104
T 45300 48300 5 10 1 1 0 0 1 T 45300 48300 5 10 1 1 0 0 1
value=100k value=100k
} }
T 46100 47200 9 10 1 0 0 0 3 T 49500 47100 9 10 1 0 0 0 3
only allow 6-40V output prevent feedback
if 6-40V available (only if 6-40V input
(else block feedback) is not present)
C 48500 47900 1 90 0 40P05.sym C 48500 47900 1 90 0 40P05.sym
{ {
T 48500 47900 5 8 0 0 270 8 1 T 48500 47900 5 8 0 0 270 8 1
@ -469,7 +469,6 @@ T 48260 48740 5 10 1 1 270 0 1
device=40P05 device=40P05
} }
N 45900 48900 46100 48900 4 N 45900 48900 46100 48900 4
N 45900 47800 48100 47800 4
C 46000 46900 1 90 0 resistor-1.sym C 46000 46900 1 90 0 resistor-1.sym
{ {
T 45600 47200 5 10 0 0 90 0 1 T 45600 47200 5 10 0 0 90 0 1
@ -495,15 +494,15 @@ T 47100 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 47100 45900 5 10 0 0 90 0 1 T 47100 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 46460 47140 5 10 1 1 180 6 1 T 46160 47140 5 10 1 1 180 6 1
refdes=Q105 refdes=Q105
T 46860 46740 5 10 1 1 90 8 1 T 46860 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
N 45900 48700 45900 48900 4 N 45900 48700 45900 48900 4
N 46700 45700 46700 45900 4 N 46700 45700 46700 45900 4
N 47900 45700 47900 45900 4 N 49500 45700 49500 45900 4
N 48500 48900 49900 48900 4 N 48500 48900 50400 48900 4
C 52400 51600 1 0 0 5V.sym C 52400 51600 1 0 0 5V.sym
N 56400 50700 56400 50900 4 N 56400 50700 56400 50900 4
N 53600 48400 55200 48400 4 N 53600 48400 55200 48400 4
@ -546,3 +545,49 @@ device=DIO7553
T 53500 51400 5 10 1 1 0 0 1 T 53500 51400 5 10 1 1 0 0 1
value=DIO7553ST6 value=DIO7553ST6
} }
C 48600 47800 1 270 1 resistor-1.sym
{
T 49000 48100 5 10 0 0 90 2 1
device=RESISTOR
T 49100 48000 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 48000 5 10 0 0 90 2 1
symversion=0.1
T 48700 48100 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 49300 48500 5 10 1 1 0 6 1
refdes=R108
T 49300 48300 5 10 1 1 0 6 1
value=100k
}
C 48600 46900 1 270 1 resistor-1.sym
{
T 49000 47200 5 10 0 0 90 2 1
device=RESISTOR
T 49100 47100 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 47100 5 10 0 0 90 2 1
symversion=0.1
T 48700 47200 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 48900 47600 5 10 1 1 180 6 1
refdes=R109
T 48900 47400 5 10 1 1 180 6 1
value=100k
}
N 46500 47800 45900 47800 4
N 48100 47800 48700 47800 4
C 47300 46800 1 90 0 GND.sym
N 48700 48700 48700 48900 4
T 46100 47300 9 10 1 0 0 0 2
6-40V output switched
along USB power
T 50000 45700 9 10 1 0 0 0 5
WARNING:
reverse current possible
if USB port power enabled
and output voltage higher
than 6-40V input
T 55300 51100 9 10 1 0 0 0 2
also prevents reverse current
(when switched off)

125
usb_hub-dfp2.sch
View File

@ -5,17 +5,17 @@ T 46500 51100 5 10 1 1 0 0 1
netname=PWR2 netname=PWR2
} }
C 45700 48900 1 0 0 VTRG.sym C 45700 48900 1 0 0 VTRG.sym
C 48300 45900 1 90 0 BSS138.sym C 49900 45900 1 90 0 BSS138.sym
{ {
T 48300 45900 5 8 0 0 90 0 1 T 49900 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 48300 45900 5 10 0 1 90 0 1 T 49900 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 48300 45900 5 10 0 0 90 0 1 T 49900 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 47460 47140 5 10 1 1 180 6 1 T 48960 47140 5 10 1 1 180 6 1
refdes=Q203 refdes=Q203
T 48060 46740 5 10 1 1 90 8 1 T 49660 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
C 46100 47900 1 270 1 40P05.sym C 46100 47900 1 270 1 40P05.sym
@ -33,10 +33,10 @@ refdes=Q206
T 46340 48740 5 10 1 1 270 2 1 T 46340 48740 5 10 1 1 270 2 1
device=40P05 device=40P05
} }
C 48500 46800 1 90 0 GND.sym C 50100 46800 1 90 0 GND.sym
N 47100 45700 47900 45700 4 N 48700 45700 49500 45700 4
{ {
T 47200 45700 5 10 1 1 0 0 1 T 48800 45700 5 10 1 1 0 0 1
netname=POW2 netname=POW2
} }
N 46300 49900 47000 49900 4 N 46300 49900 47000 49900 4
@ -61,29 +61,29 @@ refdes=J201
T 58500 47800 5 10 1 1 0 6 1 T 58500 47800 5 10 1 1 0 6 1
value=USB-A 2.0 RECEPTACLE value=USB-A 2.0 RECEPTACLE
} }
C 51000 48400 1 0 1 pwrjack-2.sym C 51500 48400 1 0 1 pwrjack-2.sym
{ {
T 51000 49300 5 10 0 0 0 6 1 T 51500 49300 5 10 0 0 0 6 1
device=PWRJACK device=PWRJACK
T 51000 49500 5 10 0 0 0 6 1 T 51500 49500 5 10 0 0 0 6 1
footprint=CONNECTOR_DC-005_2.0.lht footprint=CONNECTOR_DC-005_2.0.lht
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
lcsc=C16214 lcsc=C16214
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm
T 51000 49100 5 10 1 1 0 6 1 T 51500 49100 5 10 1 1 0 6 1
refdes=J202 refdes=J202
T 51000 48200 5 10 1 1 0 6 1 T 51500 48200 5 10 1 1 0 6 1
value=OUT 6-40V value=OUT 6-40V
} }
C 49700 48600 1 270 0 GND.sym C 50200 48600 1 270 0 GND.sym
C 49900 48800 1 180 0 nc-right-1.sym C 50400 48800 1 180 0 nc-right-1.sym
{ {
T 49800 48300 5 10 0 0 180 0 1 T 50300 48300 5 10 0 0 180 0 1
value=NoConnection value=NoConnection
T 49800 48100 5 10 0 0 180 0 1 T 50300 48100 5 10 0 0 180 0 1
device=DRC_Directive device=DRC_Directive
T 49800 47500 5 10 0 0 180 0 1 T 50300 47500 5 10 0 0 180 0 1
symversion=1.1 symversion=1.1
} }
N 55200 47500 56000 47500 4 N 55200 47500 56000 47500 4
@ -166,22 +166,22 @@ refdes=R206
T 49300 51000 5 10 1 1 0 0 1 T 49300 51000 5 10 1 1 0 0 1
value=1k value=1k
} }
C 49400 48900 1 90 1 capacitor-2.sym C 49900 48900 1 90 1 capacitor-2.sym
{ {
T 48700 48700 5 10 0 0 270 2 1 T 49200 48700 5 10 0 0 270 2 1
device=AEC device=AEC
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
footprint=CAPPRD250W50D630H700N.lht footprint=CAPPRD250W50D630H700N.lht
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
lcsc=C47891 lcsc=C47891
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
description=capacitor, AEC, radial, >=50V, >=-20% description=capacitor, AEC, radial, >=50V, >=-20%
T 48500 48600 5 10 1 1 0 0 1 T 49800 48200 5 10 1 1 0 0 1
refdes=C202 refdes=C202
T 48500 48200 5 10 1 1 0 0 1 T 49800 48000 5 10 1 1 0 0 1
value=100uF value=100uF
} }
C 49100 47800 1 0 0 GND.sym C 49600 47800 1 0 0 GND.sym
C 57000 45800 1 90 1 C0603.sym C 57000 45800 1 90 1 C0603.sym
{ {
T 57000 45800 5 8 0 0 270 2 1 T 57000 45800 5 8 0 0 270 2 1
@ -220,7 +220,7 @@ value=USB2517-JZX
} }
T 47100 51100 9 10 1 0 0 0 1 T 47100 51100 9 10 1 0 0 0 1
active high active high
T 48400 45700 9 10 1 0 0 0 4 T 47200 45900 9 10 1 0 0 0 4
invert power invert power
control signal control signal
and handle and handle
@ -237,7 +237,7 @@ T 47100 50300 9 10 1 0 0 0 3
USB speed USB speed
indication indication
mode used mode used
T 45100 47300 9 10 1 0 90 0 2 T 46600 47900 9 10 1 0 0 0 2
voltage divider voltage divider
for Vgs limit for Vgs limit
C 53000 43000 1 0 0 title.sym C 53000 43000 1 0 0 title.sym
@ -373,7 +373,7 @@ T 57600 50900 5 10 0 0 0 0 1
footprint=CAPPRD200W45D500H700N.lht footprint=CAPPRD200W45D500H700N.lht
T 57600 50900 5 10 0 0 0 0 1 T 57600 50900 5 10 0 0 0 0 1
lcsc=C2940240 lcsc=C2940240
T 57600 50600 5 10 1 1 0 0 1 T 57500 50600 5 10 1 1 0 0 1
refdes=C201 refdes=C201
T 57500 50100 5 10 1 1 0 0 1 T 57500 50100 5 10 1 1 0 0 1
value=150uF value=150uF
@ -449,10 +449,10 @@ refdes=R204
T 45300 48300 5 10 1 1 0 0 1 T 45300 48300 5 10 1 1 0 0 1
value=100k value=100k
} }
T 46100 47200 9 10 1 0 0 0 3 T 49500 47100 9 10 1 0 0 0 3
only allow 6-40V output prevent feedback
if 6-40V available (only if 6-40V input
(else block feedback) is not present)
C 48500 47900 1 90 0 40P05.sym C 48500 47900 1 90 0 40P05.sym
{ {
T 48500 47900 5 8 0 0 270 8 1 T 48500 47900 5 8 0 0 270 8 1
@ -469,7 +469,6 @@ T 48260 48740 5 10 1 1 270 0 1
device=40P05 device=40P05
} }
N 45900 48900 46100 48900 4 N 45900 48900 46100 48900 4
N 45900 47800 48100 47800 4
C 46000 46900 1 90 0 resistor-1.sym C 46000 46900 1 90 0 resistor-1.sym
{ {
T 45600 47200 5 10 0 0 90 0 1 T 45600 47200 5 10 0 0 90 0 1
@ -495,15 +494,15 @@ T 47100 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 47100 45900 5 10 0 0 90 0 1 T 47100 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 46460 47140 5 10 1 1 180 6 1 T 46160 47140 5 10 1 1 180 6 1
refdes=Q205 refdes=Q205
T 46860 46740 5 10 1 1 90 8 1 T 46860 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
N 45900 48700 45900 48900 4 N 45900 48700 45900 48900 4
N 46700 45700 46700 45900 4 N 46700 45700 46700 45900 4
N 47900 45700 47900 45900 4 N 49500 45700 49500 45900 4
N 48500 48900 49900 48900 4 N 48500 48900 50400 48900 4
C 52400 51600 1 0 0 5V.sym C 52400 51600 1 0 0 5V.sym
N 56400 50700 56400 50900 4 N 56400 50700 56400 50900 4
N 53600 48400 55200 48400 4 N 53600 48400 55200 48400 4
@ -546,3 +545,49 @@ device=DIO7553
T 53500 51400 5 10 1 1 0 0 1 T 53500 51400 5 10 1 1 0 0 1
value=DIO7553ST6 value=DIO7553ST6
} }
C 48600 47800 1 270 1 resistor-1.sym
{
T 49000 48100 5 10 0 0 90 2 1
device=RESISTOR
T 49100 48000 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 48000 5 10 0 0 90 2 1
symversion=0.1
T 48700 48100 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 49300 48500 5 10 1 1 0 6 1
refdes=R208
T 49300 48300 5 10 1 1 0 6 1
value=100k
}
C 48600 46900 1 270 1 resistor-1.sym
{
T 49000 47200 5 10 0 0 90 2 1
device=RESISTOR
T 49100 47100 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 47100 5 10 0 0 90 2 1
symversion=0.1
T 48700 47200 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 48900 47600 5 10 1 1 180 6 1
refdes=R209
T 48900 47400 5 10 1 1 180 6 1
value=100k
}
N 46500 47800 45900 47800 4
N 48100 47800 48700 47800 4
C 47300 46800 1 90 0 GND.sym
N 48700 48700 48700 48900 4
T 46100 47300 9 10 1 0 0 0 2
6-40V output switched
along USB power
T 50000 45700 9 10 1 0 0 0 5
WARNING:
reverse current possible
if USB port power enabled
and output voltage higher
than 6-40V input
T 55300 51100 9 10 1 0 0 0 2
also prevents reverse current
(when switched off)

125
usb_hub-dfp3.sch
View File

@ -5,17 +5,17 @@ T 46500 51100 5 10 1 1 0 0 1
netname=PWR3 netname=PWR3
} }
C 45700 48900 1 0 0 VTRG.sym C 45700 48900 1 0 0 VTRG.sym
C 48300 45900 1 90 0 BSS138.sym C 49900 45900 1 90 0 BSS138.sym
{ {
T 48300 45900 5 8 0 0 90 0 1 T 49900 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 48300 45900 5 10 0 1 90 0 1 T 49900 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 48300 45900 5 10 0 0 90 0 1 T 49900 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 47460 47140 5 10 1 1 180 6 1 T 48960 47140 5 10 1 1 180 6 1
refdes=Q303 refdes=Q303
T 48060 46740 5 10 1 1 90 8 1 T 49660 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
C 46100 47900 1 270 1 40P05.sym C 46100 47900 1 270 1 40P05.sym
@ -33,10 +33,10 @@ refdes=Q306
T 46340 48740 5 10 1 1 270 2 1 T 46340 48740 5 10 1 1 270 2 1
device=40P05 device=40P05
} }
C 48500 46800 1 90 0 GND.sym C 50100 46800 1 90 0 GND.sym
N 47100 45700 47900 45700 4 N 48700 45700 49500 45700 4
{ {
T 47200 45700 5 10 1 1 0 0 1 T 48800 45700 5 10 1 1 0 0 1
netname=POW3 netname=POW3
} }
N 46300 49900 47000 49900 4 N 46300 49900 47000 49900 4
@ -61,29 +61,29 @@ refdes=J301
T 58500 47800 5 10 1 1 0 6 1 T 58500 47800 5 10 1 1 0 6 1
value=USB-A 2.0 RECEPTACLE value=USB-A 2.0 RECEPTACLE
} }
C 51000 48400 1 0 1 pwrjack-2.sym C 51500 48400 1 0 1 pwrjack-2.sym
{ {
T 51000 49300 5 10 0 0 0 6 1 T 51500 49300 5 10 0 0 0 6 1
device=PWRJACK device=PWRJACK
T 51000 49500 5 10 0 0 0 6 1 T 51500 49500 5 10 0 0 0 6 1
footprint=CONNECTOR_DC-005_2.0.lht footprint=CONNECTOR_DC-005_2.0.lht
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
lcsc=C16214 lcsc=C16214
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm
T 51000 49100 5 10 1 1 0 6 1 T 51500 49100 5 10 1 1 0 6 1
refdes=J302 refdes=J302
T 51000 48200 5 10 1 1 0 6 1 T 51500 48200 5 10 1 1 0 6 1
value=OUT 6-40V value=OUT 6-40V
} }
C 49700 48600 1 270 0 GND.sym C 50200 48600 1 270 0 GND.sym
C 49900 48800 1 180 0 nc-right-1.sym C 50400 48800 1 180 0 nc-right-1.sym
{ {
T 49800 48300 5 10 0 0 180 0 1 T 50300 48300 5 10 0 0 180 0 1
value=NoConnection value=NoConnection
T 49800 48100 5 10 0 0 180 0 1 T 50300 48100 5 10 0 0 180 0 1
device=DRC_Directive device=DRC_Directive
T 49800 47500 5 10 0 0 180 0 1 T 50300 47500 5 10 0 0 180 0 1
symversion=1.1 symversion=1.1
} }
N 55200 47500 56000 47500 4 N 55200 47500 56000 47500 4
@ -166,22 +166,22 @@ refdes=R306
T 49300 51000 5 10 1 1 0 0 1 T 49300 51000 5 10 1 1 0 0 1
value=1k value=1k
} }
C 49400 48900 1 90 1 capacitor-2.sym C 49900 48900 1 90 1 capacitor-2.sym
{ {
T 48700 48700 5 10 0 0 270 2 1 T 49200 48700 5 10 0 0 270 2 1
device=AEC device=AEC
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
footprint=CAPPRD250W50D630H700N.lht footprint=CAPPRD250W50D630H700N.lht
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
lcsc=C47891 lcsc=C47891
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
description=capacitor, AEC, radial, >=50V, >=-20% description=capacitor, AEC, radial, >=50V, >=-20%
T 48500 48600 5 10 1 1 0 0 1 T 49800 48200 5 10 1 1 0 0 1
refdes=C302 refdes=C302
T 48500 48200 5 10 1 1 0 0 1 T 49800 48000 5 10 1 1 0 0 1
value=100uF value=100uF
} }
C 49100 47800 1 0 0 GND.sym C 49600 47800 1 0 0 GND.sym
C 57000 45800 1 90 1 C0603.sym C 57000 45800 1 90 1 C0603.sym
{ {
T 57000 45800 5 8 0 0 270 2 1 T 57000 45800 5 8 0 0 270 2 1
@ -220,7 +220,7 @@ value=USB2517-JZX
} }
T 47100 51100 9 10 1 0 0 0 1 T 47100 51100 9 10 1 0 0 0 1
active high active high
T 48400 45700 9 10 1 0 0 0 4 T 47200 45900 9 10 1 0 0 0 4
invert power invert power
control signal control signal
and handle and handle
@ -237,7 +237,7 @@ T 47100 50300 9 10 1 0 0 0 3
USB speed USB speed
indication indication
mode used mode used
T 45100 47300 9 10 1 0 90 0 2 T 46600 47900 9 10 1 0 0 0 2
voltage divider voltage divider
for Vgs limit for Vgs limit
C 53000 43000 1 0 0 title.sym C 53000 43000 1 0 0 title.sym
@ -373,7 +373,7 @@ T 57600 50900 5 10 0 0 0 0 1
footprint=CAPPRD200W45D500H700N.lht footprint=CAPPRD200W45D500H700N.lht
T 57600 50900 5 10 0 0 0 0 1 T 57600 50900 5 10 0 0 0 0 1
lcsc=C2940240 lcsc=C2940240
T 57600 50600 5 10 1 1 0 0 1 T 57500 50600 5 10 1 1 0 0 1
refdes=C301 refdes=C301
T 57500 50100 5 10 1 1 0 0 1 T 57500 50100 5 10 1 1 0 0 1
value=150uF value=150uF
@ -449,10 +449,10 @@ refdes=R304
T 45300 48300 5 10 1 1 0 0 1 T 45300 48300 5 10 1 1 0 0 1
value=100k value=100k
} }
T 46100 47200 9 10 1 0 0 0 3 T 49500 47100 9 10 1 0 0 0 3
only allow 6-40V output prevent feedback
if 6-40V available (only if 6-40V input
(else block feedback) is not present)
C 48500 47900 1 90 0 40P05.sym C 48500 47900 1 90 0 40P05.sym
{ {
T 48500 47900 5 8 0 0 270 8 1 T 48500 47900 5 8 0 0 270 8 1
@ -469,7 +469,6 @@ T 48260 48740 5 10 1 1 270 0 1
device=40P05 device=40P05
} }
N 45900 48900 46100 48900 4 N 45900 48900 46100 48900 4
N 45900 47800 48100 47800 4
C 46000 46900 1 90 0 resistor-1.sym C 46000 46900 1 90 0 resistor-1.sym
{ {
T 45600 47200 5 10 0 0 90 0 1 T 45600 47200 5 10 0 0 90 0 1
@ -495,15 +494,15 @@ T 47100 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 47100 45900 5 10 0 0 90 0 1 T 47100 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 46460 47140 5 10 1 1 180 6 1 T 46160 47140 5 10 1 1 180 6 1
refdes=Q305 refdes=Q305
T 46860 46740 5 10 1 1 90 8 1 T 46860 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
N 45900 48700 45900 48900 4 N 45900 48700 45900 48900 4
N 46700 45700 46700 45900 4 N 46700 45700 46700 45900 4
N 47900 45700 47900 45900 4 N 49500 45700 49500 45900 4
N 48500 48900 49900 48900 4 N 48500 48900 50400 48900 4
C 52400 51600 1 0 0 5V.sym C 52400 51600 1 0 0 5V.sym
N 56400 50700 56400 50900 4 N 56400 50700 56400 50900 4
N 53600 48400 55200 48400 4 N 53600 48400 55200 48400 4
@ -546,3 +545,49 @@ device=DIO7553
T 53500 51400 5 10 1 1 0 0 1 T 53500 51400 5 10 1 1 0 0 1
value=DIO7553ST6 value=DIO7553ST6
} }
C 48600 47800 1 270 1 resistor-1.sym
{
T 49000 48100 5 10 0 0 90 2 1
device=RESISTOR
T 49100 48000 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 48000 5 10 0 0 90 2 1
symversion=0.1
T 48700 48100 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 49300 48500 5 10 1 1 0 6 1
refdes=R308
T 49300 48300 5 10 1 1 0 6 1
value=100k
}
C 48600 46900 1 270 1 resistor-1.sym
{
T 49000 47200 5 10 0 0 90 2 1
device=RESISTOR
T 49100 47100 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 47100 5 10 0 0 90 2 1
symversion=0.1
T 48700 47200 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 48900 47600 5 10 1 1 180 6 1
refdes=R309
T 48900 47400 5 10 1 1 180 6 1
value=100k
}
N 46500 47800 45900 47800 4
N 48100 47800 48700 47800 4
C 47300 46800 1 90 0 GND.sym
N 48700 48700 48700 48900 4
T 46100 47300 9 10 1 0 0 0 2
6-40V output switched
along USB power
T 50000 45700 9 10 1 0 0 0 5
WARNING:
reverse current possible
if USB port power enabled
and output voltage higher
than 6-40V input
T 55300 51100 9 10 1 0 0 0 2
also prevents reverse current
(when switched off)

125
usb_hub-dfp4.sch
View File

@ -5,17 +5,17 @@ T 46500 51100 5 10 1 1 0 0 1
netname=PWR4 netname=PWR4
} }
C 45700 48900 1 0 0 VTRG.sym C 45700 48900 1 0 0 VTRG.sym
C 48300 45900 1 90 0 BSS138.sym C 49900 45900 1 90 0 BSS138.sym
{ {
T 48300 45900 5 8 0 0 90 0 1 T 49900 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 48300 45900 5 10 0 1 90 0 1 T 49900 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 48300 45900 5 10 0 0 90 0 1 T 49900 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 47460 47140 5 10 1 1 180 6 1 T 48960 47140 5 10 1 1 180 6 1
refdes=Q403 refdes=Q403
T 48060 46740 5 10 1 1 90 8 1 T 49660 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
C 46100 47900 1 270 1 40P05.sym C 46100 47900 1 270 1 40P05.sym
@ -33,10 +33,10 @@ refdes=Q406
T 46340 48740 5 10 1 1 270 2 1 T 46340 48740 5 10 1 1 270 2 1
device=40P05 device=40P05
} }
C 48500 46800 1 90 0 GND.sym C 50100 46800 1 90 0 GND.sym
N 47100 45700 47900 45700 4 N 48700 45700 49500 45700 4
{ {
T 47200 45700 5 10 1 1 0 0 1 T 48800 45700 5 10 1 1 0 0 1
netname=POW4 netname=POW4
} }
N 46300 49900 47000 49900 4 N 46300 49900 47000 49900 4
@ -61,29 +61,29 @@ refdes=J401
T 58500 47800 5 10 1 1 0 6 1 T 58500 47800 5 10 1 1 0 6 1
value=USB-A 2.0 RECEPTACLE value=USB-A 2.0 RECEPTACLE
} }
C 51000 48400 1 0 1 pwrjack-2.sym C 51500 48400 1 0 1 pwrjack-2.sym
{ {
T 51000 49300 5 10 0 0 0 6 1 T 51500 49300 5 10 0 0 0 6 1
device=PWRJACK device=PWRJACK
T 51000 49500 5 10 0 0 0 6 1 T 51500 49500 5 10 0 0 0 6 1
footprint=CONNECTOR_DC-005_2.0.lht footprint=CONNECTOR_DC-005_2.0.lht
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
lcsc=C16214 lcsc=C16214
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm
T 51000 49100 5 10 1 1 0 6 1 T 51500 49100 5 10 1 1 0 6 1
refdes=J402 refdes=J402
T 51000 48200 5 10 1 1 0 6 1 T 51500 48200 5 10 1 1 0 6 1
value=OUT 6-40V value=OUT 6-40V
} }
C 49700 48600 1 270 0 GND.sym C 50200 48600 1 270 0 GND.sym
C 49900 48800 1 180 0 nc-right-1.sym C 50400 48800 1 180 0 nc-right-1.sym
{ {
T 49800 48300 5 10 0 0 180 0 1 T 50300 48300 5 10 0 0 180 0 1
value=NoConnection value=NoConnection
T 49800 48100 5 10 0 0 180 0 1 T 50300 48100 5 10 0 0 180 0 1
device=DRC_Directive device=DRC_Directive
T 49800 47500 5 10 0 0 180 0 1 T 50300 47500 5 10 0 0 180 0 1
symversion=1.1 symversion=1.1
} }
N 55200 47500 56000 47500 4 N 55200 47500 56000 47500 4
@ -166,22 +166,22 @@ refdes=R406
T 49300 51000 5 10 1 1 0 0 1 T 49300 51000 5 10 1 1 0 0 1
value=1k value=1k
} }
C 49400 48900 1 90 1 capacitor-2.sym C 49900 48900 1 90 1 capacitor-2.sym
{ {
T 48700 48700 5 10 0 0 270 2 1 T 49200 48700 5 10 0 0 270 2 1
device=AEC device=AEC
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
footprint=CAPPRD250W50D630H700N.lht footprint=CAPPRD250W50D630H700N.lht
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
lcsc=C47891 lcsc=C47891
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
description=capacitor, AEC, radial, >=50V, >=-20% description=capacitor, AEC, radial, >=50V, >=-20%
T 48500 48600 5 10 1 1 0 0 1 T 49800 48200 5 10 1 1 0 0 1
refdes=C402 refdes=C402
T 48500 48200 5 10 1 1 0 0 1 T 49800 48000 5 10 1 1 0 0 1
value=100uF value=100uF
} }
C 49100 47800 1 0 0 GND.sym C 49600 47800 1 0 0 GND.sym
C 57000 45800 1 90 1 C0603.sym C 57000 45800 1 90 1 C0603.sym
{ {
T 57000 45800 5 8 0 0 270 2 1 T 57000 45800 5 8 0 0 270 2 1
@ -220,7 +220,7 @@ value=USB2517-JZX
} }
T 47100 51100 9 10 1 0 0 0 1 T 47100 51100 9 10 1 0 0 0 1
active high active high
T 48400 45700 9 10 1 0 0 0 4 T 47200 45900 9 10 1 0 0 0 4
invert power invert power
control signal control signal
and handle and handle
@ -237,7 +237,7 @@ T 47100 50300 9 10 1 0 0 0 3
USB speed USB speed
indication indication
mode used mode used
T 45100 47300 9 10 1 0 90 0 2 T 46600 47900 9 10 1 0 0 0 2
voltage divider voltage divider
for Vgs limit for Vgs limit
C 53000 43000 1 0 0 title.sym C 53000 43000 1 0 0 title.sym
@ -373,7 +373,7 @@ T 57600 50900 5 10 0 0 0 0 1
footprint=CAPPRD200W45D500H700N.lht footprint=CAPPRD200W45D500H700N.lht
T 57600 50900 5 10 0 0 0 0 1 T 57600 50900 5 10 0 0 0 0 1
lcsc=C2940240 lcsc=C2940240
T 57600 50600 5 10 1 1 0 0 1 T 57500 50600 5 10 1 1 0 0 1
refdes=C401 refdes=C401
T 57500 50100 5 10 1 1 0 0 1 T 57500 50100 5 10 1 1 0 0 1
value=150uF value=150uF
@ -449,10 +449,10 @@ refdes=R404
T 45300 48300 5 10 1 1 0 0 1 T 45300 48300 5 10 1 1 0 0 1
value=100k value=100k
} }
T 46100 47200 9 10 1 0 0 0 3 T 49500 47100 9 10 1 0 0 0 3
only allow 6-40V output prevent feedback
if 6-40V available (only if 6-40V input
(else block feedback) is not present)
C 48500 47900 1 90 0 40P05.sym C 48500 47900 1 90 0 40P05.sym
{ {
T 48500 47900 5 8 0 0 270 8 1 T 48500 47900 5 8 0 0 270 8 1
@ -469,7 +469,6 @@ T 48260 48740 5 10 1 1 270 0 1
device=40P05 device=40P05
} }
N 45900 48900 46100 48900 4 N 45900 48900 46100 48900 4
N 45900 47800 48100 47800 4
C 46000 46900 1 90 0 resistor-1.sym C 46000 46900 1 90 0 resistor-1.sym
{ {
T 45600 47200 5 10 0 0 90 0 1 T 45600 47200 5 10 0 0 90 0 1
@ -495,15 +494,15 @@ T 47100 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 47100 45900 5 10 0 0 90 0 1 T 47100 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 46460 47140 5 10 1 1 180 6 1 T 46160 47140 5 10 1 1 180 6 1
refdes=Q405 refdes=Q405
T 46860 46740 5 10 1 1 90 8 1 T 46860 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
N 45900 48700 45900 48900 4 N 45900 48700 45900 48900 4
N 46700 45700 46700 45900 4 N 46700 45700 46700 45900 4
N 47900 45700 47900 45900 4 N 49500 45700 49500 45900 4
N 48500 48900 49900 48900 4 N 48500 48900 50400 48900 4
C 52400 51600 1 0 0 5V.sym C 52400 51600 1 0 0 5V.sym
N 56400 50700 56400 50900 4 N 56400 50700 56400 50900 4
N 53600 48400 55200 48400 4 N 53600 48400 55200 48400 4
@ -546,3 +545,49 @@ device=DIO7553
T 53500 51400 5 10 1 1 0 0 1 T 53500 51400 5 10 1 1 0 0 1
value=DIO7553ST6 value=DIO7553ST6
} }
C 48600 47800 1 270 1 resistor-1.sym
{
T 49000 48100 5 10 0 0 90 2 1
device=RESISTOR
T 49100 48000 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 48000 5 10 0 0 90 2 1
symversion=0.1
T 48700 48100 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 49300 48500 5 10 1 1 0 6 1
refdes=R408
T 49300 48300 5 10 1 1 0 6 1
value=100k
}
C 48600 46900 1 270 1 resistor-1.sym
{
T 49000 47200 5 10 0 0 90 2 1
device=RESISTOR
T 49100 47100 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 47100 5 10 0 0 90 2 1
symversion=0.1
T 48700 47200 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 48900 47600 5 10 1 1 180 6 1
refdes=R409
T 48900 47400 5 10 1 1 180 6 1
value=100k
}
N 46500 47800 45900 47800 4
N 48100 47800 48700 47800 4
C 47300 46800 1 90 0 GND.sym
N 48700 48700 48700 48900 4
T 46100 47300 9 10 1 0 0 0 2
6-40V output switched
along USB power
T 50000 45700 9 10 1 0 0 0 5
WARNING:
reverse current possible
if USB port power enabled
and output voltage higher
than 6-40V input
T 55300 51100 9 10 1 0 0 0 2
also prevents reverse current
(when switched off)

125
usb_hub-dfp5.sch
View File

@ -5,17 +5,17 @@ T 46500 51100 5 10 1 1 0 0 1
netname=PWR5 netname=PWR5
} }
C 45700 48900 1 0 0 VTRG.sym C 45700 48900 1 0 0 VTRG.sym
C 48300 45900 1 90 0 BSS138.sym C 49900 45900 1 90 0 BSS138.sym
{ {
T 48300 45900 5 8 0 0 90 0 1 T 49900 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 48300 45900 5 10 0 1 90 0 1 T 49900 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 48300 45900 5 10 0 0 90 0 1 T 49900 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 47460 47140 5 10 1 1 180 6 1 T 48960 47140 5 10 1 1 180 6 1
refdes=Q503 refdes=Q503
T 48060 46740 5 10 1 1 90 8 1 T 49660 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
C 46100 47900 1 270 1 40P05.sym C 46100 47900 1 270 1 40P05.sym
@ -33,10 +33,10 @@ refdes=Q506
T 46340 48740 5 10 1 1 270 2 1 T 46340 48740 5 10 1 1 270 2 1
device=40P05 device=40P05
} }
C 48500 46800 1 90 0 GND.sym C 50100 46800 1 90 0 GND.sym
N 47100 45700 47900 45700 4 N 48700 45700 49500 45700 4
{ {
T 47200 45700 5 10 1 1 0 0 1 T 48800 45700 5 10 1 1 0 0 1
netname=POW5 netname=POW5
} }
N 46300 49900 47000 49900 4 N 46300 49900 47000 49900 4
@ -61,29 +61,29 @@ refdes=J501
T 58500 47800 5 10 1 1 0 6 1 T 58500 47800 5 10 1 1 0 6 1
value=USB-A 2.0 RECEPTACLE value=USB-A 2.0 RECEPTACLE
} }
C 51000 48400 1 0 1 pwrjack-2.sym C 51500 48400 1 0 1 pwrjack-2.sym
{ {
T 51000 49300 5 10 0 0 0 6 1 T 51500 49300 5 10 0 0 0 6 1
device=PWRJACK device=PWRJACK
T 51000 49500 5 10 0 0 0 6 1 T 51500 49500 5 10 0 0 0 6 1
footprint=CONNECTOR_DC-005_2.0.lht footprint=CONNECTOR_DC-005_2.0.lht
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
lcsc=C16214 lcsc=C16214
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm
T 51000 49100 5 10 1 1 0 6 1 T 51500 49100 5 10 1 1 0 6 1
refdes=J502 refdes=J502
T 51000 48200 5 10 1 1 0 6 1 T 51500 48200 5 10 1 1 0 6 1
value=OUT 6-40V value=OUT 6-40V
} }
C 49700 48600 1 270 0 GND.sym C 50200 48600 1 270 0 GND.sym
C 49900 48800 1 180 0 nc-right-1.sym C 50400 48800 1 180 0 nc-right-1.sym
{ {
T 49800 48300 5 10 0 0 180 0 1 T 50300 48300 5 10 0 0 180 0 1
value=NoConnection value=NoConnection
T 49800 48100 5 10 0 0 180 0 1 T 50300 48100 5 10 0 0 180 0 1
device=DRC_Directive device=DRC_Directive
T 49800 47500 5 10 0 0 180 0 1 T 50300 47500 5 10 0 0 180 0 1
symversion=1.1 symversion=1.1
} }
N 55200 47500 56000 47500 4 N 55200 47500 56000 47500 4
@ -166,22 +166,22 @@ refdes=R506
T 49300 51000 5 10 1 1 0 0 1 T 49300 51000 5 10 1 1 0 0 1
value=1k value=1k
} }
C 49400 48900 1 90 1 capacitor-2.sym C 49900 48900 1 90 1 capacitor-2.sym
{ {
T 48700 48700 5 10 0 0 270 2 1 T 49200 48700 5 10 0 0 270 2 1
device=AEC device=AEC
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
footprint=CAPPRD250W50D630H700N.lht footprint=CAPPRD250W50D630H700N.lht
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
lcsc=C47891 lcsc=C47891
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
description=capacitor, AEC, radial, >=50V, >=-20% description=capacitor, AEC, radial, >=50V, >=-20%
T 48500 48600 5 10 1 1 0 0 1 T 49800 48200 5 10 1 1 0 0 1
refdes=C502 refdes=C502
T 48500 48200 5 10 1 1 0 0 1 T 49800 48000 5 10 1 1 0 0 1
value=100uF value=100uF
} }
C 49100 47800 1 0 0 GND.sym C 49600 47800 1 0 0 GND.sym
C 57000 45800 1 90 1 C0603.sym C 57000 45800 1 90 1 C0603.sym
{ {
T 57000 45800 5 8 0 0 270 2 1 T 57000 45800 5 8 0 0 270 2 1
@ -220,7 +220,7 @@ value=USB2517-JZX
} }
T 47100 51100 9 10 1 0 0 0 1 T 47100 51100 9 10 1 0 0 0 1
active high active high
T 48400 45700 9 10 1 0 0 0 4 T 47200 45900 9 10 1 0 0 0 4
invert power invert power
control signal control signal
and handle and handle
@ -237,7 +237,7 @@ T 47100 50300 9 10 1 0 0 0 3
USB speed USB speed
indication indication
mode used mode used
T 45100 47300 9 10 1 0 90 0 2 T 46600 47900 9 10 1 0 0 0 2
voltage divider voltage divider
for Vgs limit for Vgs limit
C 53000 43000 1 0 0 title.sym C 53000 43000 1 0 0 title.sym
@ -373,7 +373,7 @@ T 57600 50900 5 10 0 0 0 0 1
footprint=CAPPRD200W45D500H700N.lht footprint=CAPPRD200W45D500H700N.lht
T 57600 50900 5 10 0 0 0 0 1 T 57600 50900 5 10 0 0 0 0 1
lcsc=C2940240 lcsc=C2940240
T 57600 50600 5 10 1 1 0 0 1 T 57500 50600 5 10 1 1 0 0 1
refdes=C501 refdes=C501
T 57500 50100 5 10 1 1 0 0 1 T 57500 50100 5 10 1 1 0 0 1
value=150uF value=150uF
@ -449,10 +449,10 @@ refdes=R504
T 45300 48300 5 10 1 1 0 0 1 T 45300 48300 5 10 1 1 0 0 1
value=100k value=100k
} }
T 46100 47200 9 10 1 0 0 0 3 T 49500 47100 9 10 1 0 0 0 3
only allow 6-40V output prevent feedback
if 6-40V available (only if 6-40V input
(else block feedback) is not present)
C 48500 47900 1 90 0 40P05.sym C 48500 47900 1 90 0 40P05.sym
{ {
T 48500 47900 5 8 0 0 270 8 1 T 48500 47900 5 8 0 0 270 8 1
@ -469,7 +469,6 @@ T 48260 48740 5 10 1 1 270 0 1
device=40P05 device=40P05
} }
N 45900 48900 46100 48900 4 N 45900 48900 46100 48900 4
N 45900 47800 48100 47800 4
C 46000 46900 1 90 0 resistor-1.sym C 46000 46900 1 90 0 resistor-1.sym
{ {
T 45600 47200 5 10 0 0 90 0 1 T 45600 47200 5 10 0 0 90 0 1
@ -495,15 +494,15 @@ T 47100 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 47100 45900 5 10 0 0 90 0 1 T 47100 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 46460 47140 5 10 1 1 180 6 1 T 46160 47140 5 10 1 1 180 6 1
refdes=Q505 refdes=Q505
T 46860 46740 5 10 1 1 90 8 1 T 46860 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
N 45900 48700 45900 48900 4 N 45900 48700 45900 48900 4
N 46700 45700 46700 45900 4 N 46700 45700 46700 45900 4
N 47900 45700 47900 45900 4 N 49500 45700 49500 45900 4
N 48500 48900 49900 48900 4 N 48500 48900 50400 48900 4
C 52400 51600 1 0 0 5V.sym C 52400 51600 1 0 0 5V.sym
N 56400 50700 56400 50900 4 N 56400 50700 56400 50900 4
N 53600 48400 55200 48400 4 N 53600 48400 55200 48400 4
@ -546,3 +545,49 @@ device=DIO7553
T 53500 51400 5 10 1 1 0 0 1 T 53500 51400 5 10 1 1 0 0 1
value=DIO7553ST6 value=DIO7553ST6
} }
C 48600 47800 1 270 1 resistor-1.sym
{
T 49000 48100 5 10 0 0 90 2 1
device=RESISTOR
T 49100 48000 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 48000 5 10 0 0 90 2 1
symversion=0.1
T 48700 48100 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 49300 48500 5 10 1 1 0 6 1
refdes=R508
T 49300 48300 5 10 1 1 0 6 1
value=100k
}
C 48600 46900 1 270 1 resistor-1.sym
{
T 49000 47200 5 10 0 0 90 2 1
device=RESISTOR
T 49100 47100 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 47100 5 10 0 0 90 2 1
symversion=0.1
T 48700 47200 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 48900 47600 5 10 1 1 180 6 1
refdes=R509
T 48900 47400 5 10 1 1 180 6 1
value=100k
}
N 46500 47800 45900 47800 4
N 48100 47800 48700 47800 4
C 47300 46800 1 90 0 GND.sym
N 48700 48700 48700 48900 4
T 46100 47300 9 10 1 0 0 0 2
6-40V output switched
along USB power
T 50000 45700 9 10 1 0 0 0 5
WARNING:
reverse current possible
if USB port power enabled
and output voltage higher
than 6-40V input
T 55300 51100 9 10 1 0 0 0 2
also prevents reverse current
(when switched off)

125
usb_hub-dfp6.sch
View File

@ -5,17 +5,17 @@ T 46500 51100 5 10 1 1 0 0 1
netname=PWR6 netname=PWR6
} }
C 45700 48900 1 0 0 VTRG.sym C 45700 48900 1 0 0 VTRG.sym
C 48300 45900 1 90 0 BSS138.sym C 49900 45900 1 90 0 BSS138.sym
{ {
T 48300 45900 5 8 0 0 90 0 1 T 49900 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 48300 45900 5 10 0 1 90 0 1 T 49900 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 48300 45900 5 10 0 0 90 0 1 T 49900 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 47460 47140 5 10 1 1 180 6 1 T 48960 47140 5 10 1 1 180 6 1
refdes=Q603 refdes=Q603
T 48060 46740 5 10 1 1 90 8 1 T 49660 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
C 46100 47900 1 270 1 40P05.sym C 46100 47900 1 270 1 40P05.sym
@ -33,10 +33,10 @@ refdes=Q606
T 46340 48740 5 10 1 1 270 2 1 T 46340 48740 5 10 1 1 270 2 1
device=40P05 device=40P05
} }
C 48500 46800 1 90 0 GND.sym C 50100 46800 1 90 0 GND.sym
N 47100 45700 47900 45700 4 N 48700 45700 49500 45700 4
{ {
T 47200 45700 5 10 1 1 0 0 1 T 48800 45700 5 10 1 1 0 0 1
netname=POW6 netname=POW6
} }
N 46300 49900 47000 49900 4 N 46300 49900 47000 49900 4
@ -61,29 +61,29 @@ refdes=J601
T 58500 47800 5 10 1 1 0 6 1 T 58500 47800 5 10 1 1 0 6 1
value=USB-A 2.0 RECEPTACLE value=USB-A 2.0 RECEPTACLE
} }
C 51000 48400 1 0 1 pwrjack-2.sym C 51500 48400 1 0 1 pwrjack-2.sym
{ {
T 51000 49300 5 10 0 0 0 6 1 T 51500 49300 5 10 0 0 0 6 1
device=PWRJACK device=PWRJACK
T 51000 49500 5 10 0 0 0 6 1 T 51500 49500 5 10 0 0 0 6 1
footprint=CONNECTOR_DC-005_2.0.lht footprint=CONNECTOR_DC-005_2.0.lht
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
lcsc=C16214 lcsc=C16214
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm
T 51000 49100 5 10 1 1 0 6 1 T 51500 49100 5 10 1 1 0 6 1
refdes=J602 refdes=J602
T 51000 48200 5 10 1 1 0 6 1 T 51500 48200 5 10 1 1 0 6 1
value=OUT 6-40V value=OUT 6-40V
} }
C 49700 48600 1 270 0 GND.sym C 50200 48600 1 270 0 GND.sym
C 49900 48800 1 180 0 nc-right-1.sym C 50400 48800 1 180 0 nc-right-1.sym
{ {
T 49800 48300 5 10 0 0 180 0 1 T 50300 48300 5 10 0 0 180 0 1
value=NoConnection value=NoConnection
T 49800 48100 5 10 0 0 180 0 1 T 50300 48100 5 10 0 0 180 0 1
device=DRC_Directive device=DRC_Directive
T 49800 47500 5 10 0 0 180 0 1 T 50300 47500 5 10 0 0 180 0 1
symversion=1.1 symversion=1.1
} }
N 55200 47500 56000 47500 4 N 55200 47500 56000 47500 4
@ -166,22 +166,22 @@ refdes=R606
T 49300 51000 5 10 1 1 0 0 1 T 49300 51000 5 10 1 1 0 0 1
value=1k value=1k
} }
C 49400 48900 1 90 1 capacitor-2.sym C 49900 48900 1 90 1 capacitor-2.sym
{ {
T 48700 48700 5 10 0 0 270 2 1 T 49200 48700 5 10 0 0 270 2 1
device=AEC device=AEC
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
footprint=CAPPRD250W50D630H700N.lht footprint=CAPPRD250W50D630H700N.lht
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
lcsc=C47891 lcsc=C47891
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
description=capacitor, AEC, radial, >=50V, >=-20% description=capacitor, AEC, radial, >=50V, >=-20%
T 48500 48600 5 10 1 1 0 0 1 T 49800 48200 5 10 1 1 0 0 1
refdes=C602 refdes=C602
T 48500 48200 5 10 1 1 0 0 1 T 49800 48000 5 10 1 1 0 0 1
value=100uF value=100uF
} }
C 49100 47800 1 0 0 GND.sym C 49600 47800 1 0 0 GND.sym
C 57000 45800 1 90 1 C0603.sym C 57000 45800 1 90 1 C0603.sym
{ {
T 57000 45800 5 8 0 0 270 2 1 T 57000 45800 5 8 0 0 270 2 1
@ -220,7 +220,7 @@ value=USB2517-JZX
} }
T 47100 51100 9 10 1 0 0 0 1 T 47100 51100 9 10 1 0 0 0 1
active high active high
T 48400 45700 9 10 1 0 0 0 4 T 47200 45900 9 10 1 0 0 0 4
invert power invert power
control signal control signal
and handle and handle
@ -237,7 +237,7 @@ T 47100 50300 9 10 1 0 0 0 3
USB speed USB speed
indication indication
mode used mode used
T 45100 47300 9 10 1 0 90 0 2 T 46600 47900 9 10 1 0 0 0 2
voltage divider voltage divider
for Vgs limit for Vgs limit
C 53000 43000 1 0 0 title.sym C 53000 43000 1 0 0 title.sym
@ -373,7 +373,7 @@ T 57600 50900 5 10 0 0 0 0 1
footprint=CAPPRD200W45D500H700N.lht footprint=CAPPRD200W45D500H700N.lht
T 57600 50900 5 10 0 0 0 0 1 T 57600 50900 5 10 0 0 0 0 1
lcsc=C2940240 lcsc=C2940240
T 57600 50600 5 10 1 1 0 0 1 T 57500 50600 5 10 1 1 0 0 1
refdes=C601 refdes=C601
T 57500 50100 5 10 1 1 0 0 1 T 57500 50100 5 10 1 1 0 0 1
value=150uF value=150uF
@ -449,10 +449,10 @@ refdes=R604
T 45300 48300 5 10 1 1 0 0 1 T 45300 48300 5 10 1 1 0 0 1
value=100k value=100k
} }
T 46100 47200 9 10 1 0 0 0 3 T 49500 47100 9 10 1 0 0 0 3
only allow 6-40V output prevent feedback
if 6-40V available (only if 6-40V input
(else block feedback) is not present)
C 48500 47900 1 90 0 40P05.sym C 48500 47900 1 90 0 40P05.sym
{ {
T 48500 47900 5 8 0 0 270 8 1 T 48500 47900 5 8 0 0 270 8 1
@ -469,7 +469,6 @@ T 48260 48740 5 10 1 1 270 0 1
device=40P05 device=40P05
} }
N 45900 48900 46100 48900 4 N 45900 48900 46100 48900 4
N 45900 47800 48100 47800 4
C 46000 46900 1 90 0 resistor-1.sym C 46000 46900 1 90 0 resistor-1.sym
{ {
T 45600 47200 5 10 0 0 90 0 1 T 45600 47200 5 10 0 0 90 0 1
@ -495,15 +494,15 @@ T 47100 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 47100 45900 5 10 0 0 90 0 1 T 47100 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 46460 47140 5 10 1 1 180 6 1 T 46160 47140 5 10 1 1 180 6 1
refdes=Q605 refdes=Q605
T 46860 46740 5 10 1 1 90 8 1 T 46860 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
N 45900 48700 45900 48900 4 N 45900 48700 45900 48900 4
N 46700 45700 46700 45900 4 N 46700 45700 46700 45900 4
N 47900 45700 47900 45900 4 N 49500 45700 49500 45900 4
N 48500 48900 49900 48900 4 N 48500 48900 50400 48900 4
C 52400 51600 1 0 0 5V.sym C 52400 51600 1 0 0 5V.sym
N 56400 50700 56400 50900 4 N 56400 50700 56400 50900 4
N 53600 48400 55200 48400 4 N 53600 48400 55200 48400 4
@ -546,3 +545,49 @@ device=DIO7553
T 53500 51400 5 10 1 1 0 0 1 T 53500 51400 5 10 1 1 0 0 1
value=DIO7553ST6 value=DIO7553ST6
} }
C 48600 47800 1 270 1 resistor-1.sym
{
T 49000 48100 5 10 0 0 90 2 1
device=RESISTOR
T 49100 48000 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 48000 5 10 0 0 90 2 1
symversion=0.1
T 48700 48100 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 49300 48500 5 10 1 1 0 6 1
refdes=R608
T 49300 48300 5 10 1 1 0 6 1
value=100k
}
C 48600 46900 1 270 1 resistor-1.sym
{
T 49000 47200 5 10 0 0 90 2 1
device=RESISTOR
T 49100 47100 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 47100 5 10 0 0 90 2 1
symversion=0.1
T 48700 47200 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 48900 47600 5 10 1 1 180 6 1
refdes=R609
T 48900 47400 5 10 1 1 180 6 1
value=100k
}
N 46500 47800 45900 47800 4
N 48100 47800 48700 47800 4
C 47300 46800 1 90 0 GND.sym
N 48700 48700 48700 48900 4
T 46100 47300 9 10 1 0 0 0 2
6-40V output switched
along USB power
T 50000 45700 9 10 1 0 0 0 5
WARNING:
reverse current possible
if USB port power enabled
and output voltage higher
than 6-40V input
T 55300 51100 9 10 1 0 0 0 2
also prevents reverse current
(when switched off)

125
usb_hub-dfp7.sch
View File

@ -5,17 +5,17 @@ T 46500 51100 5 10 1 1 0 0 1
netname=PWR7 netname=PWR7
} }
C 45700 48900 1 0 0 VTRG.sym C 45700 48900 1 0 0 VTRG.sym
C 48300 45900 1 90 0 BSS138.sym C 49900 45900 1 90 0 BSS138.sym
{ {
T 48300 45900 5 8 0 0 90 0 1 T 49900 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 48300 45900 5 10 0 1 90 0 1 T 49900 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 48300 45900 5 10 0 0 90 0 1 T 49900 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 47460 47140 5 10 1 1 180 6 1 T 48960 47140 5 10 1 1 180 6 1
refdes=Q703 refdes=Q703
T 48060 46740 5 10 1 1 90 8 1 T 49660 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
C 46100 47900 1 270 1 40P05.sym C 46100 47900 1 270 1 40P05.sym
@ -33,10 +33,10 @@ refdes=Q706
T 46340 48740 5 10 1 1 270 2 1 T 46340 48740 5 10 1 1 270 2 1
device=40P05 device=40P05
} }
C 48500 46800 1 90 0 GND.sym C 50100 46800 1 90 0 GND.sym
N 47100 45700 47900 45700 4 N 48700 45700 49500 45700 4
{ {
T 47200 45700 5 10 1 1 0 0 1 T 48800 45700 5 10 1 1 0 0 1
netname=POW7 netname=POW7
} }
N 46300 49900 47000 49900 4 N 46300 49900 47000 49900 4
@ -61,29 +61,29 @@ refdes=J701
T 58500 47800 5 10 1 1 0 6 1 T 58500 47800 5 10 1 1 0 6 1
value=USB-A 2.0 RECEPTACLE value=USB-A 2.0 RECEPTACLE
} }
C 51000 48400 1 0 1 pwrjack-2.sym C 51500 48400 1 0 1 pwrjack-2.sym
{ {
T 51000 49300 5 10 0 0 0 6 1 T 51500 49300 5 10 0 0 0 6 1
device=PWRJACK device=PWRJACK
T 51000 49500 5 10 0 0 0 6 1 T 51500 49500 5 10 0 0 0 6 1
footprint=CONNECTOR_DC-005_2.0.lht footprint=CONNECTOR_DC-005_2.0.lht
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
lcsc=C16214 lcsc=C16214
T 51000 48400 5 10 0 1 0 0 1 T 51500 48400 5 10 0 1 0 0 1
description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm
T 51000 49100 5 10 1 1 0 6 1 T 51500 49100 5 10 1 1 0 6 1
refdes=J702 refdes=J702
T 51000 48200 5 10 1 1 0 6 1 T 51500 48200 5 10 1 1 0 6 1
value=OUT 6-40V value=OUT 6-40V
} }
C 49700 48600 1 270 0 GND.sym C 50200 48600 1 270 0 GND.sym
C 49900 48800 1 180 0 nc-right-1.sym C 50400 48800 1 180 0 nc-right-1.sym
{ {
T 49800 48300 5 10 0 0 180 0 1 T 50300 48300 5 10 0 0 180 0 1
value=NoConnection value=NoConnection
T 49800 48100 5 10 0 0 180 0 1 T 50300 48100 5 10 0 0 180 0 1
device=DRC_Directive device=DRC_Directive
T 49800 47500 5 10 0 0 180 0 1 T 50300 47500 5 10 0 0 180 0 1
symversion=1.1 symversion=1.1
} }
N 55200 47500 56000 47500 4 N 55200 47500 56000 47500 4
@ -166,22 +166,22 @@ refdes=R706
T 49300 51000 5 10 1 1 0 0 1 T 49300 51000 5 10 1 1 0 0 1
value=1k value=1k
} }
C 49400 48900 1 90 1 capacitor-2.sym C 49900 48900 1 90 1 capacitor-2.sym
{ {
T 48700 48700 5 10 0 0 270 2 1 T 49200 48700 5 10 0 0 270 2 1
device=AEC device=AEC
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
footprint=CAPPRD250W50D630H700N.lht footprint=CAPPRD250W50D630H700N.lht
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
lcsc=C47891 lcsc=C47891
T 49400 48900 5 10 0 0 0 0 1 T 49900 48900 5 10 0 0 0 0 1
description=capacitor, AEC, radial, >=50V, >=-20% description=capacitor, AEC, radial, >=50V, >=-20%
T 48500 48600 5 10 1 1 0 0 1 T 49800 48200 5 10 1 1 0 0 1
refdes=C702 refdes=C702
T 48500 48200 5 10 1 1 0 0 1 T 49800 48000 5 10 1 1 0 0 1
value=100uF value=100uF
} }
C 49100 47800 1 0 0 GND.sym C 49600 47800 1 0 0 GND.sym
C 57000 45800 1 90 1 C0603.sym C 57000 45800 1 90 1 C0603.sym
{ {
T 57000 45800 5 8 0 0 270 2 1 T 57000 45800 5 8 0 0 270 2 1
@ -220,7 +220,7 @@ value=USB2517-JZX
} }
T 47100 51100 9 10 1 0 0 0 1 T 47100 51100 9 10 1 0 0 0 1
active high active high
T 48400 45700 9 10 1 0 0 0 4 T 47200 45900 9 10 1 0 0 0 4
invert power invert power
control signal control signal
and handle and handle
@ -237,7 +237,7 @@ T 47100 50300 9 10 1 0 0 0 3
USB speed USB speed
indication indication
mode used mode used
T 45100 47300 9 10 1 0 90 0 2 T 46600 47900 9 10 1 0 0 0 2
voltage divider voltage divider
for Vgs limit for Vgs limit
C 53000 43000 1 0 0 title.sym C 53000 43000 1 0 0 title.sym
@ -373,7 +373,7 @@ T 57600 50900 5 10 0 0 0 0 1
footprint=CAPPRD200W45D500H700N.lht footprint=CAPPRD200W45D500H700N.lht
T 57600 50900 5 10 0 0 0 0 1 T 57600 50900 5 10 0 0 0 0 1
lcsc=C2940240 lcsc=C2940240
T 57600 50600 5 10 1 1 0 0 1 T 57500 50600 5 10 1 1 0 0 1
refdes=C701 refdes=C701
T 57500 50100 5 10 1 1 0 0 1 T 57500 50100 5 10 1 1 0 0 1
value=150uF value=150uF
@ -449,10 +449,10 @@ refdes=R704
T 45300 48300 5 10 1 1 0 0 1 T 45300 48300 5 10 1 1 0 0 1
value=100k value=100k
} }
T 46100 47200 9 10 1 0 0 0 3 T 49500 47100 9 10 1 0 0 0 3
only allow 6-40V output prevent feedback
if 6-40V available (only if 6-40V input
(else block feedback) is not present)
C 48500 47900 1 90 0 40P05.sym C 48500 47900 1 90 0 40P05.sym
{ {
T 48500 47900 5 8 0 0 270 8 1 T 48500 47900 5 8 0 0 270 8 1
@ -469,7 +469,6 @@ T 48260 48740 5 10 1 1 270 0 1
device=40P05 device=40P05
} }
N 45900 48900 46100 48900 4 N 45900 48900 46100 48900 4
N 45900 47800 48100 47800 4
C 46000 46900 1 90 0 resistor-1.sym C 46000 46900 1 90 0 resistor-1.sym
{ {
T 45600 47200 5 10 0 0 90 0 1 T 45600 47200 5 10 0 0 90 0 1
@ -495,15 +494,15 @@ T 47100 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 47100 45900 5 10 0 0 90 0 1 T 47100 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 46460 47140 5 10 1 1 180 6 1 T 46160 47140 5 10 1 1 180 6 1
refdes=Q705 refdes=Q705
T 46860 46740 5 10 1 1 90 8 1 T 46860 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
N 45900 48700 45900 48900 4 N 45900 48700 45900 48900 4
N 46700 45700 46700 45900 4 N 46700 45700 46700 45900 4
N 47900 45700 47900 45900 4 N 49500 45700 49500 45900 4
N 48500 48900 49900 48900 4 N 48500 48900 50400 48900 4
C 52400 51600 1 0 0 5V.sym C 52400 51600 1 0 0 5V.sym
N 56400 50700 56400 50900 4 N 56400 50700 56400 50900 4
N 53600 48400 55200 48400 4 N 53600 48400 55200 48400 4
@ -546,3 +545,49 @@ device=DIO7553
T 53500 51400 5 10 1 1 0 0 1 T 53500 51400 5 10 1 1 0 0 1
value=DIO7553ST6 value=DIO7553ST6
} }
C 48600 47800 1 270 1 resistor-1.sym
{
T 49000 48100 5 10 0 0 90 2 1
device=RESISTOR
T 49100 48000 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 48000 5 10 0 0 90 2 1
symversion=0.1
T 48700 48100 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 49300 48500 5 10 1 1 0 6 1
refdes=R708
T 49300 48300 5 10 1 1 0 6 1
value=100k
}
C 48600 46900 1 270 1 resistor-1.sym
{
T 49000 47200 5 10 0 0 90 2 1
device=RESISTOR
T 49100 47100 5 10 0 1 90 2 1
footprint=RESC1608X55N.lht
T 49300 47100 5 10 0 0 90 2 1
symversion=0.1
T 48700 47200 5 10 0 1 90 2 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 48900 47600 5 10 1 1 180 6 1
refdes=R709
T 48900 47400 5 10 1 1 180 6 1
value=100k
}
N 46500 47800 45900 47800 4
N 48100 47800 48700 47800 4
C 47300 46800 1 90 0 GND.sym
N 48700 48700 48700 48900 4
T 46100 47300 9 10 1 0 0 0 2
6-40V output switched
along USB power
T 50000 45700 9 10 1 0 0 0 5
WARNING:
reverse current possible
if USB port power enabled
and output voltage higher
than 6-40V input
T 55300 51100 9 10 1 0 0 0 2
also prevents reverse current
(when switched off)

53288
usb_hub.lht
View File

File diff suppressed because it is too large Load Diff