brd: complete routing
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@ -34,9 +34,9 @@
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"other_text_thickness": 0.15,
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"other_text_thickness": 0.15,
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"other_text_upright": false,
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"other_text_upright": false,
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"pads": {
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"pads": {
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"drill": 0.0,
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"drill": 0.65,
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"height": 6.1,
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"height": 0.7,
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"width": 2.4
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"width": 0.7
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},
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},
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"silk_line_width": 0.15,
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"silk_line_width": 0.15,
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"silk_text_italic": false,
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"silk_text_italic": false,
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@ -82,7 +82,7 @@
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"items_not_allowed": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"length_out_of_range": "error",
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"lib_footprint_issues": "warning",
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"lib_footprint_issues": "warning",
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"lib_footprint_mismatch": "warning",
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"lib_footprint_mismatch": "ignore",
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"malformed_courtyard": "error",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "warning",
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"missing_courtyard": "warning",
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@ -92,12 +92,12 @@
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"padstack": "error",
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"shorting_items": "error",
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"silk_edge_clearance": "warning",
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"silk_edge_clearance": "ignore",
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"silk_over_copper": "warning",
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"silk_over_copper": "warning",
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"silk_overlap": "warning",
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"silk_overlap": "warning",
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"skew_out_of_range": "error",
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"skew_out_of_range": "error",
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"solder_mask_bridge": "error",
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"solder_mask_bridge": "error",
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"starved_thermal": "error",
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"starved_thermal": "warning",
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"text_height": "warning",
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"text_height": "warning",
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"text_thickness": "warning",
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"text_thickness": "warning",
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"through_hole_pad_without_hole": "error",
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"through_hole_pad_without_hole": "error",
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@ -176,6 +176,7 @@
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],
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],
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"track_widths": [
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"track_widths": [
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0.0,
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0.0,
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0.15,
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0.2,
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0.2,
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0.3,
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0.3,
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0.5
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0.5
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@ -186,12 +187,12 @@
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"drill": 0.0
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"drill": 0.0
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},
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},
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{
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{
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"diameter": 0.3,
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"diameter": 0.6,
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"drill": 0.6
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"drill": 0.3
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},
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},
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{
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{
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"diameter": 0.4,
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"diameter": 0.8,
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"drill": 0.8
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"drill": 0.4
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}
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}
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],
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],
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"zones_allow_external_fillets": false,
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"zones_allow_external_fillets": false,
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@ -482,7 +483,20 @@
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},
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},
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"net_colors": null,
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"net_colors": null,
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"netclass_assignments": null,
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"netclass_assignments": null,
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"netclass_patterns": []
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"netclass_patterns": [
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{
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"netclass": "Thick",
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"pattern": "+3.3V"
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},
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{
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"netclass": "Thick",
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"pattern": "/VBUS"
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},
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{
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"netclass": "Thick",
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"pattern": "GNDPWR"
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}
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]
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},
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},
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"pcbnew": {
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"pcbnew": {
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"last_paths": {
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"last_paths": {
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@ -3391,7 +3391,7 @@
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(effects (font (size 1.27 1.27)) (justify left bottom))
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(effects (font (size 1.27 1.27)) (justify left bottom))
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(uuid c5021a19-8743-43ed-afaa-12a112d46b19)
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(uuid c5021a19-8743-43ed-afaa-12a112d46b19)
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)
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)
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(label "DCC1" (at 106.68 85.09 0) (fields_autoplaced)
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(label "DCC2" (at 106.68 85.09 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left bottom))
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(effects (font (size 1.27 1.27)) (justify left bottom))
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(uuid c645fd87-f5e1-4549-b25e-d13c23ede971)
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(uuid c645fd87-f5e1-4549-b25e-d13c23ede971)
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)
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)
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