softi2c_master: add software implementation I²C library
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/** library to communicate using I²C as master, implemented in software
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* @file
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* @author King Kévin <kingkevin@cuvoodoo.info>
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* @copyright SPDX-License-Identifier: GPL-3.0-or-later
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* @date 2021
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* @note I implemented I²C in software because the hardware peripheral is hard to use, and buggy (I was not able to get rid of clock glitches corrupting the communication, undetected)
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* @note some methods copied from Wikipedia https://en.wikipedia.org/wiki/I%C2%B2C
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*/
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/* standard libraries */
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#include <stdint.h> // standard integer types
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#include <stdbool.h> // boolean types
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#include <stdlib.h> // general utilities
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/* own libraries */
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#include "stm8s.h" // STM8S definitions
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#include "softi2c_master.h" // software I²C header and definitions
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// half period to wait for I²C clock
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static uint16_t period = 0;
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#define SDA_PORT GPIO_PB
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#define SDA_PIN PB5
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#define SCL_PORT GPIO_PB
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#define SCL_PIN PB4
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// delay for half a period
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static void I2C_delay(void)
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{
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for (volatile uint16_t i = 0; i < period; i++);
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}
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// Return current level of SCL line, 0 or 1
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static inline bool read_SCL(void)
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{
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return (SCL_PORT->IDR.reg & SCL_PIN);
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}
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// Return current level of SDA line, 0 or 1
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static inline bool read_SDA(void)
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{
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return (SDA_PORT->IDR.reg & SDA_PIN);
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}
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// Do not drive SCL (set pin high-impedance)
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static inline void set_SCL(void)
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{
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SCL_PORT->ODR.reg |= SCL_PIN;
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}
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// Actively drive SCL signal low
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static inline void clear_SCL(void)
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{
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SCL_PORT->ODR.reg &= ~SCL_PIN;
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}
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// Do not drive SDA (set pin high-impedance)
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static inline void set_SDA(void)
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{
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SDA_PORT->ODR.reg |= SDA_PIN;
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}
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// Actively drive SDA signal low
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static inline void clear_SDA(void)
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{
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SDA_PORT->ODR.reg &= ~SDA_PIN;
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}
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bool softi2c_master_setup(uint16_t freq_khz)
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{
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// enforce minimal frequency
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if (0 == freq_khz) {
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freq_khz = 1;
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}
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// calculated period from frequency (hand tuned value using 16 MHz clock)
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period = 589 / (1 << CLK->CKDIVR.fields.HSIDIV) / (1 << CLK->CKDIVR.fields.CPUDIV) / freq_khz;
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// switch pins to open drain
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SCL_PORT->ODR.reg |= SCL_PIN; // ensure clock is high
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SCL_PORT->DDR.reg |= SCL_PIN; // switch pin to output
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SCL_PORT->CR1.reg &= ~SCL_PIN; // use in open-drain mode
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SDA_PORT->ODR.reg |= SDA_PIN; // ensure data is high
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SDA_PORT->DDR.reg |= SDA_PIN; // switch pin to output
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SDA_PORT->CR1.reg &= ~SDA_PIN; // use in open-drain mode
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I2C_delay(); // give time to get high
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return (read_SCL() && read_SDA());
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}
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void softi2c_master_release(void)
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{
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SCL_PORT->DDR.reg &= ~SCL_PIN; // switch pin to input
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SDA_PORT->DDR.reg &= ~SDA_PIN; // switch pin to input
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}
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// if transaction has already started
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static bool started = false;
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bool softi2c_master_start(void)
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{
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if (started) {
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// if started, do a restart condition
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// set SDA to 1
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set_SDA();
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I2C_delay();
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set_SCL();
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while (read_SCL() == 0); // Clock stretching
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// Repeated start setup time, minimum 4.7us
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I2C_delay();
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}
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if (read_SDA() == 0) {
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return false;
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}
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// SCL is high, set SDA from 1 to 0.
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clear_SDA();
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I2C_delay();
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clear_SCL();
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started = true;
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return true;
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}
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bool softi2c_master_stop(void)
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{
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// set SDA to 0
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clear_SDA();
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I2C_delay();
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set_SCL();
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while (read_SCL() == 0); // Clock stretching
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I2C_delay(); // Stop bit setup time, minimum 4us
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// SCL is high, set SDA from 0 to 1
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set_SDA();
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I2C_delay();
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if (read_SDA() == 0) {
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return false;
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}
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started = false;
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return true;
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}
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// Write a bit to I²C bus
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static bool softi2c_master_write_bit(bool bit) {
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// set data bit
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if (bit) {
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set_SDA();
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} else {
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clear_SDA();
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}
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I2C_delay(); // SDA change propagation delay
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set_SCL(); // Set SCL high to indicate a new valid SDA value is available
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I2C_delay(); // Wait for SDA value to be read by slave, minimum of 4us for standard mode
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while (read_SCL() == 0); // Clock stretching
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// SCL is high, now data is valid
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if (bit && (read_SDA() == 0)) { // If SDA is high, check that nobody else is driving SDA
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return false;
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}
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clear_SCL(); // Clear the SCL to low in preparation for next change
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return true;
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}
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// Read a bit from I²C bus
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static bool softi2c_master_read_bit(void) {
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set_SDA(); // Let the slave drive data
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I2C_delay(); // Wait for SDA value to be written by slave, minimum of 4us for standard mode
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set_SCL(); // Set SCL high to indicate a new valid SDA value is available
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while (read_SCL() == 0); // Clock stretching
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I2C_delay(); // Wait for SDA value to be written by slave, minimum of 4us for standard mode
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const bool bit = read_SDA(); // SCL is high, read out bit
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clear_SCL(); // Set SCL low in preparation for next operation
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return bit;
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}
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// Write a byte to I2C bus. Return true if ACK by the slave.
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static bool softi2c_master_write_byte(uint8_t byte)
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{
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for (uint8_t bit = 0; bit < 8; ++bit) {
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softi2c_master_write_bit((byte & 0x80) != 0);
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byte <<= 1;
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}
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const bool nack = softi2c_master_read_bit();
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return !nack;
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}
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// Read a byte from I²C bus
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static uint8_t softi2c_master_read_byte(bool nack)
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{
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uint8_t byte = 0;
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for (uint8_t bit = 0; bit < 8; ++bit) {
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byte = (byte << 1) | softi2c_master_read_bit();
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}
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softi2c_master_write_bit(nack);
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return byte;
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}
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bool softi2c_master_select_slave(uint8_t slave, bool write)
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{
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if (!softi2c_master_start()) { // send (re-)start condition
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return false;
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}
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const uint8_t byte = (slave << 1) | (write ? 0 : 1); // select slave, with read/write flag
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return softi2c_master_write_byte(byte); // select slave
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}
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bool softi2c_master_read(uint8_t* data, uint16_t data_size)
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{
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if (NULL == data || 0 == data_size) { // no data to read
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return false;
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}
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for (uint16_t i = 0; i < data_size; i++) { // read bytes
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IWDG->KR.fields.KEY = IWDG_KR_KEY_REFRESH; // reset watchdog
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if (1 == (data_size - i)) { // last byte
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data[i] = softi2c_master_read_byte(true); // NACK after reading byte
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} else {
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data[i] = softi2c_master_read_byte(false); // ACK after reading byte
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}
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}
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return softi2c_master_stop();
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}
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bool softi2c_master_write(const uint8_t* data, uint16_t data_size)
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{
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if (NULL == data || 0 == data_size) { // no data to read
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return true; // we don't indicate an error because the stop is done separately
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}
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// write data
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for (uint16_t i = 0; i < data_size; i++) { // write bytes
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if (!softi2c_master_write_byte(data[i])) { // write byte
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return false;
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}
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}
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return true;
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}
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bool softi2c_master_slave_read(uint8_t slave, uint8_t* data, uint16_t data_size)
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{
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if (NULL == data && data_size > 0) { // no data to read
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return false;
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}
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if (!softi2c_master_select_slave(slave, false)) { // select slave to read
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softi2c_master_stop();
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return false;
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}
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if (NULL != data && data_size > 0) { // only read data if needed
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if (!softi2c_master_read(data, data_size)) { // read data (includes stop)
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return false;
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}
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}
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return true;
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}
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bool softi2c_master_slave_write(uint8_t slave, const uint8_t* data, uint16_t data_size)
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{
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if (NULL == data && data_size > 0) { // no data to read
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return false;
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}
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bool rc = false;
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if (!softi2c_master_select_slave(slave, true)) { // select slave to write
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goto error;
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}
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if (NULL != data && data_size > 0) { // write data only is some is available
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if (!softi2c_master_write(data, data_size)) { // write data
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goto error;
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}
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}
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rc = true; // all went well
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error:
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rc = softi2c_master_stop() && rc; // sent stop condition
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return rc;
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}
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bool softi2c_master_address_read(uint8_t slave, const uint8_t* address, uint16_t address_size, uint8_t* data, uint16_t data_size)
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{
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if (address_size > 0 && NULL == address) {
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return false;
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}
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if (data_size > 0 && NULL == data) {
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return false;
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}
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bool rc = false;
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rc = softi2c_master_select_slave(slave, true); // select slave to write
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if (!rc) {
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goto error;
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}
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// write address
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if (NULL != address && address_size > 0) {
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rc = softi2c_master_write(address, address_size); // send memory address
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if (!rc) {
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goto error;
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}
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}
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// read data
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if (NULL != data && data_size > 0) {
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rc = softi2c_master_select_slave(slave, false); // re-select slave to read
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if (!rc) {
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goto error;
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}
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rc = softi2c_master_read(data, data_size); // read memory (includes stop)
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if (!rc) {
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goto error;
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}
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} else {
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softi2c_master_stop(); // sent stop condition
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}
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rc = true;
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error:
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if (!rc) { // only send stop on error
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softi2c_master_stop(); // sent stop condition
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}
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return rc;
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}
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bool softi2c_master_address_write(uint8_t slave, const uint8_t* address, uint16_t address_size, const uint8_t* data, uint16_t data_size)
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{
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if (address_size > 0 && NULL == address) {
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return false;
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}
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if (data_size > 0 && NULL == data) {
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return false;
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}
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bool rc = false;
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rc = softi2c_master_select_slave(slave, true); // select slave to write
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if (!rc) {
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goto error;
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}
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if (address_size && address) {
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rc = softi2c_master_write(address, address_size); // send memory address
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if (!rc) {
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goto error;
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}
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}
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if (data_size && data) {
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rc = softi2c_master_write(data, data_size); // send memory data
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if (!rc) {
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goto error;
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}
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}
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rc = softi2c_master_stop(); // sent stop condition
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if (!rc) {
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return false;
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}
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rc = true; // all went fine
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error:
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if (!rc) {
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softi2c_master_stop(); // send stop on error
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}
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return rc;
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}
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@ -0,0 +1,83 @@
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/** library to communicate using I²C as master, implemented in software
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* @file
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* @author King Kévin <kingkevin@cuvoodoo.info>
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* @copyright SPDX-License-Identifier: GPL-3.0-or-later
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* @date 2021
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*/
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#pragma once
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/** setup I²C peripheral
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* @param[in] freq_khz desired clock frequency, in kHz
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* @return if I²C bus is ready
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*/
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bool softi2c_master_setup(uint16_t freq_khz);
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/** release I²C peripheral */
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void softi2c_master_release(void);
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/** send start condition
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* @return if start sent (else arbitration lost)
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*/
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bool softi2c_master_start(void);
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/** sent stop condition
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* @param[in] i2c I²C base address
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* @return if stop sent (else arbitration lost)
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*/
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bool softi2c_master_stop(void);
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/** select I²C slave device
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* @param[in] slave I²C address of slave device to select
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* @param[in] write this transaction will be followed by a read (false) or write (true) operation
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* @return if slave ACKed
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* @note includes (re-)start condition
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*/
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bool softi2c_master_select_slave(uint8_t slave, bool write);
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/** read data over I²C
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* @param[out] data array to store bytes read
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* @param[in] data_size number of bytes to read
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* @return if read succeeded (else arbitration lost)
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* @warning the slave device must be selected before this operation
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* @note includes sending stop (after having NACKed last received byte)
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*/
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bool softi2c_master_read(uint8_t* data, uint16_t data_size);
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/** write data over I²C
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* @param[in] data array of byte to write to slave
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* @param[in] data_size number of bytes to write
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* @return if write succeeded (else data has been NACKed)
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* @warning the slave device must be selected before this operation
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* @note no stop condition is sent at the end, allowing multiple writes
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*/
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bool softi2c_master_write(const uint8_t* data, uint16_t data_size);
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/** read data from slave device
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* @param[in] slave I²C address of slave device to select
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* @param[out] data array to store bytes read
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* @param[in] data_size number of bytes to read
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* @return if read succeeded (else arbitration has been lost)
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* @note start and stop conditions are included
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*/
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bool softi2c_master_slave_read(uint8_t slave, uint8_t* data, uint16_t data_size);
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/** write data to slave device
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* @param[in] slave I²C address of slave device to select
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* @param[in] data array of byte to write to slave
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* @param[in] data_size number of bytes to write
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* @return if write succeeded
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* @note start and stop conditions are included
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*/
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bool softi2c_master_slave_write(uint8_t slave, const uint8_t* data, uint16_t data_size);
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/** read data at specific address from an I²C memory slave
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* @param[in] slave I²C address of slave device to select
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* @param[in] address memory address of slave to read from
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* @param[in] address_size address size in bytes
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* @param[out] data array to store bytes read
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* @param[in] data_size number of bytes to read
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* @return if read succeeded
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* @note start and stop conditions are included
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*/
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bool softi2c_master_address_read(uint8_t slave, const uint8_t* address, uint16_t address_size, uint8_t* data, uint16_t data_size);
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/** write data at specific address on an I²C memory slave
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* @param[in] slave I²C address of slave device to select
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* @param[in] address memory address of slave to write to
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* @param[in] address_size address size in bytes
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* @param[in] data array of byte to write to slave
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* @param[in] data_size number of bytes to write
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* @return if write succeeded
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* @note start and stop conditions are included
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*/
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bool softi2c_master_address_write(uint8_t slave, const uint8_t* address, uint16_t address_size, const uint8_t* data, uint16_t data_size);
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