i2c_master: minor, fix doc
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lib/i2c_master.c
100
lib/i2c_master.c
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@ -12,8 +12,8 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/** library to communicate using I2C as master (code)
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* @file i2c_master.c
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/** library to communicate using I²C as master (code)
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* @file
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* @author King Kévin <kingkevin@cuvoodoo.info>
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* @date 2017-2019
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* @note peripherals used: I2C
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@ -28,15 +28,15 @@
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#include <libopencm3/cm3/assert.h> // assert utilities
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#include <libopencm3/stm32/rcc.h> // real-time control clock library
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#include <libopencm3/stm32/gpio.h> // general purpose input output library
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#include <libopencm3/stm32/i2c.h> // I2C library
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#include <libopencm3/stm32/i2c.h> // I²C library
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/* own libraries */
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#include "global.h" // global utilities
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#include "i2c_master.h" // I2C header and definitions
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#include "i2c_master.h" // I²C header and definitions
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/** get RCC for I2C based on I2C identifier
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* @param[in] i2c I2C base address
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* @return RCC address for I2C peripheral
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/** get RCC for I²C based on I²C identifier
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* @param[in] i2c I²C base address
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* @return RCC address for I²C peripheral
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*/
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static uint32_t RCC_I2C(uint32_t i2c)
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{
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@ -54,8 +54,8 @@ static uint32_t RCC_I2C(uint32_t i2c)
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}
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}
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/** get RCC for GPIO port for SCL pin based on I2C identifier
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* @param[in] i2c I2C base address
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/** get RCC for GPIO port for SCL pin based on I²C identifier
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* @param[in] i2c I²C base address
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* @return RCC GPIO address
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*/
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static uint32_t RCC_GPIO_PORT_SCL(uint32_t i2c)
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@ -72,8 +72,8 @@ static uint32_t RCC_GPIO_PORT_SCL(uint32_t i2c)
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}
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}
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/** get RCC for GPIO port for SDA pin based on I2C identifier
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* @param[in] i2c I2C base address
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/** get RCC for GPIO port for SDA pin based on I²C identifier
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* @param[in] i2c I²C base address
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* @return RCC GPIO address
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*/
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static uint32_t RCC_GPIO_PORT_SDA(uint32_t i2c)
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@ -90,8 +90,8 @@ static uint32_t RCC_GPIO_PORT_SDA(uint32_t i2c)
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}
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}
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/** get GPIO port for SCL pin based on I2C identifier
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* @param[in] i2c I2C base address
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/** get GPIO port for SCL pin based on I²C identifier
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* @param[in] i2c I²C base address
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* @return GPIO address
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*/
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static uint32_t GPIO_PORT_SCL(uint32_t i2c)
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@ -114,8 +114,8 @@ static uint32_t GPIO_PORT_SCL(uint32_t i2c)
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}
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}
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/** get GPIO port for SDA pin based on I2C identifier
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* @param[in] i2c I2C base address
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/** get GPIO port for SDA pin based on I²C identifier
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* @param[in] i2c I²C base address
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* @return GPIO address
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*/
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static uint32_t GPIO_PORT_SDA(uint32_t i2c)
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@ -138,8 +138,8 @@ static uint32_t GPIO_PORT_SDA(uint32_t i2c)
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}
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}
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/** get GPIO pin for SCL pin based on I2C identifier
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* @param[in] i2c I2C base address
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/** get GPIO pin for SCL pin based on I²C identifier
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* @param[in] i2c I²C base address
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* @return GPIO address
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*/
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static uint32_t GPIO_PIN_SCL(uint32_t i2c)
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@ -162,8 +162,8 @@ static uint32_t GPIO_PIN_SCL(uint32_t i2c)
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}
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}
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/** get GPIO pin for SDA pin based on I2C identifier
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* @param[in] i2c I2C base address
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/** get GPIO pin for SDA pin based on I²C identifier
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* @param[in] i2c I²C base address
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* @return GPIO address
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*/
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static uint32_t GPIO_PIN_SDA(uint32_t i2c)
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@ -190,17 +190,17 @@ void i2c_master_setup(uint32_t i2c, uint16_t frequency)
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{
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cm3_assert(I2C1 == i2c || I2C2 == i2c);
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// configure I2C peripheral
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rcc_periph_clock_enable(RCC_GPIO_PORT_SCL(i2c)); // enable clock for I2C I/O peripheral
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// configure I²C peripheral
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rcc_periph_clock_enable(RCC_GPIO_PORT_SCL(i2c)); // enable clock for I²C I/O peripheral
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gpio_set(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // already put signal high to avoid small pulse
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gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SCL(i2c)); // setup I2C I/O pins
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rcc_periph_clock_enable(RCC_GPIO_PORT_SDA(i2c)); // enable clock for I2C I/O peripheral
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gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SCL(i2c)); // setup I²C I/O pins
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rcc_periph_clock_enable(RCC_GPIO_PORT_SDA(i2c)); // enable clock for I²C I/O peripheral
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gpio_set(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // already put signal high to avoid small pulse
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gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SDA(i2c)); // setup I2C I/O pins
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gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SDA(i2c)); // setup I²C I/O pins
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rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function
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rcc_periph_clock_enable(RCC_I2C(i2c)); // enable clock for I2C peripheral
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rcc_periph_clock_enable(RCC_I2C(i2c)); // enable clock for I²C peripheral
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i2c_reset(i2c); // reset peripheral domain
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i2c_peripheral_disable(i2c); // I2C needs to be disable to be configured
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i2c_peripheral_disable(i2c); // I²C needs to be disable to be configured
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I2C_CR1(i2c) |= I2C_CR1_SWRST; // reset peripheral
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I2C_CR1(i2c) &= ~I2C_CR1_SWRST; // clear peripheral reset
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if (0==frequency) { // don't allow null frequency
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@ -218,18 +218,18 @@ void i2c_master_setup(uint32_t i2c, uint16_t frequency)
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i2c_set_ccr(i2c, rcc_apb1_frequency / (frequency * 1000 * 2)); // set Thigh/Tlow to generate frequency of 100 kHz
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i2c_set_trise(i2c, (1000 / (1000 / (rcc_apb1_frequency / 1000000))) + 1); // max rise time for Sm mode (< 100 kHz) is 1000 ns (~1 MHz)
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}
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i2c_peripheral_enable(i2c); // enable I2C after configuration completed
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i2c_peripheral_enable(i2c); // enable I²C after configuration completed
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}
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void i2c_master_release(uint32_t i2c)
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{
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cm3_assert(I2C1 == i2c || I2C2 == i2c);
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i2c_reset(i2c); // reset I2C peripheral configuration
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i2c_peripheral_disable(i2c); // disable I2C peripheral
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rcc_periph_clock_disable(RCC_I2C(i2c)); // disable clock for I2C peripheral
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gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_PIN_SCL(i2c)); // put I2C I/O pins back to floating
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gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_PIN_SDA(i2c)); // put I2C I/O pins back to floating
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i2c_reset(i2c); // reset I²C peripheral configuration
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i2c_peripheral_disable(i2c); // disable I²C peripheral
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rcc_periph_clock_disable(RCC_I2C(i2c)); // disable clock for I²C peripheral
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gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_PIN_SCL(i2c)); // put I²C I/O pins back to floating
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gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_PIN_SDA(i2c)); // put I²C I/O pins back to floating
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}
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bool i2c_master_check_signals(uint32_t i2c)
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@ -264,11 +264,11 @@ bool i2c_master_reset(uint32_t i2c)
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bool to_return = true;
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// follow procedure described in STM32F10xxC/D/E Errata sheet, Section 2.14.7
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i2c_peripheral_disable(i2c); // disable i2c peripheral
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gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN_SCL(i2c)); // put I2C I/O pins to general output
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i2c_peripheral_disable(i2c); // disable I²C peripheral
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gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN_SCL(i2c)); // put I²C I/O pins to general output
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gpio_set(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // set high
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to_return &= !gpio_get(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // ensure it is high
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gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN_SDA(i2c)); // put I2C I/O pins to general output
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gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN_SDA(i2c)); // put I²C I/O pins to general output
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gpio_set(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // set high
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to_return &= !gpio_get(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // ensure it is high
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gpio_clear(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // set low (try first transition)
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@ -279,8 +279,8 @@ bool i2c_master_reset(uint32_t i2c)
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to_return &= !gpio_get(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // ensure it is high
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gpio_set(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // set high (try second transition)
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to_return &= !gpio_get(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // ensure it is high
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gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SCL(i2c)); // set I2C I/O pins back
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gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SDA(i2c)); // set I2C I/O pins back
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gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SCL(i2c)); // set I²C I/O pins back
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gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SDA(i2c)); // set I²C I/O pins back
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I2C_CR1(i2c) |= I2C_CR1_SWRST; // reset device
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I2C_CR1(i2c) &= ~I2C_CR1_SWRST; // reset device
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i2c_peripheral_enable(i2c); // re-enable device
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@ -300,7 +300,7 @@ try:
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if (I2C_CR1(i2c) & (I2C_CR1_START | I2C_CR1_STOP)) { // ensure start or stop operations are not in progress
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return I2C_MASTER_RC_START_STOP_IN_PROGESS;
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}
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// prepare timer in case the peripheral hangs on sending stop condition (see errata 2.14.4 Wrong behavior of I2C peripheral in master mode after a misplaced Stop)
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// prepare timer in case the peripheral hangs on sending stop condition (see errata 2.14.4 Wrong behavior of I²C peripheral in master mode after a misplaced Stop)
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systick_counter_disable(); // disable SysTick to reconfigure it
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systick_set_frequency(500, rcc_ahb_frequency); // set timer to 2 ms (that should be long enough to send a start condition)
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systick_clear(); // reset SysTick (set to 0)
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@ -342,14 +342,14 @@ enum i2c_master_rc i2c_master_select_slave(uint32_t i2c, uint16_t slave, bool ad
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{
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cm3_assert(I2C1 == i2c || I2C2 == i2c);
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I²C return codes
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if (!(I2C_SR1(i2c) & I2C_SR1_SB)) { // start condition has not been sent
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rc = i2c_master_start(i2c); // send start condition
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if (I2C_MASTER_RC_NONE != rc) {
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return rc;
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}
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}
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if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I2C device is not in master mode
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if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I²C device is not in master mode
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return I2C_MASTER_RC_NOT_MASTER;
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}
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@ -423,10 +423,10 @@ enum i2c_master_rc i2c_master_read(uint32_t i2c, uint8_t* data, size_t data_size
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i2c_enable_ack(i2c); // NAK after next byte
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}
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// reading SR2 will also also clear ADDR and start the transaction
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if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I2C device is not master
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if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I²C device is not master
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return I2C_MASTER_RC_NOT_MASTER;
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}
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if ((I2C_SR2(i2c) & I2C_SR2_TRA)) { // I2C device not in receiver mode
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if ((I2C_SR2(i2c) & I2C_SR2_TRA)) { // I²C device not in receiver mode
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return I2C_MASTER_RC_NOT_RECEIVE;
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}
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if (I2C_SR1(i2c) & I2C_SR1_AF) { // check if the previous transaction went well
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@ -462,10 +462,10 @@ enum i2c_master_rc i2c_master_write(uint32_t i2c, const uint8_t* data, size_t da
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if (NULL == data || 0 == data_size) { // no data to write
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return I2C_MASTER_RC_NONE;
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}
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if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I2C device is not master
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if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I²C device is not master
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return I2C_MASTER_RC_NOT_MASTER;
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}
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if (!(I2C_SR2(i2c) & I2C_SR2_TRA)) { // I2C device not in transmitter mode
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if (!(I2C_SR2(i2c) & I2C_SR2_TRA)) { // I²C device not in transmitter mode
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return I2C_MASTER_RC_NOT_TRANSMIT;
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}
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if (I2C_SR1(i2c) & I2C_SR1_AF) { // check if the previous transaction went well
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@ -505,7 +505,7 @@ enum i2c_master_rc i2c_master_stop(uint32_t i2c)
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}
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enum i2c_master_rc to_return = I2C_MASTER_RC_NONE;
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// prepare timer in case the peripheral hangs on sending stop condition (see errata 2.14.4 Wrong behavior of I2C peripheral in master mode after a misplaced Stop)
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// prepare timer in case the peripheral hangs on sending stop condition (see errata 2.14.4 Wrong behavior of I²C peripheral in master mode after a misplaced Stop)
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systick_counter_disable(); // disable SysTick to reconfigure it
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systick_set_frequency(500, rcc_ahb_frequency); // set timer to 2 ms (that should be long enough to send a stop condition)
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systick_clear(); // reset SysTick (set to 0)
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@ -540,9 +540,9 @@ enum i2c_master_rc i2c_master_slave_read(uint32_t i2c, uint16_t slave, bool addr
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{
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cm3_assert(I2C1 == i2c || I2C2 == i2c);
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I²C return codes
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rc = i2c_master_start(i2c); // send (re-)start condition
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if (I2C_MASTER_RC_NONE!=rc) {
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if (I2C_MASTER_RC_NONE != rc) {
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return rc;
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}
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rc = i2c_master_select_slave(i2c, slave, address_10bit, false); // select slave to read
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@ -566,7 +566,7 @@ enum i2c_master_rc i2c_master_slave_write(uint32_t i2c, uint16_t slave, bool add
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{
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cm3_assert(I2C1 == i2c || I2C2 == i2c);
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I²C return codes
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rc = i2c_master_start(i2c); // send (re-)start condition
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if (I2C_MASTER_RC_NONE != rc) {
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return rc;
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@ -592,7 +592,7 @@ enum i2c_master_rc i2c_master_address_read(uint32_t i2c, uint16_t slave, bool ad
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{
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cm3_assert(I2C1 == i2c || I2C2 == i2c);
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I²C return codes
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rc = i2c_master_start(i2c); // send (re-)start condition
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if (I2C_MASTER_RC_NONE != rc) {
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return rc;
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@ -635,7 +635,7 @@ enum i2c_master_rc i2c_master_address_write(uint32_t i2c, uint16_t slave, bool a
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{
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cm3_assert(I2C1 == i2c || I2C2 == i2c);
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
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enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I²C return codes
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rc = i2c_master_start(i2c); // send (re-)start condition
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if (I2C_MASTER_RC_NONE != rc) {
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return rc;
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@ -12,34 +12,34 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/** library to communicate using I2C as master (API)
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* @file i2c_master.h
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/** library to communicate using I²C as master (API)
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* @file
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* @author King Kévin <kingkevin@cuvoodoo.info>
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* @date 2017-2019
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* @note peripherals used: I2C
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* @note peripherals used: I²C
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*/
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||||
#pragma once
|
||||
|
||||
/** I2C return codes */
|
||||
/** I²C return codes */
|
||||
enum i2c_master_rc {
|
||||
I2C_MASTER_RC_NONE = 0, /**< no error */
|
||||
I2C_MASTER_RC_START_STOP_IN_PROGESS, /**< a start or stop condition is already in progress */
|
||||
I2C_MASTER_RC_NOT_MASTER, /**< not in master mode */
|
||||
I2C_MASTER_RC_NOT_TRANSMIT, /**< not in transmit mode */
|
||||
I2C_MASTER_RC_NOT_RECEIVE, /**< not in receive mode */
|
||||
I2C_MASTER_RC_NOT_READY, /**< slave is not read (previous operations has been nacked) */
|
||||
I2C_MASTER_RC_NOT_READY, /**< slave is not read (previous operations has been NACKed) */
|
||||
I2C_MASTER_RC_NAK, /**< not acknowledge received */
|
||||
I2C_MASTER_RC_BUS_ERROR, /**< an error on the I2C bus occurred */
|
||||
I2C_MASTER_RC_BUS_ERROR, /**< an error on the I²C bus occurred */
|
||||
};
|
||||
|
||||
/** setup I2C peripheral
|
||||
* @param[in] i2c I2C base address
|
||||
/** setup I²C peripheral
|
||||
* @param[in] i2c I²C base address
|
||||
* @param[in] frequency frequency to use in kHz (1-400)
|
||||
* @note Standard mode (Sm) is used for frequencies up to 100 kHz, and Fast mode (Fm) is used for frequencies up to 400 kHz
|
||||
*/
|
||||
void i2c_master_setup(uint32_t i2c, uint16_t frequency);
|
||||
/** release I2C peripheral
|
||||
* @param[in] i2c I2C base address
|
||||
/** release I²C peripheral
|
||||
* @param[in] i2c I²C base address
|
||||
*/
|
||||
void i2c_master_release(uint32_t i2c);
|
||||
/** reset I2C peripheral, fixing any locked state
|
||||
|
|
@ -50,85 +50,83 @@ void i2c_master_release(uint32_t i2c);
|
|||
*/
|
||||
bool i2c_master_reset(uint32_t i2c);
|
||||
/** check if SDA and SCL signals are high
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] i2c I²C base address
|
||||
* @return SDA and SCL signals are high
|
||||
*/
|
||||
bool i2c_master_check_signals(uint32_t i2c);
|
||||
/** send start condition
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] i2c I²C base address
|
||||
* @return I2C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_start(uint32_t i2c);
|
||||
/** select I2C slave device
|
||||
/** select I²C slave device
|
||||
* @warning a start condition should be sent before this operation
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] slave I2C address of slave device to select
|
||||
* @param[in] address_10bit if the I2C slave address is 10 bits wide
|
||||
* @param[in] i2c I²C base address
|
||||
* @param[in] slave I²C address of slave device to select
|
||||
* @param[in] address_10bit if the I²C slave address is 10 bits wide
|
||||
* @param[in] write this transaction will be followed by a read (false) or write (true) operation
|
||||
* @return I2C return code
|
||||
* @return I²C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_select_slave(uint32_t i2c, uint16_t slave, bool address_10bit, bool write);
|
||||
/** read data over I2C
|
||||
/** read data over I²C
|
||||
* @warning the slave device must be selected before this operation
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] i2c I²C base address
|
||||
* @param[out] data array to store bytes read
|
||||
* @param[in] data_size number of bytes to read
|
||||
* @note the last read byte is NACKed, but the I2C peripheral will clock the read for at least 2 more bytes after the NACK
|
||||
* @return I2C return code
|
||||
* @note the last read byte is NACKed, but the I²C peripheral will clock the read for at least 2 more bytes after the NACK
|
||||
* @return I²C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_read(uint32_t i2c, uint8_t* data, size_t data_size);
|
||||
/** write data over I2C
|
||||
/** write data over I²C
|
||||
* @warning the slave device must be selected before this operation
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] i2c I²C base address
|
||||
* @param[in] data array of byte to write to slave
|
||||
* @param[in] data_size number of bytes to write
|
||||
* @return I2C return code
|
||||
* @return I²C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_write(uint32_t i2c, const uint8_t* data, size_t data_size);
|
||||
/** sent stop condition
|
||||
* @param[in] i2c I2C base address
|
||||
* @return I2C return code
|
||||
* @param[in] i2c I²C base address
|
||||
* @return I²C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_stop(uint32_t i2c);
|
||||
/** read data from slave device
|
||||
* @warning the slave device must be selected before this operation
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] slave I2C address of slave device to select
|
||||
* @param[in] address_10bit if the I2C slave address is 10 bits wide
|
||||
* @param[in] i2c I²C base address
|
||||
* @param[in] slave I²C address of slave device to select
|
||||
* @param[in] address_10bit if the I²C slave address is 10 bits wide
|
||||
* @param[out] data array to store bytes read
|
||||
* @param[in] data_size number of bytes to read
|
||||
* @return I2C return code
|
||||
* @return I²C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_slave_read(uint32_t i2c, uint16_t slave, bool address_10bit, uint8_t* data, size_t data_size);
|
||||
/** write data to slave device
|
||||
* @warning the slave device must be selected before this operation
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] slave I2C address of slave device to select
|
||||
* @param[in] address_10bit if the I2C slave address is 10 bits wide
|
||||
* @param[in] i2c I²C base address
|
||||
* @param[in] slave I²C address of slave device to select
|
||||
* @param[in] address_10bit if the I²C slave address is 10 bits wide
|
||||
* @param[in] data array of byte to write to slave
|
||||
* @param[in] data_size number of bytes to write
|
||||
* @return I2C return code
|
||||
* @return I²C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_slave_write(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t* data, size_t data_size);
|
||||
/** read data at specific address from an I2C memory slave
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] slave I2C address of slave device to select
|
||||
* @param[in] address_10bit if the I2C slave address is 10 bits wide
|
||||
/** read data at specific address from an I²C memory slave
|
||||
* @param[in] i2c I²C base address
|
||||
* @param[in] slave I²C address of slave device to select
|
||||
* @param[in] address_10bit if the I²C slave address is 10 bits wide
|
||||
* @param[in] address memory address of slave to read from
|
||||
* @param[in] address_size address size in bytes
|
||||
* @param[out] data array to store bytes read
|
||||
* @param[in] data_size number of bytes to read
|
||||
* @return I2C return code
|
||||
* @return I²C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_address_read(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size);
|
||||
/** write data at specific address on an I2C memory slave
|
||||
* @param[in] i2c I2C base address
|
||||
* @param[in] slave I2C address of slave device to select
|
||||
* @param[in] address_10bit if the I2C slave address is 10 bits wide
|
||||
/** write data at specific address on an I²C memory slave
|
||||
* @param[in] i2c I²C base address
|
||||
* @param[in] slave I²C address of slave device to select
|
||||
* @param[in] address_10bit if the I²C slave address is 10 bits wide
|
||||
* @param[in] address memory address of slave to write to
|
||||
* @param[in] address_size address size in bytes
|
||||
* @param[in] data array of byte to write to slave
|
||||
* @param[in] data_size number of bytes to write
|
||||
* @return I2C return code
|
||||
* @return I²C return code
|
||||
*/
|
||||
enum i2c_master_rc i2c_master_address_write(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size);
|
||||
|
|
|
|||
Loading…
Reference in New Issue