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I2C: add timeout to stop 

similar to the start condition, a timer will prevent it to block.
This commit is contained in:
King Kévin 2019-03-26 18:11:14 +01:00
parent efbd228f8a
commit bf2eca0401
1 changed files with 32 additions and 10 deletions
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42
lib/i2c_master.c
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@ -493,22 +493,44 @@ enum i2c_master_rc i2c_master_stop(uint32_t i2c)
if (!(I2C_SR2(i2c) & I2C_SR2_BUSY)) { // release is not busy
return I2C_MASTER_RC_NONE; // bus has probably already been released
}
// send stop condition
if (I2C_CR1(i2c) & (I2C_CR1_START|I2C_CR1_STOP)) { // ensure start or stop operations are not in progress
return I2C_MASTER_RC_START_STOP_IN_PROGESS;
}
i2c_send_stop(i2c); // send stop to release bus
while ((I2C_CR1(i2c) & I2C_CR1_STOP) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO))); // wait until stop condition is accepted and cleared
if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
return I2C_MASTER_RC_BUS_ERROR;
}
while ((I2C_SR2(i2c) & I2C_SR2_MSL) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO))); // wait until bus released (non master mode)
if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
return I2C_MASTER_RC_BUS_ERROR;
if (!((I2C_SR2(i2c) & I2C_SR2_TRA))) { // if we are in receiver mode
i2c_disable_ack(i2c); // disable ACK to be able to close the communication
}
return I2C_MASTER_RC_NONE;
enum i2c_master_rc to_return = I2C_MASTER_RC_NONE;
// prepare timer in case the peripheral hangs on sending stop condition (see errata 2.14.4 Wrong behavior of I2C peripheral in master mode after a misplaced Stop)
systick_counter_disable(); // disable SysTick to reconfigure it
systick_set_frequency(500, rcc_ahb_frequency); // set timer to 2 ms (that should be long enough to send a stop condition)
systick_clear(); // reset SysTick (set to 0)
systick_interrupt_disable(); // disable interrupt to prevent ISR to read the flag
systick_get_countflag(); // reset flag (set when counter is going for 1 to 0)
bool timeout = false; // remember if the timeout has been reached
i2c_send_stop(i2c); // send stop to release bus
systick_counter_enable(); // start timer
i2c_send_stop(i2c); // send stop to release bus
while ((I2C_CR1(i2c) & I2C_CR1_STOP) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) && !timeout) { // wait until stop condition is accepted and cleared
timeout |= systick_get_countflag(); // verify if timeout has been reached
}
if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
to_return = I2C_MASTER_RC_BUS_ERROR;
}
while ((I2C_SR2(i2c) & I2C_SR2_MSL) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) && !timeout) { // wait until bus released (non master mode)
timeout |= systick_get_countflag(); // verify if timeout has been reached
}
if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
to_return = I2C_MASTER_RC_BUS_ERROR;
}
if (timeout) {
I2C_CR1(i2c) |= I2C_CR1_SWRST; // assert peripheral reset
I2C_CR1(i2c) &= ~I2C_CR1_SWRST; // release peripheral reset
}
systick_counter_disable(); // we don't need to timer anymore
return to_return;
}
enum i2c_master_rc i2c_master_slave_read(uint32_t i2c, uint16_t slave, bool address_10bit, uint8_t* data, size_t data_size)