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application: fix channels pinout

This commit is contained in:
King Kévin 2021-05-05 14:55:17 +02:00
parent 6bb7e001aa
commit 611f5f6683
2 changed files with 20 additions and 20 deletions
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36
README.md
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@ -88,22 +88,22 @@ IDC 2x10 connector:
02. VTRG, target voltage, see below for connection
03. RST, to reset the target board, connect to PA0
04. 3V3, connected to 3.3V
05. CH0, connect to PB12
06. CH1, connect to PB13
07. CH2, connect to PB14
08. CH3, connect to PB15
09. CH4, connect to PA8
10. CH5, connect to PA9
11. CH6, connect to PA10
12. CH7, connect to PA15
13. CH8, connect to PB3
14. CH9, connect to PB4
15. CH10, connect to PB5
16. CH11, connect to PB6
17. CH12, connect to PB7
18. CH13, connect to PB8
19. CH14, connect to PB9
20. CH15, connect to PB10
05. CH00, connect to PB10
06. CH01, connect to PB9
07. CH02, connect to PB8
08. CH03, connect to PB7
09. CH04, connect to PB6
10. CH05, connect to PB5
11. CH06, connect to PB4
12. CH07, connect to PB3
13. CH08, connect to PA15
14. CH09, connect to PA10
15. CH10, connect to PA9
16. CH11, connect to PA8
17. CH12, connect to PB15
18. CH13, connect to PB14
19. CH14, connect to PB13
20. CH15, connect to PB12
ADC, used to measure target voltage (up to 6.6V):
@ -127,7 +127,7 @@ ADC for signal, using BSS84 p-channel MOSFET Q5:
- connect 1 kOhm between PA1 and PA4, creating second part of voltage divider (PA4 can ground it)
- Q5 source: to VTRG
- Q5 gate: to PA5, pulled up to VTRG using 10-100 kOhm resistor
- Q5 drain: to PA3 (PA4 can set connect voltage divider to high side)
- Q5 drain: to PA4 (PA5 can set connect voltage divider to high side)
UART, with level shifter, to scan for UART port:
@ -135,7 +135,7 @@ UART, with level shifter, to scan for UART port:
- connect PA2/PA3 to 150 Ohm in-line resistor R3 (used as protection to limit sink current)
- pull up R3 to 5V using 10 kOhm ressitor, this is necessary for the voltage shifter to operate up to 5V
- connect R3 to source of BSS138 n-channel MOSFET Q1, used as bi-directional level shifter
- connect gate of Q1 to VTRG
- connect gate of Q1 to Q2 drain
- connect source of Q1 to signal S
level shifter control, using BSS84 p-channel MOSFET Q2:

4
application.c
View File

@ -69,8 +69,8 @@ const uint8_t adc_channels[] = {ADC_CHANNEL17, ADC_CHANNEL(TARGET_CHANNEL), ADC_
#define MUX_S3_PIN PB2 /**< pin to set S3 bit of analog multiplexer */
#define CHANNEL_NUMBERS 16 /**< number of target signals */
static const uint32_t channel_ports[] = {GPIO_PORT(PB12), GPIO_PORT(PB13), GPIO_PORT(PB14), GPIO_PORT(PB15), GPIO_PORT(PA8), GPIO_PORT(PA9), GPIO_PORT(PA10), GPIO_PORT(PA15), GPIO_PORT(PB3), GPIO_PORT(PB4), GPIO_PORT(PB5), GPIO_PORT(PB6), GPIO_PORT(PB7), GPIO_PORT(PB8), GPIO_PORT(PB9), GPIO_PORT(PB10)}; /**< GPIO ports for signal pin */
static const uint32_t channel_pins[] = {GPIO_PIN(PB12), GPIO_PIN(PB13), GPIO_PIN(PB14), GPIO_PIN(PB15), GPIO_PIN(PA8), GPIO_PIN(PA9), GPIO_PIN(PA10), GPIO_PIN(PA15), GPIO_PIN(PB3), GPIO_PIN(PB4), GPIO_PIN(PB5), GPIO_PIN(PB6), GPIO_PIN(PB7), GPIO_PIN(PB8), GPIO_PIN(PB9), GPIO_PIN(PB10)}; /**< GPIO pins for signal pin */
static const uint32_t channel_ports[] = {GPIO_PORT(PB10), GPIO_PORT(PB9), GPIO_PORT(PB8), GPIO_PORT(PB7), GPIO_PORT(PB6), GPIO_PORT(PB5), GPIO_PORT(PB4), GPIO_PORT(PB3), GPIO_PORT(PA15), GPIO_PORT(PA10), GPIO_PORT(PA9), GPIO_PORT(PA8), GPIO_PORT(PB15), GPIO_PORT(PB14), GPIO_PORT(PB13), GPIO_PORT(PB12)}; /**< GPIO ports for signal pin */
static const uint32_t channel_pins[] = {GPIO_PIN(PB10), GPIO_PIN(PB9), GPIO_PIN(PB8), GPIO_PIN(PB7), GPIO_PIN(PB6), GPIO_PIN(PB5), GPIO_PIN(PB4), GPIO_PIN(PB3), GPIO_PIN(PA15), GPIO_PIN(PA10), GPIO_PIN(PA9), GPIO_PIN(PA8), GPIO_PIN(PB15), GPIO_PIN(PB14), GPIO_PIN(PB13), GPIO_PIN(PB12)}; /**< GPIO pins for signal pin */
static uint8_t channel_start = 0; /**< first signal of range to probe */
static uint8_t channel_stop = CHANNEL_NUMBERS - 1; /**< last signal of range to probe */