onewire_master: minor, add space around operators
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parent
7681007d95
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41bd39f123
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@ -147,7 +147,7 @@ void TIM_ISR(ONEWIRE_MASTER_TIMER)(void)
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if (gpio_get(GPIO_PORT(ONEWIRE_MASTER_PIN),GPIO_PIN(ONEWIRE_MASTER_PIN))) { // check if the slave kept it low
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buffer[buffer_bit / 8] |= (1 << (buffer_bit % 8)); // save bit "1"
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} else {
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buffer[buffer_bit/8] &= ~(1<<(buffer_bit%8)); // save bit "0"
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buffer[buffer_bit / 8] &= ~(1 << (buffer_bit % 8)); // save bit "0"
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}
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buffer_bit++; // got to next bit
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} else {
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@ -176,26 +176,26 @@ void TIM_ISR(ONEWIRE_MASTER_TIMER)(void)
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void onewire_master_setup(void)
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{
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// setup GPIO with external interrupt
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rcc_periph_clock_enable(RCC_GPIO(ONEWIRE_MASTER_PORT)); // enable clock for GPIO peripheral
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gpio_set(GPIO(ONEWIRE_MASTER_PORT),GPIO(ONEWIRE_MASTER_PIN)); // idle is high (using pull-up resistor)
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gpio_set_mode(GPIO(ONEWIRE_MASTER_PORT), GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO(ONEWIRE_MASTER_PIN)); // normal 1-Wire communication (only using external pull-up resistor)
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rcc_periph_clock_enable(GPIO_RCC(ONEWIRE_MASTER_PIN)); // enable clock for GPIO peripheral
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gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_PIN(ONEWIRE_MASTER_PIN)); // idle is high (using pull-up resistor)
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gpio_set_mode(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN(ONEWIRE_MASTER_PIN)); // normal 1-Wire communication (only using external pull-up resistor)
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// setup timer to generate/measure signal timing
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rcc_periph_clock_enable(RCC_TIM(ONEWIRE_MASTER_TIMER)); // enable clock for timer peripheral
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rcc_periph_reset_pulse(RST_TIM(ONEWIRE_MASTER_TIMER)); // reset timer state
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timer_disable_counter(TIM(ONEWIRE_MASTER_TIMER)); // disable timer to configure it
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timer_set_mode(TIM(ONEWIRE_MASTER_TIMER), TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock, edge alignment (simple count), and count up
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timer_set_prescaler(TIM(ONEWIRE_MASTER_TIMER), 1-1); // don't use prescale since this 16 bits timer allows to wait > 480 us used for the reset pulse ( 1/(72E6/1/(2**16))=910us )
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timer_set_prescaler(TIM(ONEWIRE_MASTER_TIMER), 1 - 1); // don't use prescale since this 16 bits timer allows to wait > 480 us used for the reset pulse ( 1/(72E6/1/(2**16))=910us )
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// use comparator to time signal (without using the output), starting at slot start
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC1IF); // clear flag
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timer_set_oc_value(TIM(ONEWIRE_MASTER_TIMER), TIM_OC1, 1*(rcc_ahb_frequency/1000000)-1); // use compare function to time master pulling low when reading (1 < Tlowr < 15)
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timer_set_oc_value(TIM(ONEWIRE_MASTER_TIMER), TIM_OC1, 1 * (rcc_ahb_frequency / 1000000) - 1); // use compare function to time master pulling low when reading (1 < Tlowr < 15)
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC2IF); // clear flag
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timer_set_oc_value(TIM(ONEWIRE_MASTER_TIMER), TIM_OC2, 7*(rcc_ahb_frequency/1000000)-1); // use compare function to read or write 0 or 1 (1 < Trw < 15)
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timer_set_oc_value(TIM(ONEWIRE_MASTER_TIMER), TIM_OC2, 7 * (rcc_ahb_frequency / 1000000) - 1); // use compare function to read or write 0 or 1 (1 < Trw < 15)
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC3IF); // clear flag
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timer_set_oc_value(TIM(ONEWIRE_MASTER_TIMER), TIM_OC3, 62*(rcc_ahb_frequency/1000000)-1); // use compare function to end time slot (60 < Tslot < 120), this will be followed by a recovery time (end of timer)
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timer_set_oc_value(TIM(ONEWIRE_MASTER_TIMER), TIM_OC3, 62 * (rcc_ahb_frequency / 1000000) - 1); // use compare function to end time slot (60 < Tslot < 120), this will be followed by a recovery time (end of timer)
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC4IF); // clear flag
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timer_set_oc_value(TIM(ONEWIRE_MASTER_TIMER), TIM_OC4, (70-10)*(rcc_ahb_frequency/1000000)-1); // use compare function to detect slave presence (15 < Tpdh < 60 + 60 < Tpdl < 240), with hand tuning
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timer_set_oc_value(TIM(ONEWIRE_MASTER_TIMER), TIM_OC4, (70 - 10) * (rcc_ahb_frequency / 1000000) - 1); // use compare function to detect slave presence (15 < Tpdh < 60 + 60 < Tpdl < 240), with hand tuning
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_UIF); // clear update (overflow) flag
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timer_update_on_overflow(TIM(ONEWIRE_MASTER_TIMER)); // only use counter overflow as UEV source (use overflow as start time or timeout)
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timer_enable_irq(TIM(ONEWIRE_MASTER_TIMER), TIM_DIER_UIE); // enable update interrupt for overflow
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@ -235,8 +235,8 @@ bool onewire_master_reset(void)
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{
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// prepare timer
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timer_disable_counter(TIM(ONEWIRE_MASTER_TIMER)); // disable timer to reconfigure it
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timer_set_counter(TIM(ONEWIRE_MASTER_TIMER),0); // reset counter
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timer_set_period(TIM(ONEWIRE_MASTER_TIMER), 490*(rcc_ahb_frequency/1000000)-1); // set timeout to > 480 us (480 < Trst)
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timer_set_counter(TIM(ONEWIRE_MASTER_TIMER), 0); // reset counter
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timer_set_period(TIM(ONEWIRE_MASTER_TIMER), 490 * (rcc_ahb_frequency / 1000000) - 1); // set timeout to > 480 us (480 < Trst)
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slave_presence = false; // reset state
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onewire_master_state = ONEWIRE_STATE_MASTER_RESET; // set new state
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@ -245,10 +245,10 @@ bool onewire_master_reset(void)
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gpio_clear(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal low to start reset (it's not important if it was low in the first place since the reset pulse has no maximum time)
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timer_enable_counter(TIM(ONEWIRE_MASTER_TIMER)); // start timer
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while (onewire_master_state!=ONEWIRE_STATE_DONE && onewire_master_state!=ONEWIRE_STATE_ERROR) { // wait until reset procedure completed
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while (onewire_master_state != ONEWIRE_STATE_DONE && onewire_master_state != ONEWIRE_STATE_ERROR) { // wait until reset procedure completed
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__WFI(); // go to sleep
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}
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if (ONEWIRE_STATE_ERROR==onewire_master_state) { // an error occurred
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if (ONEWIRE_STATE_ERROR == onewire_master_state) { // an error occurred
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return false;
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}
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@ -267,7 +267,7 @@ static bool onewire_master_write(void)
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// prepare timer
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timer_disable_counter(TIM(ONEWIRE_MASTER_TIMER)); // disable timer to reconfigure it
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timer_set_counter(TIM(ONEWIRE_MASTER_TIMER), 0); // reset counter
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timer_set_period(TIM(ONEWIRE_MASTER_TIMER), TIM_CCR3(TIM(ONEWIRE_MASTER_TIMER))+2*(rcc_ahb_frequency/1000000)); // set time for new time slot (recovery timer Trec>1, after time slot end )
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timer_set_period(TIM(ONEWIRE_MASTER_TIMER), TIM_CCR3(TIM(ONEWIRE_MASTER_TIMER)) + 2 * (rcc_ahb_frequency / 1000000)); // set time for new time slot (recovery timer Trec>1, after time slot end )
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC2IF); // clear output compare flag
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timer_enable_irq(TIM(ONEWIRE_MASTER_TIMER), TIM_DIER_CC2IE); // enable compare interrupt for bit setting
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC3IF); // clear output compare flag
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@ -277,10 +277,10 @@ static bool onewire_master_write(void)
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gpio_set_mode(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN(ONEWIRE_MASTER_PIN)); // normal 1-Wire communication (only using external pull-up resistor)
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gpio_clear(GPIO_PORT(ONEWIRE_MASTER_PIN),GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal low to start slot
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timer_enable_counter(TIM(ONEWIRE_MASTER_TIMER)); // start timer
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while (onewire_master_state!=ONEWIRE_STATE_DONE && onewire_master_state!=ONEWIRE_STATE_ERROR) { // wait until write procedure completed
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while (onewire_master_state != ONEWIRE_STATE_DONE && onewire_master_state != ONEWIRE_STATE_ERROR) { // wait until write procedure completed
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__WFI(); // go to sleep
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}
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if (ONEWIRE_STATE_ERROR==onewire_master_state) { // an error occurred
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if (ONEWIRE_STATE_ERROR == onewire_master_state) { // an error occurred
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return false;
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}
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return true;
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@ -292,7 +292,7 @@ static bool onewire_master_write(void)
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*/
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static bool onewire_master_read(void)
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{
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if (0==buffer_size) { // check input
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if (0 == buffer_size) { // check input
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return false;
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}
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buffer_bit = 0; // reset bit index
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@ -301,7 +301,7 @@ static bool onewire_master_read(void)
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// prepare timer
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timer_disable_counter(TIM(ONEWIRE_MASTER_TIMER)); // disable timer to reconfigure it
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timer_set_counter(TIM(ONEWIRE_MASTER_TIMER), 0); // reset counter
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timer_set_period(TIM(ONEWIRE_MASTER_TIMER), TIM_CCR3(TIM(ONEWIRE_MASTER_TIMER))+2*(rcc_ahb_frequency/1000000)); // set time for new time slot (recovery timer Trec>1, after time slot end )
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timer_set_period(TIM(ONEWIRE_MASTER_TIMER), TIM_CCR3(TIM(ONEWIRE_MASTER_TIMER)) + 2*(rcc_ahb_frequency / 1000000)); // set time for new time slot (recovery timer Trec>1, after time slot end )
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC1IF); // clear output compare flag
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timer_enable_irq(TIM(ONEWIRE_MASTER_TIMER), TIM_DIER_CC1IE); // enable compare interrupt for stop pulling low
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timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC2IF); // clear output compare flag
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@ -313,10 +313,10 @@ static bool onewire_master_read(void)
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gpio_set_mode(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN(ONEWIRE_MASTER_PIN)); // normal 1-Wire communication (only using external pull-up resistor)
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gpio_clear(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal low to start slot
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timer_enable_counter(TIM(ONEWIRE_MASTER_TIMER)); // start timer
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while (onewire_master_state!=ONEWIRE_STATE_DONE && onewire_master_state!=ONEWIRE_STATE_ERROR) { // wait until read procedure completed
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while (onewire_master_state != ONEWIRE_STATE_DONE && onewire_master_state != ONEWIRE_STATE_ERROR) { // wait until read procedure completed
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__WFI(); // go to sleep
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}
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if (ONEWIRE_STATE_ERROR==onewire_master_state) { // an error occurred
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if (ONEWIRE_STATE_ERROR == onewire_master_state) { // an error occurred
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return false;
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}
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return true;
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@ -324,16 +324,16 @@ static bool onewire_master_read(void)
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uint8_t onewire_master_crc(uint8_t* data, uint32_t length)
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{
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if (NULL==data || 0==length) { // check input
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if (NULL == data || 0 == length) { // check input
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return 0; // wrong input
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}
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uint8_t crc = 0x00; // initial value
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for (uint8_t i=0; i<length; i++) { // go through every byte
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for (uint8_t i = 0; i < length; i++) { // go through every byte
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crc ^= data[i]; // XOR byte
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for (uint8_t b=0; b<8; b++) { // go through every bit
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if (crc&0x01) { // least significant bit is set (we are using the reverse way)
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crc = (crc>>1)^0x8C; // // shift to the right (for the next bit) and XOR with (reverse) polynomial
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for (uint8_t b = 0; b < 8; b++) { // go through every bit
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if (crc & 0x01) { // least significant bit is set (we are using the reverse way)
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crc = (crc >> 1) ^ 0x8C; // // shift to the right (for the next bit) and XOR with (reverse) polynomial
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} else {
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crc >>= 1; // just shift right (for the next bit)
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}
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@ -344,7 +344,7 @@ uint8_t onewire_master_crc(uint8_t* data, uint32_t length)
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bool onewire_master_read_byte(uint8_t* data)
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{
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if (NULL==data) { // check input
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if (NULL == data) { // check input
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return false; // wrong input
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}
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@ -375,7 +375,7 @@ bool onewire_master_function_read(uint8_t function, uint8_t* data, uint32_t bits
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return false; // an error occurred
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}
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if (NULL==data || 0==bits) { // there is no data to read
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if (NULL == data || 0 == bits) { // there is no data to read
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return true; // operation completed
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}
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@ -396,7 +396,7 @@ bool onewire_master_function_write(uint8_t function, uint8_t* data, uint32_t bit
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return false; // an error occurred
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}
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if (NULL==data || 0==bits) { // there is no data to read
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if (NULL == data || 0 == bits) { // there is no data to read
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return true; // operation completed
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}
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@ -423,8 +423,8 @@ uint64_t onewire_master_rom_read(void)
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// return ROM code
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uint64_t code = 0;
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for (uint32_t i=0; i<8; i++) {
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code += (uint64_t)rom_code[i]<<(8*i); // add byte
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for (uint32_t i = 0; i < 8; i++) {
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code += (uint64_t)rom_code[i] << (8 * i); // add byte
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}
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return code;
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@ -445,45 +445,45 @@ bool onewire_master_rom_search(uint64_t* code, bool alarm)
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goto end; // an error occurred
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}
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if (conflict_last>=64) { // no previous conflict has been detected
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if (conflict_last >= 64) { // no previous conflict has been detected
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*code = 0; // restart search codes
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}
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buffer = bits; // buffer to read up to two bits
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for (uint8_t bit=0; bit<64; bit++) { // go through all 64 bits ROM code
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for (uint8_t bit = 0; bit < 64; bit++) { // go through all 64 bits ROM code
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buffer_size = 2; // read two first bits to detect conflict
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if (!onewire_master_read()) { // read ROM ID from slave
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goto end; // an error occurred
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}
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switch (buffer[0]&0x03) { // check 2 bits received
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switch (buffer[0] & 0x03) { // check 2 bits received
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case 0: // collision detected
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if (bit==conflict_last) { // this conflict is known
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*code |= (((uint64_t)1)<<bit); // use 0 as next bit
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if (bit == conflict_last) { // this conflict is known
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*code |= (((uint64_t)1) << bit); // use 0 as next bit
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} else { // unknown conflict
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conflict_current = bit; // remember conflict
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*code &= ~(((uint64_t)1)<<bit); // use 1 as next bit
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*code &= ~(((uint64_t)1) << bit); // use 1 as next bit
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}
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break;
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case 1: // no conflict, valid bit is 1
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*code |= (((uint64_t)1)<<bit); // remember valid bit 1
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*code |= (((uint64_t)1) << bit); // remember valid bit 1
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break;
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case 2: // no conflict, valid bit is 0
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*code &= ~(((uint64_t)1)<<bit); // remember valid bit 0
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*code &= ~(((uint64_t)1) << bit); // remember valid bit 0
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break;
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default: // two 1's indicate there is no slave
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conflict_current = 64; // remember there was no conflict because there is no slave
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goto end; // an error has occurred
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}
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buffer_size = 1; // to send next bit
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buffer[0] = ((*code)>>bit); // set bit to send
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buffer[0] = ((*code) >> bit); // set bit to send
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if (!onewire_master_write()) { // send bit
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goto end; // an error has occurred
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}
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}
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// verify ROM code
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uint8_t rom_code[8] = {0}; // to store ROM code
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for (uint8_t i=0; i<LENGTH(rom_code); i++) {
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rom_code[i] = (*code)>>(8*i); // split and save last code in ROM code
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for (uint8_t i = 0; i < LENGTH(rom_code); i++) {
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rom_code[i] = (*code) >> (8 * i); // split and save last code in ROM code
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}
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if (onewire_master_crc(rom_code, LENGTH(rom_code))) { // verify checksum
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*code = 0; // return the last code found since it's valid
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@ -491,7 +491,7 @@ bool onewire_master_rom_search(uint64_t* code, bool alarm)
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end:
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conflict_last = conflict_current; // update the last seen and unknown conflict
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if (conflict_current<64) { // we have seen an unknown conflict
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if (conflict_current < 64) { // we have seen an unknown conflict
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return true; // tell there are more slaves
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} else { // no conflict seen
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return false; // no more slaves
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@ -509,12 +509,11 @@ bool onewire_master_rom_skip(void)
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bool onewire_master_rom_match(uint64_t code)
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{
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uint8_t rom_code[8] = {0}; // to store ROM code
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for (uint8_t i=0; i<LENGTH(rom_code); i++) {
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rom_code[i] = code>>(8*i); // split and save code in ROM code
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for (uint8_t i = 0; i < LENGTH(rom_code); i++) {
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rom_code[i] = code >> (8 * i); // split and save code in ROM code
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}
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if (!onewire_master_function_write(0x55, rom_code, 64)) { // send MATCH ROM command with ROM code
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return false; // an error occurred
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}
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return true;
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}
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