I2C: make API more generic
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50bea30599
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371
lib/i2c_master.c
371
lib/i2c_master.c
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@ -15,13 +15,13 @@
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/** library to communicate using I2C as master (code)
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* @file i2c_master.c
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* @author King Kévin <kingkevin@cuvoodoo.info>
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* @date 2017
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* @date 2017-2018
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* @note peripherals used: I2C @ref i2c_master_i2c, timer @ref i2c_master_timer
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*/
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/* standard libraries */
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#include <stdint.h> // standard integer types
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#include <stdio.h> // standard I/O facilities
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//#include <stdio.h> // standard I/O facilities
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#include <stdlib.h> // general utilities
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/* STM32 (including CM3) libraries */
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@ -30,13 +30,14 @@
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#include <libopencm3/stm32/i2c.h> // I2C library
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#include <libopencm3/stm32/timer.h> // timer utilities
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/* own libraries */
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#include "global.h" // global utilities
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#include "i2c_master.h" // I2C header and definitions
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/** @defgroup i2c_master_i2c I2C peripheral used to communicate
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* @{
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*/
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#define I2C_MASTER_I2C 2 /**< I2C peripheral */
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#define I2C_MASTER_I2C 1 /**< I2C peripheral */
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/** @} */
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/** @defgroup i2c_master_timer timer peripheral used for timeouts
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@ -46,7 +47,6 @@
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#define I2C_MASTER_TIMEOUT 4 /**< timeout factor (compared to expected time) */
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/** @} */
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void i2c_master_setup(bool fast)
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{
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// configure I2C peripheral
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@ -94,89 +94,72 @@ void i2c_master_setup(bool fast)
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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}
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bool i2c_master_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size)
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bool i2c_master_start(void)
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{
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// sanity check
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if (address==NULL || address_size==0 || data==NULL || data_size==0) { // input data is erroneous
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return false;
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}
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if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
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return false;
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}
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if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
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return false;
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}
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bool to_return = false; // return if read succeeded
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// send start condition
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// send (re-)start condition
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i2c_send_start(I2C(I2C_MASTER_I2C)); // send start condition to start transaction
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_set_counter(TIM(I2C_MASTER_TIMER), 0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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return false;
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}
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL)) { // verify if in master mode
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goto error;
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return false;
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}
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return true;
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}
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bool i2c_master_select_slave(uint8_t slave, bool write)
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{
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY)) { // I2C device is not busy (start condition has not been sent)
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if (!i2c_master_start()) { // send start condition
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return false; // could not send start condition
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}
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}
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL)) { // I2C device is already not master mode
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return false;
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}
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// select slave
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i2c_send_7bit_address(I2C(I2C_MASTER_I2C), slave, I2C_WRITE); // select slave
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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i2c_send_7bit_address(I2C(I2C_MASTER_I2C), slave, write ? I2C_WRITE : I2C_READ); // select slave, with read/write flag
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timer_set_counter(TIM(I2C_MASTER_TIMER), 0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until address is transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred (no ACK received)
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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return false;
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}
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if (!((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
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goto error;
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}
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// send address
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for (size_t i=0; i<address_size; i++) {
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i2c_send_data(I2C(I2C_MASTER_I2C), address[i]); // send memory address we want to read
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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if (write) {
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if (!((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
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return false;
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}
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} else {
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if ((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_TRA)) { // verify we are in read mode (and read SR2 to clear ADDR)
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return false;
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}
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}
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// switch to read mode
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i2c_send_start(I2C(I2C_MASTER_I2C)); // send restart condition to switch from write to read mode
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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return true;
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}
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i2c_send_7bit_address(I2C(I2C_MASTER_I2C), slave, I2C_READ); // select slave
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until address is transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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if ((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_TRA)) { // verify we are in read mode (and read SR2 to clear ADDR)
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goto error;
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bool i2c_master_read(uint8_t* data, size_t data_size)
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{
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// sanity check
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if (data==NULL || data_size==0) { // no data to read
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return true;
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}
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY)) { // I2C device is not busy (start condition has not been sent)
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return false; // address has probably also not been sent
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}
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL)) { // I2C device not master mode
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return false;
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}
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// read data
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@ -187,96 +170,34 @@ bool i2c_master_read(uint8_t slave, const uint8_t* address, size_t address_size,
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} else {
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i2c_enable_ack(I2C(I2C_MASTER_I2C)); // ACK received byte to continue slave transmission
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}
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_set_counter(TIM(I2C_MASTER_TIMER), 0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_RxNE) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until byte has been received
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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return false;
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}
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data[i] = i2c_get_data(I2C(I2C_MASTER_I2C)); // read received byte
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}
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to_return = true;
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error:
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if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // release bus if busy
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// i2c_send_stop(I2C(I2C_MASTER_I2C)); // send stop to release bus
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}
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i2c_send_stop(I2C(I2C_MASTER_I2C)); // send stop to release bus
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while ((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until bus released (non master mode)
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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}
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return to_return;
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return true;
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}
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bool i2c_master_write(uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size)
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bool i2c_master_write(const uint8_t* data, size_t data_size)
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{
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// sanity check
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if (address==NULL || address_size==0 || data==NULL || data_size==0) { // input data is erroneous
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return false;
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if (data==NULL || data_size==0) { // no data to write
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return true;
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}
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if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
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return false;
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY)) { // I2C device is not busy (start condition has not been sent)
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return false; // address has probably also not been sent
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}
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if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL)) { // I2C device is not master mode
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return false;
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}
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bool to_return = false; // return if read succeeded
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// send start condition
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i2c_send_start(I2C(I2C_MASTER_I2C)); // send start condition to start transaction
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL)) { // verify if in master mode
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goto error;
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}
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// select slave
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i2c_send_7bit_address(I2C(I2C_MASTER_I2C), slave, I2C_WRITE); // select slave
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until address is transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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if (!((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
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goto error;
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}
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// send address
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for (size_t i=0; i<address_size; i++) {
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i2c_send_data(I2C(I2C_MASTER_I2C), address[i]); // send memory address we want to read
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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}
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// write data
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for (size_t i=0; i<data_size; i++) { // write bytes
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i2c_send_data(I2C(I2C_MASTER_I2C), data[i]); // send byte to be written in memory
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@ -285,24 +206,186 @@ bool i2c_master_write(uint8_t slave, const uint8_t* address, size_t address_size
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
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timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
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if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred (no ACK received)
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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return false;
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}
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}
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to_return = true;
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error:
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if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // release bus if busy
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i2c_send_stop(I2C(I2C_MASTER_I2C)); // send stop to release bus
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return true;
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}
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void i2c_master_stop(void)
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{
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// sanity check
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if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY)) { // release is not busy
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return; // bus has probably already been released
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}
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timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
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// send stop condition
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i2c_send_stop(I2C(I2C_MASTER_I2C)); // send stop to release bus
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timer_set_counter(TIM(I2C_MASTER_TIMER), 0); // restart timer
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timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
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while ((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until bus released (non master mode)
|
||||
while ((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until bus released (non master mode)
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
}
|
||||
return to_return;
|
||||
}
|
||||
|
||||
bool i2c_master_slave_read(uint8_t slave, uint8_t* data, size_t data_size)
|
||||
{
|
||||
// sanity check
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
|
||||
return false;
|
||||
}
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
|
||||
return false;
|
||||
}
|
||||
|
||||
bool success = false; // return if read succeeded
|
||||
|
||||
// send start condition
|
||||
if (!i2c_master_start()) {
|
||||
goto error;
|
||||
}
|
||||
// select slave to write
|
||||
if (!i2c_master_select_slave(slave, true)) {
|
||||
goto error;
|
||||
}
|
||||
// read data
|
||||
if (NULL!=data && data_size>0) {
|
||||
// read data
|
||||
if (!i2c_master_read(data, data_size)) {
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
|
||||
success = true;
|
||||
error:
|
||||
i2c_master_stop(); // sent stop condition
|
||||
return success;
|
||||
}
|
||||
|
||||
bool i2c_master_slave_write(uint8_t slave, const uint8_t* data, size_t data_size)
|
||||
{
|
||||
// sanity check
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
|
||||
return false;
|
||||
}
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
|
||||
return false;
|
||||
}
|
||||
|
||||
bool success = false; // return if read succeeded
|
||||
|
||||
// send start condition
|
||||
if (!i2c_master_start()) {
|
||||
goto error;
|
||||
}
|
||||
// select slave to write
|
||||
if (!i2c_master_select_slave(slave, true)) {
|
||||
goto error;
|
||||
}
|
||||
// write data
|
||||
if (NULL!=data && data_size>0) {
|
||||
if (!i2c_master_write(data, data_size)) {
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
|
||||
success = true;
|
||||
error:
|
||||
i2c_master_stop(); // sent stop condition
|
||||
return success;
|
||||
}
|
||||
|
||||
bool i2c_master_address_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size)
|
||||
{
|
||||
// sanity check
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
|
||||
return false;
|
||||
}
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
|
||||
return false;
|
||||
}
|
||||
|
||||
bool success = false; // return if read succeeded
|
||||
|
||||
// write address
|
||||
if (NULL!=address && address_size>0) {
|
||||
// send start condition
|
||||
if (!i2c_master_start()) {
|
||||
goto error;
|
||||
}
|
||||
// select slave to write
|
||||
if (!i2c_master_select_slave(slave, true)) {
|
||||
goto error;
|
||||
}
|
||||
// send address
|
||||
if (!i2c_master_write(address, address_size)) {
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
// read data
|
||||
if (NULL!=data && data_size>0) {
|
||||
// send re-start condition
|
||||
if (!i2c_master_start()) {
|
||||
goto error;
|
||||
}
|
||||
// select slave to read
|
||||
if (!i2c_master_select_slave(slave, false)) {
|
||||
goto error;
|
||||
}
|
||||
// read data
|
||||
if (!i2c_master_read(data, data_size)) {
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
|
||||
success = true;
|
||||
error:
|
||||
i2c_master_stop(); // sent stop condition
|
||||
return success;
|
||||
}
|
||||
|
||||
bool i2c_master_address_write(uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size)
|
||||
{
|
||||
// sanity check
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
|
||||
return false;
|
||||
}
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
|
||||
return false;
|
||||
}
|
||||
|
||||
bool success = false; // return if read succeeded
|
||||
|
||||
// send start condition
|
||||
if (!i2c_master_start()) {
|
||||
goto error;
|
||||
}
|
||||
// select slave to write
|
||||
if (!i2c_master_select_slave(slave, true)) {
|
||||
goto error;
|
||||
}
|
||||
// write address
|
||||
if (NULL!=address && address_size>0) {
|
||||
// send address
|
||||
if (!i2c_master_write(address, address_size)) {
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
// write data
|
||||
if (NULL!=data && data_size>0) {
|
||||
if (!i2c_master_write(data, data_size)) {
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
|
||||
success = true;
|
||||
error:
|
||||
i2c_master_stop(); // sent stop condition
|
||||
return success;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -15,8 +15,9 @@
|
|||
/** library to communicate using I2C as master (API)
|
||||
* @file i2c_master.h
|
||||
* @author King Kévin <kingkevin@cuvoodoo.info>
|
||||
* @date 2017
|
||||
* @date 2017-2018
|
||||
* @note peripherals used: I2C @ref i2c_master_i2c, timer @ref i2c_master_timer
|
||||
* @warning only 7-byte I2C slave addresses are supported
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
|
|
@ -24,7 +25,46 @@
|
|||
* @param[in] fast use standard (100 kHz) or fast (400 kHz) mode
|
||||
*/
|
||||
void i2c_master_setup(bool fast);
|
||||
/** read from I2C slave
|
||||
/** send start condition
|
||||
* @return if start condition was sent successfully (true) or error occurred (false)
|
||||
*/
|
||||
bool i2c_master_start(void);
|
||||
/** select slave device
|
||||
* @warning a start condition should be sent before this operation
|
||||
* @param[in] slave 7-bit I2C address of slave device to select
|
||||
* @param[in] write this transaction will be followed by a read (false) or write (true) operation
|
||||
* @return if slave was selected successfully (true) or error occurred (false)
|
||||
*/
|
||||
bool i2c_master_select_slave(uint8_t slave, bool write);
|
||||
/** read data
|
||||
* @warning the slave device must be selected before this operation
|
||||
* @param[out] data array to store bytes read
|
||||
* @param[in] data_size number of bytes to read
|
||||
*/
|
||||
bool i2c_master_read(uint8_t* data, size_t data_size);
|
||||
/** write data
|
||||
* @warning the slave device must be selected before this operation
|
||||
* @param[in] data array of byte to write to slave
|
||||
* @param[in] data_size number of bytes to write
|
||||
*/
|
||||
bool i2c_master_write(const uint8_t* data, size_t data_size);
|
||||
/** sent stop condition */
|
||||
void i2c_master_stop(void);
|
||||
/** read from date from an I2C slave
|
||||
* @param[in] slave 7-bit I2C salve device address to read from
|
||||
* @param[out] data array to store bytes read
|
||||
* @param[in] data_size number of bytes to read
|
||||
* @return if read succeeded
|
||||
*/
|
||||
bool i2c_master_slave_read(uint8_t slave, uint8_t* data, size_t data_size);
|
||||
/** write data to an I2C slave
|
||||
* @param[in] slave 7-bit I2C salve device address to write to
|
||||
* @param[in] data array of byte to write to slave
|
||||
* @param[in] data_size number of bytes to write
|
||||
* @return if write succeeded
|
||||
*/
|
||||
bool i2c_master_slave_write(uint8_t slave, const uint8_t* data, size_t data_size);
|
||||
/** read data at specific address from an I2C memory slave
|
||||
* @param[in] slave 7-bit I2C salve device address to read from
|
||||
* @param[in] address memory address of slave to read from
|
||||
* @param[in] address_size address size in bytes
|
||||
|
|
@ -32,8 +72,8 @@ void i2c_master_setup(bool fast);
|
|||
* @param[in] data_size number of bytes to read
|
||||
* @return if read succeeded
|
||||
*/
|
||||
bool i2c_master_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size);
|
||||
/** write to I2C slave
|
||||
bool i2c_master_address_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size);
|
||||
/** write data at specific address on an I2C memory slave
|
||||
* @param[in] slave 7-bit I2C salve device address to write to
|
||||
* @param[in] address memory address of slave to write to
|
||||
* @param[in] address_size address size in bytes
|
||||
|
|
@ -41,5 +81,4 @@ bool i2c_master_read(uint8_t slave, const uint8_t* address, size_t address_size,
|
|||
* @param[in] data_size number of bytes to write
|
||||
* @return if write succeeded
|
||||
*/
|
||||
bool i2c_master_write(uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size);
|
||||
|
||||
bool i2c_master_address_write(uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size);
|
||||
|
|
|
|||
Loading…
Reference in New Issue