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application: add control for supply voltages

This commit is contained in:
King Kévin 2021-03-24 00:43:46 +01:00
parent df2dfe0cb4
commit 0ad8e037cf
1 changed files with 29 additions and 0 deletions
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29
application.c
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@ -54,6 +54,12 @@ static uint32_t boot_time = 0;
#define SIGNAL_CHANNEL 1 /**< PA1/ADC1_IN1 used to measure signal voltage */
const uint8_t adc_channels[] = {ADC_CHANNEL17, ADC_CHANNEL(TARGET_CHANNEL), ADC_CHANNEL(SIGNAL_CHANNEL)}; /**< voltages to convert (channel 17 = internal voltage reference) */
#define TARGET_3V_PIN PC13 /**< pin to supply target voltage with 3.3V (controlling gate of pMOS) */
#define TARGET_RST_PIN PA0 /**< pin to reset target board */
#define SIGNAL_PD_PIN PA4 /**< pin to pull signal low for voltage measurement */
#define SIGNAL_PU_PIN PA5 /**< pin to pull signal to target voltage (controlling gate of pMOS) */
#define SHIFT_EN_PIN PC14 /**< pin to provide target voltage to LV side of voltage shifter (pulling them high through 10 kO) */
#define MUX_EN_PIN PC15 /**< pin to enable analog multiplexer (active low) */
#define MUX_S0_PIN PA7 /**< pin to set S0 bit of analog multiplexer */
#define MUX_S1_PIN PB0 /**< pin to set S1 bit of analog multiplexer */
@ -504,6 +510,29 @@ void main(void)
// important: do not re-enable backup_domain_write_protect, since this will prevent clearing flags (but RTC registers do not need to be unlocked)
puts("OK\n");
puts("setup voltage control: ");
rcc_periph_clock_enable(GPIO_RCC(SIGNAL_PD_PIN)); // enable clock for port domain
gpio_set(GPIO_PORT(SIGNAL_PD_PIN), GPIO_PIN(SIGNAL_PD_PIN)); // ensure we are not draining it
gpio_set_output_options(GPIO_PORT(SIGNAL_PD_PIN), GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO_PIN(SIGNAL_PD_PIN)); // set output as open-drain
gpio_mode_setup(GPIO_PORT(SIGNAL_PD_PIN), GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN(SIGNAL_PD_PIN)); // configure pin as output
rcc_periph_clock_enable(GPIO_RCC(SIGNAL_PU_PIN)); // enable clock for port domain
gpio_set(GPIO_PORT(SIGNAL_PU_PIN), GPIO_PIN(SIGNAL_PU_PIN)); // ensure we are do enable pMOS to pull up the signal
gpio_set_output_options(GPIO_PORT(SIGNAL_PU_PIN), GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO_PIN(SIGNAL_PU_PIN)); // set output as open-drain
gpio_mode_setup(GPIO_PORT(SIGNAL_PU_PIN), GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN(SIGNAL_PU_PIN)); // configure pin as output
rcc_periph_clock_enable(GPIO_RCC(SHIFT_EN_PIN)); // enable clock for port domain
gpio_set(GPIO_PORT(SHIFT_EN_PIN), GPIO_PIN(SHIFT_EN_PIN)); // ensure we do not enable pMOS to power level shifters
gpio_set_output_options(GPIO_PORT(SHIFT_EN_PIN), GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO_PIN(SHIFT_EN_PIN)); // set output as open-drain
gpio_mode_setup(GPIO_PORT(SHIFT_EN_PIN), GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN(SHIFT_EN_PIN)); // configure pin as output
rcc_periph_clock_enable(GPIO_RCC(TARGET_3V_PIN)); // enable clock for port domain
gpio_set(GPIO_PORT(TARGET_3V_PIN), GPIO_PIN(TARGET_3V_PIN)); // ensure we do not enable pMOS to provide 3.3V on target voltage
gpio_set_output_options(GPIO_PORT(TARGET_3V_PIN), GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO_PIN(TARGET_3V_PIN)); // set output as open-drain
gpio_mode_setup(GPIO_PORT(TARGET_3V_PIN), GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN(TARGET_3V_PIN)); // configure pin as output
rcc_periph_clock_enable(GPIO_RCC(TARGET_RST_PIN)); // enable clock for port domain
gpio_set(GPIO_PORT(TARGET_RST_PIN), GPIO_PIN(TARGET_RST_PIN)); // to not pull down (asserting reset)
gpio_set_output_options(GPIO_PORT(TARGET_RST_PIN), GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO_PIN(TARGET_RST_PIN)); // set output as open-drain
gpio_mode_setup(GPIO_PORT(TARGET_RST_PIN), GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN(TARGET_RST_PIN)); // configure pin as output
puts("OK\n");
puts("setup analog multiplexer: ");
rcc_periph_clock_enable(GPIO_RCC(MUX_EN_PIN)); // enable clock for port domain
gpio_set(GPIO_PORT(MUX_EN_PIN), GPIO_PIN(MUX_EN_PIN)); // ensure multiplexer is disabled