342 lines
4.6 KiB
YAML
342 lines
4.6 KiB
YAML
name: CY8C54LP
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variations: QFN68, WLCSP99, TQFP100
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description: Programmable System-on-Chip
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keywords: IC, MCU, Micro-Controller, PSoC 5LP, CY8C54LP
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datasheet: https://www.cypress.com/file/45926/download
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pinout@QFN68:
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P0:
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P0_0: 48
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P0_1: 49
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P0_2: 50
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P0_3: 51
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P0_4: 53
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P0_5: 54
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P0_6: 55
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P0_7: 56
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P1:
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P1_0: 11
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P1_1: 12
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P1_2: 13
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P1_3: 14
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P1_4: 15
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P1_5: 16
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P1_6: 18
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P1_7: 19
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P2:
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P2_0: 62
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P2_1: 63
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P2_2: 64
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P2_3: 65
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P2_4: 66
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P2_5: 68
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P2_6: 1
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P2_7: 2
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P3:
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P3_0: 29
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P3_1: 30
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P3_2: 31
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P3_3: 32
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P3_4: 33
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P3_5: 34
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P3_6: 36
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P3_7: 37
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P12:
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P12_0: 38
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P12_1: 39
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P12_2: 46
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P12_3: 47
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P12_4: 3
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P12_5: 4
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P12_6: 20
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P12_7: 21
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P15:
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P15_0: 27
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P15_1: 28
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P15_2: 40
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P15_3: 41
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P15_4: 60
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P15_5: 61
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P15_6: 22
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P15_7: 23
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GROUND:
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VSSA: 43
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VSSB: 5
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VSSD: 9, 25, 45, 58
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POWER:
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VBOOST: 7
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VBAT: 8
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VCCA: 42
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VCCD: 26, 57
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VDDA: 44
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VDDD: 24, 59
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VDDIO0: 52
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VDDIO1: 17
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VDDIO2: 67
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VDDIO3: 35
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CTRL:
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XRES: 10
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pinout@TQFP100:
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P0:
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P0_0: 71
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P0_1: 72
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P0_2: 73
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P0_3: 74
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P0_4: 76
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P0_5: 77
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P0_6: 78
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P0_7: 79
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P1:
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P1_0: 20
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P1_1: 21
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P1_2: 22
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P1_3: 23
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P1_4: 24
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P1_5: 25
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P1_6: 27
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P1_7: 28
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P2:
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P2_0: 95
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P2_1: 96
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P2_2: 97
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P2_3: 98
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P2_4: 99
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P2_5: 1
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P2_6: 2
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P2_7: 3
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P3:
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P3_0: 44
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P3_1: 45
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P3_2: 46
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P3_3: 47
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P3_4: 48
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P3_5: 49
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P3_6: 51
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P3_7: 52
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P4:
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P4_0: 69
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P4_1: 70
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P4_2: 80
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P4_3: 81
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P4_4: 82
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P4_5: 83
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P4_6: 84
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P4_7: 85
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P5:
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P5_0: 16
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P5_1: 17
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P5_2: 18
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P5_3: 19
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P5_4: 31
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P5_5: 32
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P5_6: 33
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P5_7: 34
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P6:
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P6_0: 89
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P6_1: 90
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P6_2: 91
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P6_3: 92
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P6_4: 6
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P6_5: 7
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P6_6: 8
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P6_7: 9
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P12:
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P12_0: 53
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P12_1: 54
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P12_2: 67
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P12_3: 68
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P12_4: 4
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P12_5: 5
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P12_6: 29
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P12_7: 30
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P15:
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P15_0: 42
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P15_1: 43
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P15_2: 55
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P15_3: 56
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P15_4: 93
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P15_5: 94
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P15_6: 35
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P15_7: 36
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GROUND:
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VSSA: 64
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VSSB: 10
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VSSD: 14, 38, 66, 87
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POWER:
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VBOOST: 12
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VBAT: 13
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VCCA: 63
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VCCD: 39, 86
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VDDA: 65
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VDDD: 37, 88
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VDDIO0: 75
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VDDIO1: 26
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VDDIO2: 100
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VDDIO3: 50
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IND: 11
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CTRL:
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XRES: 15
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NC: 40, 41, 57, 58, 59, 60, 61, 62
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pinout@WLCSP99:
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P0:
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P0_0: B6
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P0_1: C6
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P0_2: A8
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P0_3: D6
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P0_4: D7
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P0_5: E7
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P0_6: B9
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P0_7: D8
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P1:
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P1_0: H4
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P1_1: J3
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P1_2: H3
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P1_3: J2
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P1_4: G4
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P1_5: G3
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P1_6: K2
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P1_7: K1
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P2:
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P2_0: F5
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P2_1: J7
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P2_2: J8
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P2_3: K9
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P2_4: H7
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P2_5: E5
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P2_6: G6
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P2_7: G5
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P3:
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P3_0: C1
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P3_1: C2
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P3_2: D3
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P3_3: D4
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P3_4: B4
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P3_5: A2
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P3_6: B2
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P3_7: B3
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P4:
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P4_0: C5
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P4_1: D5
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P4_2: C9
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P4_3: E8
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P4_4: D9
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P4_5: F8
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P4_6: F7
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P4_7: E6
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P5:
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P5_0: J4
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P5_1: K4
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P5_2: K3
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P5_3: L3
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P5_4: J1
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P5_5: H1
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P5_6: F3
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P5_7: G1
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P6:
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P6_0: H9
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P6_1: G8
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P6_2: H8
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P6_3: J9
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P6_4: L8
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P6_5: J6
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P6_6: H5
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P6_7: J5
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P12:
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P12_0: C3
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P12_1: C4
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P12_2: B5
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P12_3: A7
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P12_4: H6
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P12_5: K7
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P12_6: H2
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P12_7: F4
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P15:
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P15_0: D1
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P15_1: D2
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P15_2: E3
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P15_3: E4
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P15_4: G7
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P15_5: F6
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P15_6: G2
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P15_7: F2
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GROUND:
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VSSA: A4, B7, B8, C7
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VSSB: L7
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VSSD: L5, F1, A6, F9
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POWER:
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VBOOST: L6
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VBAT: K5
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VCCA: A3
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VCCD: E1, E9
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VDDA: A5
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VDDD: E2, G9
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VDDIO0: C8
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VDDIO1: L2
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VDDIO2: K8
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VDDIO3: B1
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IND: K6
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CTRL:
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XRES: L4
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NC: A1, A9, L1, L9
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properties:
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in: XRES
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bidir: P0-6, P12, P15
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passive: K6
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power: POWER
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nc: NC
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ground: GROUND
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inverted: XRES
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schematic:
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symbol: IC
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left: P0, P1, P12, P15, XRES
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right: P2-6
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top: POWER
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bottom: GROUND
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housing@QFN68:
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suffix: LTI
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pattern: QFN
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bodyWidth: 7.90-8.10
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bodyLength: 7.90-8.10
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height: 1.00
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leadWidth: 0.15-0.25
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leadLength: 0.30-0.50
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pitch: 0.4 # e
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leadCount: 68
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rowCount: 17
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columnCount: 17
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tabWidth: 5.60-5.80
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tabLength: 5.60-5.80
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tabPosition: 0.0, 0.0
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housing@WLCSP99:
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suffix: FNI
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pattern: BGA
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bodyWidth: 5.092-5.292
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bodyLength: 5.84-6.04
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height: 0.6
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pitch: 0.5
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rowCount: 11
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columnCount: 7
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leadDiameter: 0.28-0.34
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leadCount: 99
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housing@TQFP100:
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suffix: AXI
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pattern: QFP
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bodyWidth: 13.95-14.05
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bodyLength: 13.95-14.05
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height: 1.60
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leadWidth: 0.17-0.27
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leadLength: 0.45-0.75
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leadSpan: 15.8-16.2
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pitch: 0.5
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leadCount: 100
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rowCount: 25
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columnCount: 25
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