qeda_library/ic/shift-register_nxp_74hc595....

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name: 74HC595
alias: 74HCT595
variations: SO, SSOP, TSSOP
# the DHVQFN variation is not defined because Qeda (and IPC7351) do not specify QFN with pin 1 on left middle and marking on bottom left corner (a custom footprint would be required)
description: 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
datasheet: https://assets.nexperia.com/documents/data-sheet/74HC_HCT595.pdf
keywords: IC, Digital, Shift Register
pinout:
Q:
Q0: 15
Q1: 1
Q2: 2
Q3: 3
Q4: 4
Q5: 5
Q6: 6
Q7: 7
Q7S: 9
MR: 10
SHCP: 11
STCP: 12
OE: 13
DS: 14
VCC: 16
GND: 8
properties:
input: MR, SHCP, STCP, OE, DS
output: Q, Q7S
power: VCC
ground: GND
inverted: MR, OE
schematic:
symbol: IC
left: DS, SHCP, MR, STCP, OE
right: Q, Q7S
top: VCC
bottom: GND
housing@SO:
suffix: D
outline: NXP SOT109-1
housing@SSOP:
suffix: DB
outline: NXP SOT338-1
housing@TSSOP:
suffix: PW
outline: NXP SOT403-1