qeda_library/ic/nand-gate_on_nl17sz00.yaml

109 lines
1.7 KiB
YAML

name: NL17SZ00
variations: DF, XV5, AMU, CMU, P5
description: single 2-input NAND gate
datasheet: https://www.onsemi.com/pdf/datasheet/nl17sz00-d.pdf
pinout@5P: &5P
Y: 4
A: 1
B: 2
GND: 3
VCC: 5
pinout@DF: *5P
pinout@XV5: *5P
pinout@P5: *5P
pinout@6P: &6P
Y: 4
A: 1
B: 2
GND: 3
VCC: 6
NC: 5
pinout@AMU: *6P
pinout@CMU: *6P
properties:
power: VCC
ground: GND
input: A, B
output: Y
nc: NS
schematic:
symbol: ic
left: A, B
right: Y
top: VCC
bottom: GND
housing@DF: # SOT-353
suffix: DF
pattern: SOT23
leadCount: 5
pitch: 0.65 # G
bodyWidth: 1.15-1.35 # B
bodyLength: 1.8-2.2 # A
height: 0.8-1.1 # C
leadWidth: 0.10-0.30 # D
leadLength: 0.10-0.30 # K
leadHeight: 0.10-0.25 # J
leadSpan: 2.0-2.2 # S
housing@XV5: # SOT-553
suffix: XV5
pattern: SOT23
leadCount: 5
pitch: 0.5 # e
bodyWidth: 1.1-1.3 # E
bodyLength: 1.5-1.7 # D
height: 0.5-0.6 # A
leadWidth: 0.17-0.27 # b
leadLength: 0.1-0.3 # L
leadHeight: 0.08-0.18 # c
leadSpan: 1.5-1.7 # HE
housing@AMU: # UDFN6, 1.45x1.0, 0.5P
suffix: AMU
pattern: QFN
pitch: 0.5
bodyLength: 1.45
bodyWidth: 1.00
height: 0.45-0.55
pullBack: 0.0
rowCount: 3
columnCount: 2
leadLength: 0.3-0.4
leadWidth: 0.2-0.3
housing@CMU: # UDFN6, 1x1, 0.35P
suffix: CMU
pattern: QFN
pitch: 0.35
bodyLength: 1.00
bodyWidth: 1.00
height: 0.45-0.55
pullBack: 0.0
rowCount: 3
columnCount: 2
leadLength: 0.25-0.35
leadWidth: 0.12-0.22
housing@P5: # SOT-853
suffix: P5
pattern: SOT23
leadCount: 5
pitch: 0.35 # e
bodyWidth: 0.75-0.85 # E
bodyLength: 0.95-1.05 # D
height: 0.34-0.40 # A
leadWidth: 0.10-0.20 # b
leadLength: 0.175 # L
leadHeight: 0.07-0.17 # c
leadSpan: 0.95-1.05 # HE