41 lines
900 B
Makefile
41 lines
900 B
Makefile
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
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MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU)
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include $(TOP)/$(BOARD_PATH)/board.mk
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CPU_CORE ?= cortex-m0plus
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CFLAGS += \
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-flto \
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-nostdlib \
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-D__USE_LPCOPEN \
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-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
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SRC_C += \
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src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
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$(MCU_DIR)/../gcc/cr_startup_lpc$(MCU_DRV).c \
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$(MCU_DIR)/src/chip_$(MCU_DRV).c \
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$(MCU_DIR)/src/clock_$(MCU_DRV).c \
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$(MCU_DIR)/src/iocon_$(MCU_DRV).c \
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$(MCU_DIR)/src/sysinit_$(MCU_DRV).c
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ifeq ($(MCU),11u6x)
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SRC_C += \
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$(MCU_DIR)/src/gpio_$(MCU_DRV).c \
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$(MCU_DIR)/src/syscon_$(MCU_DRV).c \
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else
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SRC_C += \
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$(MCU_DIR)/src/gpio_$(MCU_DRV)_1.c \
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$(MCU_DIR)/src/sysctl_$(MCU_DRV).c
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endif
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INC += \
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$(TOP)/$(MCU_DIR)/inc
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# For flash-jlink target
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JLINK_DEVICE = LPC11U68
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