82880eecbd
make nanolib linking explicitly by each family/board
2023-11-23 12:43:13 +07:00
322f58ea85
add CFLAGS_SKIP to improve sam compile time
2023-03-19 12:47:05 +07:00
ffdffc7e06
rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC
...
also fix trailing spaces
2023-03-16 23:11:11 +07:00
05e0205ad0
Merge branch 'master' into renesas-ra
2023-03-08 21:05:06 +07:00
8fe9022a6e
fix buid_board.py script
2022-06-29 14:06:44 +07:00
2a17a7e8f8
rework make freertos port handling
...
this allows ports to specify a freertos port outside the FreeRTOS-Kernel lib directory, which would otherwise not be possible
Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
2022-06-02 09:35:30 +01:00
826b34a8ac
enable -Wnull-dereference
2021-10-18 00:13:40 +07:00
31cd366935
more -Wcast-qual
2021-10-17 17:32:03 +07:00
253430a765
add example specific DEPS_SUBMODULES
2021-03-18 16:28:44 +07:00
ed8f117dd1
explicitly add dcd source file without vendor/family
2021-03-17 16:52:07 +07:00
590d8d4d5c
rename FAMILY_SUBMODULES to DEPS_SUBMODULES
2021-03-04 22:53:02 +07:00
b846ded487
merge no-family example build
...
specify FAMILY_SUBMODULES for all boards
2021-03-04 22:50:45 +07:00
4a0f5cbd63
change output filename to BOARD-Directory
2021-01-26 12:46:24 +07:00
ec018fbf4e
clean up jlink default interface
2020-10-08 17:17:37 +07:00
10d5dac913
update doc
2020-09-04 11:20:09 +07:00
76fe8ac612
fix samg55 ci build
2020-08-21 12:19:38 +07:00
5fa1e6e242
hack to undef LITTLE_ENDIAN for samg55
2020-03-11 12:32:29 +07:00
4c9c13c767
add uart sync support
2019-11-26 18:21:46 +07:00
387384c0d9
fix samg55 with newlib missing end symbol
2019-11-26 17:39:51 +07:00
58e8265964
usb hw init OK
2019-11-24 23:46:28 +07:00
42b55f6621
clean up
2019-11-04 15:00:44 +07:00
6baa79b330
board test works
2019-11-04 14:54:04 +07:00
hathach