bsp lpc17

This commit is contained in:
hathach 2023-03-19 18:03:18 +07:00
parent 934baae9b8
commit f75a019732
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GPG Key ID: F5D50C6D51D17CBA
10 changed files with 24 additions and 80 deletions

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@ -35,7 +35,7 @@ jobs:
- 'broadcom_32bit'
- 'imxrt'
- 'kinetis_k32 kinetis_kl'
- 'lpc11 lpc13 lpc15 lpc18'
- 'lpc11 lpc13 lpc15 lpc17 lpc18'
- 'lpc51 lpc54 lpc55'
- 'mm32 msp432e4'
- 'nrf'

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@ -0,0 +1,8 @@
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/lpc1769.ld
# For flash-jlink target
JLINK_DEVICE = LPC1769
# flash using jlink
flash: flash-jlink

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@ -0,0 +1,9 @@
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/lpc1768.ld
# For flash-jlink target
JLINK_DEVICE = LPC1768
PYOCD_TARGET = lpc1768
# flash using pyocd
flash: flash-pyocd

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@ -1,5 +1,8 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
include $(TOP)/$(BOARD_PATH)/board.mk
CFLAGS += \
-flto \
-mthumb \
@ -14,10 +17,10 @@ CFLAGS += \
# lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
# caused by freeRTOS port !!
CFLAGS += -Wno-error=maybe-uninitialized
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/lpc1769.ld
MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
SRC_C += \
src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
@ -35,9 +38,3 @@ INC += \
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
# For flash-jlink target
JLINK_DEVICE = LPC1769
# flash using jlink
flash: flash-jlink

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@ -4,32 +4,6 @@ CFLAGS += \
-DCPU_LPC51U68JBD64 \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))'
SRC_C += \
src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
$(MCU_DIR)/system_LPC51U68.c \
$(MCU_DIR)/drivers/fsl_clock.c \
$(MCU_DIR)/drivers/fsl_power.c \
$(MCU_DIR)/drivers/fsl_reset.c \
$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_usart.c
INC += \
$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
$(TOP)/$(MCU_DIR) \
$(TOP)/$(MCU_DIR)/drivers \
$(TOP)/$(SDK_DIR)/drivers/common \
$(TOP)/$(SDK_DIR)/drivers/flexcomm \
$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S
LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
JLINK_DEVICE = LPC51U68
PYOCD_TARGET = LPC51U68

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@ -1,44 +0,0 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m3 \
-nostdlib \
-DCORE_M3 \
-D__USE_LPCOPEN \
-DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \
-DRTC_EV_SUPPORT=0
# startup.c and lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/lpc1768.ld
SRC_C += \
src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
$(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \
$(MCU_DIR)/src/chip_17xx_40xx.c \
$(MCU_DIR)/src/clock_17xx_40xx.c \
$(MCU_DIR)/src/gpio_17xx_40xx.c \
$(MCU_DIR)/src/iocon_17xx_40xx.c \
$(MCU_DIR)/src/sysctl_17xx_40xx.c \
$(MCU_DIR)/src/sysinit_17xx_40xx.c \
$(MCU_DIR)/src/uart_17xx_40xx.c
INC += \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
# For flash-jlink target
JLINK_DEVICE = LPC1768
# flash using pyocd
flash: $(BUILD)/$(PROJECT).hex
pyocd flash -t lpc1768 $<