refactor: add hxfr per endpoint
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hathach
parent
bd2210b812
commit
e802fe0677
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@ -184,17 +184,21 @@ enum {
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typedef struct {
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uint8_t daddr;
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struct TU_ATTR_PACKED {
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uint8_t state : 4;
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uint8_t is_setup : 1; // also bit 4 in HXFR reg (smaller code, no shift necessary)
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uint8_t ep_dir : 1; // also bit 5 in HXFR reg (smaller code, no shift necessary)
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uint8_t is_iso : 1; // also bit 6 in HXFR reg (smaller code, no shift necessary)
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uint8_t data_toggle : 1;
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union { ;
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struct TU_ATTR_PACKED {
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uint8_t ep_num : 4;
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uint8_t is_setup : 1;
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uint8_t is_out : 1;
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uint8_t is_iso : 1;
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}hxfr_bm;
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uint8_t hxfr;
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};
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struct TU_ATTR_PACKED {
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uint8_t ep_num : 4;
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uint16_t packet_size : 12;
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uint8_t state : 4;
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uint8_t data_toggle : 1;
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uint16_t packet_size : 11;
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};
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uint16_t total_len;
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@ -370,10 +374,11 @@ TU_ATTR_ALWAYS_INLINE static inline void sndbc_write(uint8_t rhport, uint8_t dat
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//--------------------------------------------------------------------+
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static max3421_ep_t* find_ep_not_addr0(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
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uint8_t const is_out = 1-ep_dir;
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for(size_t i=1; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
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max3421_ep_t* ep = &_hcd_data.ep[i];
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// for control endpoint, skip direction check
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if (daddr == ep->daddr && ep_num == ep->ep_num && (ep_dir == ep->ep_dir || ep_num == 0)) {
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// control endpoint is bi-direction (skip check)
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if (daddr == ep->daddr && ep_num == ep->hxfr_bm.ep_num && (ep_num == 0 || is_out == ep->hxfr_bm.is_out)) {
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return ep;
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}
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}
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@ -577,7 +582,6 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
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// Open an endpoint
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bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * ep_desc) {
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(void) rhport;
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(void) daddr;
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uint8_t const ep_num = tu_edpt_number(ep_desc->bEndpointAddress);
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tusb_dir_t const ep_dir = tu_edpt_dir(ep_desc->bEndpointAddress);
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@ -589,12 +593,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * e
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ep = allocate_ep();
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TU_ASSERT(ep);
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ep->daddr = daddr;
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ep->ep_num = (uint8_t) (ep_num & 0x0f);
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ep->ep_dir = (ep_dir == TUSB_DIR_IN) ? 1 : 0;
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}
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if ( TUSB_XFER_ISOCHRONOUS == ep_desc->bmAttributes.xfer ) {
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ep->is_iso = 1;
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ep->hxfr_bm.ep_num = (uint8_t) (ep_num & 0x0f);
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ep->hxfr_bm.is_out = (ep_dir == TUSB_DIR_OUT) ? 1 : 0;
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ep->hxfr_bm.is_iso = (TUSB_XFER_ISOCHRONOUS == ep_desc->bmAttributes.xfer) ? 1 : 0;
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}
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ep->packet_size = (uint16_t) (tu_edpt_packet_size(ep_desc) & 0x7ff);
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@ -602,7 +603,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * e
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return true;
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}
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void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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static void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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// Page 12: Programming BULK-OUT Transfers
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// TODO double buffered
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if (switch_ep) {
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@ -618,12 +619,10 @@ void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
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}
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sndbc_write(rhport, xact_len, in_isr);
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uint8_t const hxfr = (uint8_t ) (ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0));
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hxfr_write(rhport, hxfr, in_isr);
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hxfr_write(rhport, ep->hxfr, in_isr);
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}
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void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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static void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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// Page 13: Programming BULK-IN Transfers
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if (switch_ep) {
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peraddr_write(rhport, ep->daddr, in_isr);
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@ -632,34 +631,36 @@ void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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reg_write(rhport, HCTL_ADDR, hctl, in_isr);
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}
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uint8_t const hxfr = (uint8_t) (ep->ep_num | (ep->is_iso ? HXFR_ISO : 0));
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hxfr_write(rhport, hxfr, in_isr);
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hxfr_write(rhport, ep->hxfr, in_isr);
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}
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TU_ATTR_ALWAYS_INLINE static inline
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void xact_inout(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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if (ep->ep_num == 0 ) {
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static void xact_setup(uint8_t rhport, max3421_ep_t *ep, bool in_isr) {
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peraddr_write(rhport, ep->daddr, in_isr);
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fifo_write(rhport, SUDFIFO_ADDR, ep->buf, 8, in_isr);
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hxfr_write(rhport, HXFR_SETUP, in_isr);
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}
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static void xact_generic(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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if (ep->hxfr_bm.ep_num == 0 ) {
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// setup
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if (ep->is_setup) {
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peraddr_write(rhport, ep->daddr, in_isr);
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fifo_write(rhport, SUDFIFO_ADDR, ep->buf, 8, in_isr);
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hxfr_write(rhport, HXFR_SETUP, in_isr);
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if (ep->hxfr_bm.is_setup) {
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xact_setup(rhport, ep, in_isr);
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return;
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}
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// status
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if (ep->buf == NULL || ep->total_len == 0) {
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uint8_t const hxfr = HXFR_HS | (ep->ep_dir ? 0 : HXFR_OUT_NIN);
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uint8_t const hxfr = HXFR_HS | (ep->hxfr_bm.is_out ? HXFR_OUT_NIN : 0);
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peraddr_write(rhport, ep->daddr, in_isr);
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hxfr_write(rhport, hxfr, in_isr);
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return;
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}
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}
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if (ep->ep_dir) {
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xact_in(rhport, ep, switch_ep, in_isr);
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}else {
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if (ep->hxfr_bm.is_out) {
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xact_out(rhport, ep, switch_ep, in_isr);
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}else {
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xact_in(rhport, ep, switch_ep, in_isr);
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}
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}
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@ -672,21 +673,21 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
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TU_VERIFY(ep);
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// control transfer can switch direction
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ep->ep_dir = ep_dir ? 1u : 0u;
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ep->hxfr_bm.is_out = ep_dir ? 0u : 1u;
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ep->buf = buffer;
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ep->total_len = buflen;
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ep->xferred_len = 0;
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ep->state = EP_STATE_ATTEMPT_1;
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if ( ep_num == 0 ) {
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ep->is_setup = 0;
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if (ep_num == 0) {
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ep->hxfr_bm.is_setup = 0;
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ep->data_toggle = 1;
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}
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// carry out transfer if not busy
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if ( !atomic_flag_test_and_set(&_hcd_data.busy) ) {
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xact_inout(rhport, ep, true, false);
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if (!atomic_flag_test_and_set(&_hcd_data.busy)) {
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xact_generic(rhport, ep, true, false);
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}
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return true;
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@ -709,16 +710,16 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]
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max3421_ep_t* ep = find_opened_ep(daddr, 0, 0);
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TU_ASSERT(ep);
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ep->ep_dir = 0;
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ep->is_setup = 1;
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ep->hxfr_bm.is_out = 1;
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ep->hxfr_bm.is_setup = 1;
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ep->buf = (uint8_t*)(uintptr_t) setup_packet;
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ep->total_len = 8;
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ep->xferred_len = 0;
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ep->state = EP_STATE_ATTEMPT_1;
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// carry out transfer if not busy
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if ( !atomic_flag_test_and_set(&_hcd_data.busy) ) {
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xact_inout(rhport, ep, true, false);
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if (!atomic_flag_test_and_set(&_hcd_data.busy)) {
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xact_setup(rhport, ep, false);
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}
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return true;
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@ -783,10 +784,11 @@ static void handle_connect_irq(uint8_t rhport, bool in_isr) {
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}
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static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t hrsl, bool in_isr) {
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uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
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uint8_t const ep_dir = 1-ep->hxfr_bm.is_out;
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uint8_t const ep_addr = tu_edpt_addr(ep->hxfr_bm.ep_num, ep_dir);
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// save data toggle
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if (ep->ep_dir) {
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if (ep_dir) {
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ep->data_toggle = (hrsl & HRSL_RCVTOGRD) ? 1u : 0u;
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}else {
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ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1u : 0u;
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@ -798,7 +800,7 @@ static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t re
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// Find next pending endpoint
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max3421_ep_t * next_ep = find_next_pending_ep(ep);
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if (next_ep) {
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xact_inout(rhport, next_ep, true, in_isr);
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xact_generic(rhport, next_ep, true, in_isr);
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}else {
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// no more pending
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atomic_flag_clear(&_hcd_data.busy);
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@ -841,7 +843,7 @@ static void handle_xfer_done(uint8_t rhport, bool in_isr) {
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hxfr_write(rhport, _hcd_data.hxfr, in_isr);
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} else if (next_ep) {
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// switch to next pending endpoint TODO could have issue with double buffered if not clear previously out data
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xact_inout(rhport, next_ep, true, in_isr);
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xact_generic(rhport, next_ep, true, in_isr);
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} else {
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// no more pending in this frame -> clear busy
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atomic_flag_clear(&_hcd_data.busy);
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@ -945,7 +947,7 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
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// start usb transfer if not busy
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if (ep_retry != NULL && !atomic_flag_test_and_set(&_hcd_data.busy)) {
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xact_inout(rhport, ep_retry, true, in_isr);
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xact_generic(rhport, ep_retry, true, in_isr);
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}
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}
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@ -34,7 +34,7 @@
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#define TUSB_VERSION_MAJOR 0
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#define TUSB_VERSION_MINOR 16
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#define TUSB_VERSION_REVISION 0
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#define TUSB_VERSION_BUILD 1
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#define TUSB_VERSION_BUILD 2
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#define TUSB_VERSION_NUMBER (TUSB_VERSION_MAJOR << 24 | TUSB_VERSION_MINOR << 16 | TUSB_VERSION_REVISION << 8 | TUSB_VERSION_BUILD)
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#define TUSB_VERSION_STRING TU_STRING(TUSB_VERSION_MAJOR) "." TU_STRING(TUSB_VERSION_MINOR) "." TU_STRING(TUSB_VERSION_REVISION)
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@ -529,17 +529,6 @@
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#define CFG_TUH_MAX3421 0
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#endif
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// MAX3421 Host max. transfer attempts per frame (except control and iso)
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// retry quantity = (CFG_TUH_MAX3421_MAX_ATTEMPS_PER_FRAME - 1)
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// 0 = endless retries. is default to keep compatibility
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// => this may overload MCU with permanently repeating NAK interrupts
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// => possible increased USB traffic, increased latencies, reduced data throughput
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// a usual attempt quantity is 3 (reference: the book "USB Complete" by Jan Axelson)
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#ifndef CFG_TUH_MAX3421_MAX_ATTEMPTS_PER_FRAME
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#define CFG_TUH_MAX3421_MAX_ATTEMPTS_PER_FRAME 0
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#endif
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//--------------------------------------------------------------------+
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// TypeC Options (Default)
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//--------------------------------------------------------------------+
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