Merge pull request #2217 from hathach/add-lpc43s67

Add lpc43s67
This commit is contained in:
Ha Thach 2023-08-14 22:28:53 +07:00 committed by GitHub
commit d713571cd4
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
15 changed files with 660 additions and 207 deletions

View File

@ -32,7 +32,7 @@ jobs:
# Alphabetical order
# Note: bundle multiple families into a matrix since there is only one self-hosted instance can
# run IAR build. Too many matrix can hurt due to setup/teardown overhead.
- 'stm32f0 stm32f1 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l4'
- 'lpc43 stm32f0 stm32f1 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l4'
steps:
- name: Clean workspace
run: |
@ -52,82 +52,3 @@ jobs:
- name: Test on actual hardware (hardware in the loop)
run: |
python3 test/hil/hil_test.py hil_hfp.json
# # Upload binaries for hardware test with self-hosted
# - name: Prepare stm32l412nucleo Artifacts
# if: contains(matrix.family, 'stm32l4')
# working-directory: ${{github.workspace}}/cmake-build/cmake-build-stm32l412nucleo
# run: |
# find device/ -name "*.elf" -exec mv {} ../../ \;
#
# - name: Upload Artifacts for stm32l412nucleo
# if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
# uses: actions/upload-artifact@v3
# with:
# name: stm32l4
# path: |
# *.elf
# ---------------------------------------
# Hardware in the loop (HIL)
# Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user
# ---------------------------------------
# hw-stm32l412nucleo-test:
# needs: cmake
# runs-on: [self-hosted, Linux, X64, hifiphile]
#
# steps:
# - name: Clean workspace
# run: |
# echo "Cleaning up previous run"
# rm -rf "${{ github.workspace }}"
# mkdir -p "${{ github.workspace }}"
#
# - name: Download stm32l4 Artifacts
# uses: actions/download-artifact@v3
# with:
# name: stm32l4
#
# - name: Create flash.sh
# run: |
# echo > flash.sh 'echo halt > flash.jlink'
# echo >> flash.sh 'echo r >> flash.jlink'
# echo >> flash.sh 'echo loadfile $1 >> flash.jlink'
# echo >> flash.sh 'echo r >> flash.jlink'
# echo >> flash.sh 'echo go >> flash.jlink'
# echo >> flash.sh 'echo exit >> flash.jlink'
# echo >> flash.sh 'cmdout=$(JLinkExe -USB 774470029 -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
# echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
# chmod +x flash.sh
#
# - name: Test cdc_dual_ports
# run: |
# ./flash.sh cdc_dual_ports.elf
# while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
# test -e /dev/ttyACM1 && echo "ttyACM1 exists"
# test -e /dev/ttyACM2 && echo "ttyACM2 exists"
#
# # Debian does not auto mount usb drive. skip this test for now
# - name: Test cdc_msc
# if: false
# run: |
# ./flash.sh cdc_msc.elf
# readme='/media/pi/TinyUSB MSC/README.TXT'
# while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
# test -e /dev/ttyACM1 && echo "ttyACM1 exists"
# test -f "$readme" && echo "$readme exists"
# cat "$readme"
#
# - name: Test dfu
# run: |
# ./flash.sh dfu.elf
# while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
# dfu-util -d cafe -a 0 -U dfu0
# dfu-util -d cafe -a 1 -U dfu1
# grep "TinyUSB DFU! - Partition 0" dfu0
# grep "TinyUSB DFU! - Partition 1" dfu1
#
# - name: Test dfu_runtime
# run: |
# ./flash.sh dfu_runtime.elf
# while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done

View File

@ -160,7 +160,9 @@ static void process_kbd_report(hid_keyboard_report_t const *report)
putchar(ch);
if ( ch == '\r' ) putchar('\n'); // added new line for enter key
#ifndef __ICCARM__ // TODO IAR doesn't support stream control ?
fflush(stdout); // flush right away, else nanolib will wait for newline
#endif
}
}
// TODO example skips key released

View File

@ -22,11 +22,13 @@ target_sources(${PROJECT} PUBLIC
)
# Suppress warnings on fatfs
set_source_files_properties(
${TOP}/lib/fatfs/source/ff.c
PROPERTIES
COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual"
)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
set_source_files_properties(
${TOP}/lib/fatfs/source/ff.c
PROPERTIES
COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual"
)
endif ()
# Example include
target_include_directories(${PROJECT} PUBLIC

View File

@ -66,7 +66,10 @@ bool msc_app_init(void)
for(size_t i=0; i<CFG_TUH_DEVICE_MAX; i++) _disk_busy[i] = false;
// disable stdout buffered for echoing typing command
#ifndef __ICCARM__ // TODO IAR doesn't support stream control ?
setbuf(stdout, NULL);
#endif
cli_init();
return true;

View File

@ -62,6 +62,7 @@ static inline void board_lpc18_pinmux(void)
// USB0
//{ 0x6, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC1 }, // P6_3 USB0_PWR_EN, USB0 VBus function
// USB1
//{ 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 }, // P9_5 USB1_VBUS_EN, USB1 VBus function
//{ 0x2, 5, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
{0x2, 5, SCU_MODE_INBUFF_EN | SCU_MODE_PULLUP | SCU_MODE_FUNC4 },

View File

@ -33,6 +33,51 @@ extern "C" {
#include "pca9532.h"
// P9_1 joystick down
#define BUTTON_PORT 4
#define BUTTON_PIN 13
#define BUTTON_STATE_ACTIVE 0
#define UART_DEV LPC_USART0
#define UART_PORT 0x0f
#define UART_PIN_TX 10
#define UART_PIN_RX 11
//static const struct {
// uint8_t mux_port;
// uint8_t mux_pin;
//
// uint8_t gpio_port;
// uint8_t gpio_pin;
//}buttons[] =
//{
// {0x0a, 3, 4, 10 }, // Joystick up
// {0x09, 1, 4, 13 }, // Joystick down
// {0x0a, 2, 4, 9 }, // Joystick left
// {0x09, 0, 4, 12 }, // Joystick right
// {0x0a, 1, 4, 8 }, // Joystick press
// {0x02, 7, 0, 7 }, // SW6
//};
static const PINMUX_GRP_T pinmuxing[] = {
// Button ( Joystick down )
{ 0x9, 1, SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLUP },
// UART
{ UART_PORT, UART_PIN_TX, SCU_MODE_PULLDOWN | SCU_MODE_FUNC1 },
{ UART_PORT, UART_PIN_RX, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC1 },
// USB
};
/* Pin clock mux values, re-used structure, value in first index is meaningless */
//static const PINMUX_GRP_T pinclockmuxing[] = {
// { 0, 0, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0 },
// { 0, 1, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0 },
// { 0, 2, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0 },
// { 0, 3, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0 },
//};
#ifdef __cplusplus
}
#endif

View File

@ -0,0 +1,11 @@
set(MCU_VARIANT LPC43S67_M4)
set(JLINK_DEVICE LPC43S67_M4)
set(PYOCD_TARGET LPC43S67)
set(NXPLINK_DEVICE LPC43S67:LPCXPRESSO43S67)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc4367.ld)
function(update_board TARGET)
# nothing to do
endfunction()

View File

@ -0,0 +1,73 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2021, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef _BOARD_LPCXPRESSO43S67_H_
#define _BOARD_LPCXPRESSO43S67_H_
// Note: For USB Host demo, install JP4
// WARNING: don't install JP4 when running as device
#ifdef __cplusplus
extern "C" {
#endif
// LED Red
#define LED_PORT 3
#define LED_PIN 7
#define LED_STATE_ON 0
// ISP Button (SW2)
#define BUTTON_PORT 0
#define BUTTON_PIN 7
#define BUTTON_STATE_ACTIVE 0
#define UART_DEV LPC_USART0
static const PINMUX_GRP_T pinmuxing[] = {
// LEDs P6_11 as GPIO3[7]
{ 0x6, 11, SCU_MODE_INBUFF_EN | SCU_MODE_PULLUP | SCU_MODE_FUNC0 },
// Button P2_7 as GPIO0[7]
{ 0x2, 7, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0 },
// UART
{ 0x06, 4, SCU_MODE_PULLDOWN | SCU_MODE_FUNC2 },
{ 0x02, 1, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC1 },
// USB0
//{ 0x6, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC1 }, // P6_3 USB0_PWR_EN, USB0 VBus function
// USB 1
//{ 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 }, // P9_5 USB1_VBUS_EN, USB1 VBus function
//{ 0x2, 5, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
{0x2, 5, SCU_MODE_INBUFF_EN | SCU_MODE_PULLUP | SCU_MODE_FUNC4 },
};
#ifdef __cplusplus
}
#endif
#endif

View File

@ -0,0 +1,6 @@
LD_FILE = $(BOARD_PATH)/lpc4367.ld
# For flash-jlink target
JLINK_DEVICE = LPC43S67_M4
flash: flash-jlink

View File

@ -0,0 +1,402 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2023
* Generated linker script file for LPC4337
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.7.1 [Build 9221] [2023-03-28] on Aug 14, 2023, 3:36:29 PM
*/
MEMORY
{
/* Define each memory region */
MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */
RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */
RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
}
/* Define a symbol for the top of each memory region */
__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */
__base_Flash = 0x1a000000 ; /* Flash */
__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */
__base_Flash2 = 0x1b000000 ; /* Flash2 */
__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
__base_RAM = 0x10000000 ; /* RAM */
__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */
__base_RAM2 = 0x10080000 ; /* RAM2 */
__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */
__base_RAM3 = 0x20000000 ; /* RAM3 */
__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */
__base_RAM4 = 0x20008000 ; /* RAM4 */
__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */
__base_RAM5 = 0x2000c000 ; /* RAM5 */
__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
ENTRY(ResetISR)
SECTIONS
{
.text_Flash2 : ALIGN(4)
{
FILL(0xff)
*(.text_Flash2) /* for compatibility with previous releases */
*(.text_MFlashB512) /* for compatibility with previous releases */
*(.text.$Flash2)
*(.text.$MFlashB512)
*(.text_Flash2.*) /* for compatibility with previous releases */
*(.text_MFlashB512.*) /* for compatibility with previous releases */
*(.text.$Flash2.*)
*(.text.$MFlashB512.*)
*(.rodata.$Flash2)
*(.rodata.$MFlashB512)
*(.rodata.$Flash2.*)
*(.rodata.$MFlashB512.*) } > MFlashB512
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
LONG(LOADADDR(.data_RAM3));
LONG( ADDR(.data_RAM3));
LONG( SIZEOF(.data_RAM3));
LONG(LOADADDR(.data_RAM4));
LONG( ADDR(.data_RAM4));
LONG( SIZEOF(.data_RAM4));
LONG(LOADADDR(.data_RAM5));
LONG( ADDR(.data_RAM5));
LONG( SIZEOF(.data_RAM5));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
LONG( ADDR(.bss_RAM3));
LONG( SIZEOF(.bss_RAM3));
LONG( ADDR(.bss_RAM4));
LONG( SIZEOF(.bss_RAM4));
LONG( ADDR(.bss_RAM5));
LONG( SIZEOF(.bss_RAM5));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > MFlashA512
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlashA512
.ARM.exidx : ALIGN(4)
{
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > MFlashA512
_etext = .;
/* DATA section for RamLoc40 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
PROVIDE(__start_data_RamLoc40 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$RamLoc40)
*(.data.$RAM2)
*(.data.$RamLoc40)
*(.data.$RAM2.*)
*(.data.$RamLoc40.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
PROVIDE(__end_data_RamLoc40 = .) ;
} > RamLoc40 AT>MFlashA512
/* DATA section for RamAHB32 */
.data_RAM3 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM3 = .) ;
PROVIDE(__start_data_RamAHB32 = .) ;
*(.ramfunc.$RAM3)
*(.ramfunc.$RamAHB32)
*(.data.$RAM3)
*(.data.$RamAHB32)
*(.data.$RAM3.*)
*(.data.$RamAHB32.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM3 = .) ;
PROVIDE(__end_data_RamAHB32 = .) ;
} > RamAHB32 AT>MFlashA512
/* DATA section for RamAHB16 */
.data_RAM4 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM4 = .) ;
PROVIDE(__start_data_RamAHB16 = .) ;
*(.ramfunc.$RAM4)
*(.ramfunc.$RamAHB16)
*(.data.$RAM4)
*(.data.$RamAHB16)
*(.data.$RAM4.*)
*(.data.$RamAHB16.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM4 = .) ;
PROVIDE(__end_data_RamAHB16 = .) ;
} > RamAHB16 AT>MFlashA512
/* DATA section for RamAHB_ETB16 */
.data_RAM5 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM5 = .) ;
PROVIDE(__start_data_RamAHB_ETB16 = .) ;
*(.ramfunc.$RAM5)
*(.ramfunc.$RamAHB_ETB16)
*(.data.$RAM5)
*(.data.$RamAHB_ETB16)
*(.data.$RAM5.*)
*(.data.$RamAHB_ETB16.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM5 = .) ;
PROVIDE(__end_data_RamAHB_ETB16 = .) ;
} > RamAHB_ETB16 AT>MFlashA512
/* MAIN DATA SECTION */
.uninit_RESERVED (NOLOAD) : ALIGN(4)
{
_start_uninit_RESERVED = .;
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > RamLoc32 AT> RamLoc32
/* Main DATA section (RamLoc32) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
PROVIDE(__start_data_RAM = .) ;
PROVIDE(__start_data_RamLoc32 = .) ;
*(vtable)
*(.ramfunc*)
KEEP(*(CodeQuickAccess))
KEEP(*(DataQuickAccess))
*(RamFunction)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
PROVIDE(__end_data_RAM = .) ;
PROVIDE(__end_data_RamLoc32 = .) ;
} > RamLoc32 AT>MFlashA512
/* BSS section for RamLoc40 */
.bss_RAM2 : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
PROVIDE(__start_bss_RamLoc40 = .) ;
*(.bss.$RAM2)
*(.bss.$RamLoc40)
*(.bss.$RAM2.*)
*(.bss.$RamLoc40.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
PROVIDE(__end_bss_RamLoc40 = .) ;
} > RamLoc40 AT> RamLoc40
/* BSS section for RamAHB32 */
.bss_RAM3 : ALIGN(4)
{
PROVIDE(__start_bss_RAM3 = .) ;
PROVIDE(__start_bss_RamAHB32 = .) ;
*(.bss.$RAM3)
*(.bss.$RamAHB32)
*(.bss.$RAM3.*)
*(.bss.$RamAHB32.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM3 = .) ;
PROVIDE(__end_bss_RamAHB32 = .) ;
} > RamAHB32 AT> RamAHB32
/* BSS section for RamAHB16 */
.bss_RAM4 : ALIGN(4)
{
PROVIDE(__start_bss_RAM4 = .) ;
PROVIDE(__start_bss_RamAHB16 = .) ;
*(.bss.$RAM4)
*(.bss.$RamAHB16)
*(.bss.$RAM4.*)
*(.bss.$RamAHB16.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM4 = .) ;
PROVIDE(__end_bss_RamAHB16 = .) ;
} > RamAHB16 AT> RamAHB16
/* BSS section for RamAHB_ETB16 */
.bss_RAM5 : ALIGN(4)
{
PROVIDE(__start_bss_RAM5 = .) ;
PROVIDE(__start_bss_RamAHB_ETB16 = .) ;
*(.bss.$RAM5)
*(.bss.$RamAHB_ETB16)
*(.bss.$RAM5.*)
*(.bss.$RamAHB_ETB16.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM5 = .) ;
PROVIDE(__end_bss_RamAHB_ETB16 = .) ;
} > RamAHB_ETB16 AT> RamAHB_ETB16
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
PROVIDE(__start_bss_RAM = .) ;
PROVIDE(__start_bss_RamLoc32 = .) ;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(__end_bss_RAM = .) ;
PROVIDE(__end_bss_RamLoc32 = .) ;
PROVIDE(end = .);
} > RamLoc32 AT> RamLoc32
/* NOINIT section for RamLoc40 */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM2 = .) ;
PROVIDE(__start_noinit_RamLoc40 = .) ;
*(.noinit.$RAM2)
*(.noinit.$RamLoc40)
*(.noinit.$RAM2.*)
*(.noinit.$RamLoc40.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM2 = .) ;
PROVIDE(__end_noinit_RamLoc40 = .) ;
} > RamLoc40 AT> RamLoc40
/* NOINIT section for RamAHB32 */
.noinit_RAM3 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM3 = .) ;
PROVIDE(__start_noinit_RamAHB32 = .) ;
*(.noinit.$RAM3)
*(.noinit.$RamAHB32)
*(.noinit.$RAM3.*)
*(.noinit.$RamAHB32.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM3 = .) ;
PROVIDE(__end_noinit_RamAHB32 = .) ;
} > RamAHB32 AT> RamAHB32
/* NOINIT section for RamAHB16 */
.noinit_RAM4 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM4 = .) ;
PROVIDE(__start_noinit_RamAHB16 = .) ;
*(.noinit.$RAM4)
*(.noinit.$RamAHB16)
*(.noinit.$RAM4.*)
*(.noinit.$RamAHB16.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM4 = .) ;
PROVIDE(__end_noinit_RamAHB16 = .) ;
} > RamAHB16 AT> RamAHB16
/* NOINIT section for RamAHB_ETB16 */
.noinit_RAM5 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM5 = .) ;
PROVIDE(__start_noinit_RamAHB_ETB16 = .) ;
*(.noinit.$RAM5)
*(.noinit.$RamAHB_ETB16)
*(.noinit.$RAM5.*)
*(.noinit.$RamAHB_ETB16.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM5 = .) ;
PROVIDE(__end_noinit_RamAHB_ETB16 = .) ;
} > RamAHB_ETB16 AT> RamAHB_ETB16
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
PROVIDE(__start_noinit_RAM = .) ;
PROVIDE(__start_noinit_RamLoc32 = .) ;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
PROVIDE(__end_noinit_RAM = .) ;
PROVIDE(__end_noinit_RamLoc32 = .) ;
} > RamLoc32 AT> RamLoc32
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
/* ## Create checksum value (used in startup) ## */
PROVIDE(__valid_user_code_checksum = 0 -
(_vStackTop
+ (ResetISR + 1)
+ (NMI_Handler + 1)
+ (HardFault_Handler + 1)
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
) );
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

View File

@ -39,31 +39,6 @@
#include "bsp/board_api.h"
#include "board.h"
#define UART_DEV LPC_USART0
#define UART_PORT 0x0f
#define UART_PIN_TX 10
#define UART_PIN_RX 11
// P9_1 joystick down
#define BUTTON_PORT 4
#define BUTTON_PIN 13
//static const struct {
// uint8_t mux_port;
// uint8_t mux_pin;
//
// uint8_t gpio_port;
// uint8_t gpio_pin;
//}buttons[] =
//{
// {0x0a, 3, 4, 10 }, // Joystick up
// {0x09, 1, 4, 13 }, // Joystick down
// {0x0a, 2, 4, 9 }, // Joystick left
// {0x09, 0, 4, 12 }, // Joystick right
// {0x0a, 1, 4, 8 }, // Joystick press
// {0x02, 7, 0, 7 }, // SW6
//};
#ifdef BOARD_TUD_RHPORT
#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
#else
@ -76,56 +51,46 @@
#define PORT_SUPPORT_HOST(_n) 0
#endif
/*------------------------------------------------------------------*/
/* BOARD API
*------------------------------------------------------------------*/
/* System configuration variables used by chip driver */
const uint32_t OscRateIn = 12000000;
const uint32_t ExtRateIn = 0;
static const PINMUX_GRP_T pinmuxing[] =
{
// Button ( Joystick down )
{0x9, 1, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLUP)},
// UART
{UART_PORT, UART_PIN_TX, SCU_MODE_PULLDOWN | SCU_MODE_FUNC1},
{UART_PORT, UART_PIN_RX, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC1},
// USB
};
/* Pin clock mux values, re-used structure, value in first index is meaningless */
static const PINMUX_GRP_T pinclockmuxing[] =
{
{0, 0, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
{0, 1, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
{0, 2, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
{0, 3, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
};
/*------------------------------------------------------------------*/
/* BOARD API
*------------------------------------------------------------------*/
// Invoked by startup code
void SystemInit(void)
{
#ifdef __USE_LPCOPEN
extern void (* const g_pfnVectors[])(void);
unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
#ifdef __ICCARM__
extern void *__vector_table;
*pSCB_VTOR = (unsigned int) &__vector_table;
#elif defined(__ARMCC_VERSION)
extern void *__Vectors;
*pSCB_VTOR = (unsigned int) &__Vectors;
#else // other compoiler using cr_startup_lpc43xx.c
extern void (* const g_pfnVectors[])(void);
*pSCB_VTOR = (unsigned int) g_pfnVectors;
#endif
#if __FPU_USED == 1
fpuInit();
#endif
#endif // __USE_LPCOPEN
/* Setup system level pin muxing */
Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
#endif
/* Clock pins only, group field not used */
for (int i = 0; i <(int) (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++)
{
Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc);
}
/* Setup system level pin muxing */
Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
// /* Clock pins only, group field not used */
// for ( int i = 0; i < (int) (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++ ) {
// Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc);
// }
Chip_SetupXtalClocking();
}
@ -144,13 +109,16 @@ void board_init(void)
Chip_GPIO_Init(LPC_GPIO_PORT);
#ifdef __PCA9532C_H
// LED via pca9532 I2C
Chip_SCU_I2C0PinConfig(I2C0_STANDARD_FAST_MODE);
Chip_I2C_Init(I2C0);
Chip_I2C_SetClockRate(I2C0, 100000);
Chip_I2C_SetMasterEventHandler(I2C0, Chip_I2C_EventHandlerPolling);
pca9532_init();
#else
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LED_PORT, LED_PIN);
#endif
// Button
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
@ -264,34 +232,37 @@ void USB1_IRQHandler(void)
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
if (state)
{
pca9532_setLeds( LED1, 0 );
}else
{
pca9532_setLeds( 0, LED1);
void board_led_write(bool state) {
#ifdef __PCA9532C_H
if ( state ) {
pca9532_setLeds(LED1, 0);
} else {
pca9532_setLeds(0, LED1);
}
#else
Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state ? LED_STATE_ON : !LED_STATE_ON);
#endif
}
uint32_t board_button_read(void)
{
// active low
return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
uint32_t board_button_read(void) {
return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
if ( max_len < 16 ) return 0;
uint32_t* id32 = (uint32_t*) (uintptr_t) id;
Chip_IAP_ReadUID(id32);
return 16;
}
int board_uart_read(uint8_t *buf, int len) {
return Chip_UART_Read(UART_DEV, buf, len);
}
int board_uart_write(void const * buf, int len)
{
uint8_t const* buf8 = (uint8_t const*) buf;
for(int i=0; i<len; i++)
{
while ((Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0) {}
int board_uart_write(void const *buf, int len) {
uint8_t const *buf8 = (uint8_t const *) buf;
for ( int i = 0; i < len; i++ ) {
while ( (Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0 ) {}
Chip_UART_SendByte(UART_DEV, buf8[i]);
}
@ -300,13 +271,13 @@ int board_uart_write(void const * buf, int len)
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)
{
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void)
{
uint32_t board_millis(void) {
return system_ticks;
}
#endif

View File

@ -17,42 +17,48 @@ set(FAMILY_MCUS LPC43XX CACHE INTERNAL "")
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/../gcc/cr_startup_lpc43xx.c
${SDK_DIR}/src/chip_18xx_43xx.c
${SDK_DIR}/src/clock_18xx_43xx.c
${SDK_DIR}/src/fpu_init.c
${SDK_DIR}/src/gpio_18xx_43xx.c
${SDK_DIR}/src/sysinit_18xx_43xx.c
${SDK_DIR}/src/uart_18xx_43xx.c
)
target_compile_options(${BOARD_TARGET} PUBLIC
-nostdlib
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
__USE_LPCOPEN
CORE_M4
)
target_include_directories(${BOARD_TARGET} PUBLIC
${SDK_DIR}/inc
${SDK_DIR}/inc/config_43xx
)
if (TARGET ${BOARD_TARGET})
return()
endif ()
update_board(${BOARD_TARGET})
# Startup & Linker script
set(STARTUP_FILE_GNU ${SDK_DIR}/../gcc/cr_startup_lpc43xx.c)
set(STARTUP_FILE_IAR ${SDK_DIR}/../iar/iar_startup_lpc18xx43xx.s)
set(LD_FILE_IAR ${SDK_DIR}/../iar/linker/lpc18xx_43xx_ldscript_iflash.icf)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
add_library(${BOARD_TARGET} STATIC
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
${SDK_DIR}/src/chip_18xx_43xx.c
${SDK_DIR}/src/clock_18xx_43xx.c
${SDK_DIR}/src/fpu_init.c
${SDK_DIR}/src/gpio_18xx_43xx.c
${SDK_DIR}/src/iap_18xx_43xx.c
${SDK_DIR}/src/sysinit_18xx_43xx.c
${SDK_DIR}/src/uart_18xx_43xx.c
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
__USE_LPCOPEN
CORE_M4
)
target_include_directories(${BOARD_TARGET} PUBLIC
${SDK_DIR}/inc
${SDK_DIR}/inc/config_43xx
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_compile_options(${BOARD_TARGET} PUBLIC -nostdlib)
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endfunction()

View File

@ -12,7 +12,11 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=strict-prototypes -Wno-error=cast-qual
CFLAGS += \
-Wno-error=unused-parameter \
-Wno-error=strict-prototypes \
-Wno-error=cast-qual \
-Wno-error=incompatible-pointer-types \
SRC_C += \
src/portable/chipidea/ci_hs/dcd_ci_hs.c \
@ -21,12 +25,11 @@ SRC_C += \
${SDK_DIR}/../gcc/cr_startup_lpc43xx.c \
${SDK_DIR}/src/chip_18xx_43xx.c \
${SDK_DIR}/src/clock_18xx_43xx.c \
${SDK_DIR}/src/fpu_init.c \
${SDK_DIR}/src/gpio_18xx_43xx.c \
${SDK_DIR}/src/iap_18xx_43xx.c \
${SDK_DIR}/src/sysinit_18xx_43xx.c \
${SDK_DIR}/src/i2c_18xx_43xx.c \
${SDK_DIR}/src/i2cm_18xx_43xx.c \
${SDK_DIR}/src/uart_18xx_43xx.c \
${SDK_DIR}/src/fpu_init.c
INC += \
$(TOP)/$(BOARD_PATH) \

View File

@ -13,6 +13,13 @@
"debugger": "jlink",
"debugger_sn": "770935966",
"cpu": "STM32F746NG"
},
{
"name": "lpcxpresso43s67",
"uid": "08F000044528BAAA8D858F58C50700F5",
"debugger": "jlink",
"debugger_sn": "728973776",
"cpu": "LPC43S67_M4"
}
]
}

View File

@ -48,7 +48,7 @@ deps_optional = {
'2204191ec76283371419fbcec207da02e1bc22fa',
'nuc'],
'hw/mcu/nxp/lpcopen': ['https://github.com/hathach/nxp_lpcopen.git',
'43c45c85405a5dd114fff0ea95cca62837740c13',
'84e0bd3e43910aaf71eefd62075cf57495418312',
'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
'950819b7de9b32f92c3edf396bc5ffb8d66e7009',