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passkey_fw
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update cmake to build with IAR for g0 and g4

This commit is contained in:
hathach 2023-06-02 15:26:16 +07:00
parent fcf7791454
commit bb795e6a5e
No known key found for this signature in database
GPG Key ID: F5D50C6D51D17CBA
20 changed files with 415 additions and 311 deletions
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2
hw/bsp/family_support.cmake
View File

@ -108,7 +108,7 @@ function(family_configure_common TARGET)
COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
)
if (CMAKE_C_COMPILER_ID STREQUAL "GCC")
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
# Generate map file
target_link_options(${TARGET} PUBLIC
# link map

124
hw/bsp/imxrt/family.cmake
View File

@ -4,8 +4,11 @@ if (NOT BOARD)
message(FATAL_ERROR "BOARD not specified")
endif ()
# enable LTO
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
@ -13,66 +16,79 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS MIMXRT CACHE INTERNAL "")
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
set(BOARD_TARGET board_${BOARD})
if (NOT TARGET ${BOARD_TARGET})
set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/drivers/common/fsl_common.c
${SDK_DIR}/drivers/igpio/fsl_gpio.c
${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
${SDK_DIR}/devices/${MCU_VARIANT}/project_template/clock_config.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
__ARMVFP__=0
__ARMFPV5__=0
XIP_EXTERNAL_FLASH=1
XIP_BOOT_HEADER_ENABLE=1
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/project_template
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/igpio
${SDK_DIR}/drivers/lpuart
)
add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/drivers/common/fsl_common.c
${SDK_DIR}/drivers/igpio/fsl_gpio.c
${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
${SDK_DIR}/devices/${MCU_VARIANT}/project_template/clock_config.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
__ARMVFP__=0
__ARMFPV5__=0
XIP_EXTERNAL_FLASH=1
XIP_BOOT_HEADER_ENABLE=1
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/project_template
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/igpio
${SDK_DIR}/drivers/lpuart
)
update_board(${BOARD_TARGET})
update_board(${BOARD_TARGET})
if (NOT DEFINED LD_FILE_${TOOLCHAIN})
set(LD_FILE_GCC ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
endif ()
# LD_FILE and STARTUP_FILE can be defined in board.cmake
if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
#set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
endif ()
if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
#set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
endif ()
if (TOOLCHAIN STREQUAL "gcc")
target_sources(${BOARD_TARGET} PUBLIC
${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GCC}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
# force linker to look for these symbols
-Wl,-uimage_vector_table
-Wl,-ug_boot_data
)
else ()
# TODO support IAR
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
# force linker to look for these symbols
-Wl,-uimage_vector_table
-Wl,-ug_boot_data
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endif () # BOARD_TARGET
endfunction()
#------------------------------------
@ -81,6 +97,9 @@ endif () # BOARD_TARGET
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
@ -103,12 +122,11 @@ function(family_configure_example TARGET)
family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})
family_flash_nxplink(${TARGET})
#family_flash_pyocd(${TARGET})
#family_flash_nxplink(${TARGET})
endfunction()

2
hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
View File

@ -4,7 +4,7 @@ set(JLINK_DEVICE LPC18S37)
set(PYOCD_TARGET LPC18S37)
set(NXPLINK_DEVICE LPC18S37:LPCXPRESSO18S37)
set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld)
function(update_board TARGET)
# nothing to do

2
hw/bsp/lpc18/boards/mcb1800/board.cmake
View File

@ -4,7 +4,7 @@ set(JLINK_DEVICE LPC1857)
set(PYOCD_TARGET LPC1857)
set(NXPLINK_DEVICE LPC1857:MCB1857)
set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld)
function(update_board TARGET)
# nothing to do

86
hw/bsp/lpc18/family.cmake
View File

@ -6,8 +6,8 @@ endif ()
set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx)
# enable LTO
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m3 CACHE INTERNAL "System Processor")
@ -15,48 +15,56 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS LPC18XX CACHE INTERNAL "")
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
set(BOARD_TARGET board_${BOARD})
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
${SDK_DIR}/src/chip_18xx_43xx.c
${SDK_DIR}/src/clock_18xx_43xx.c
${SDK_DIR}/src/gpio_18xx_43xx.c
${SDK_DIR}/src/sysinit_18xx_43xx.c
${SDK_DIR}/src/uart_18xx_43xx.c
)
target_compile_options(${BOARD_TARGET} PUBLIC
-nostdlib
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
__USE_LPCOPEN
CORE_M3
)
target_include_directories(${BOARD_TARGET} PUBLIC
${SDK_DIR}/inc
${SDK_DIR}/inc/config_18xx
)
update_board(${BOARD_TARGET})
if (TOOLCHAIN STREQUAL "gcc")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GCC}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
${SDK_DIR}/src/chip_18xx_43xx.c
${SDK_DIR}/src/clock_18xx_43xx.c
${SDK_DIR}/src/gpio_18xx_43xx.c
${SDK_DIR}/src/sysinit_18xx_43xx.c
${SDK_DIR}/src/uart_18xx_43xx.c
)
else ()
# TODO support IAR
target_compile_options(${BOARD_TARGET} PUBLIC
-nostdlib
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
__USE_LPCOPEN
CORE_M3
)
target_include_directories(${BOARD_TARGET} PUBLIC
${SDK_DIR}/inc
${SDK_DIR}/inc/config_18xx
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endif () # BOARD_TARGET
endfunction()
#------------------------------------
@ -65,6 +73,9 @@ endif () # BOARD_TARGET
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
@ -87,10 +98,11 @@ function(family_configure_example TARGET)
family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})
#family_flash_nxplink(${TARGET})
endfunction()

2
hw/bsp/lpc55/boards/double_m33_express/board.cmake
View File

@ -5,7 +5,7 @@ set(JLINK_DEVICE LPC55S69)
set(PYOCD_TARGET LPC55S69)
set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC

108
hw/bsp/lpc55/family.cmake
View File

@ -31,58 +31,67 @@ endif()
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
set(BOARD_TARGET board_${BOARD})
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
# driver
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
)
target_include_directories(${BOARD_TARGET} PUBLIC
${TOP}/lib/sct_neopixel
# driver
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/flexcomm
${SDK_DIR}/drivers/lpc_iocon
${SDK_DIR}/drivers/lpc_gpio
${SDK_DIR}/drivers/lpuart
${SDK_DIR}/drivers/sctimer
# mcu
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
)
update_board(${BOARD_TARGET})
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
# driver
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
)
target_include_directories(${BOARD_TARGET} PUBLIC
${TOP}/lib/sct_neopixel
# driver
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/flexcomm
${SDK_DIR}/drivers/lpc_iocon
${SDK_DIR}/drivers/lpc_gpio
${SDK_DIR}/drivers/lpuart
${SDK_DIR}/drivers/sctimer
# mcu
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
)
if (NOT DEFINED LD_FILE_${TOOLCHAIN})
set(LD_FILE_GCC ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
endif ()
update_board(${BOARD_TARGET})
if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
endif ()
if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
endif ()
if (TOOLCHAIN STREQUAL "gcc")
target_sources(${BOARD_TARGET} PUBLIC
${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_link_options(${BOARD_TARGET} PUBLIC
# linker file
"LINKER:--script=${LD_FILE_GCC}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
else ()
# TODO support IAR
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
# linker file
"LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endif () # BOARD_TARGET
endfunction()
#------------------------------------
@ -91,6 +100,9 @@ endif () # BOARD_TARGET
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
@ -113,7 +125,7 @@ function(family_configure_example TARGET)
family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})

100
hw/bsp/mcx/family.cmake
View File

@ -7,8 +7,8 @@ endif ()
set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
# enable LTO
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
@ -16,57 +16,64 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
set(BOARD_TARGET board_${BOARD})
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
# external driver
#lib/sct_neopixel/sct_neopixel.c
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
# external driver
#lib/sct_neopixel/sct_neopixel.c
# driver
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
)
# target_compile_definitions(${BOARD_TARGET} PUBLIC
# )
target_include_directories(${BOARD_TARGET} PUBLIC
# driver
# mcu
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
)
update_board(${BOARD_TARGET})
# driver
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
)
# target_compile_definitions(${BOARD_TARGET} PUBLIC
# )
target_include_directories(${BOARD_TARGET} PUBLIC
# driver
# mcu
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
)
if (TOOLCHAIN STREQUAL "gcc")
target_sources(${BOARD_TARGET} PUBLIC
${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
)
cmake_print_variables(CMAKE_CURRENT_BINARY_DIR)
target_link_options(${BOARD_TARGET} PUBLIC
# linker file
"LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
else ()
# TODO support IAR
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_sources(${BOARD_TARGET} PUBLIC
${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
)
target_link_options(${BOARD_TARGET} PUBLIC
# linker file
"LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endif () # BOARD_TARGET
endfunction()
#------------------------------------
@ -75,6 +82,9 @@ endif () # BOARD_TARGET
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
@ -95,7 +105,7 @@ function(family_configure_example TARGET)
family_add_tinyusb(${TARGET} OPT_MCU_MCXN9)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})

2
hw/bsp/nrf/boards/pca10056/board.cmake
View File

@ -1,5 +1,5 @@
set(MCU_VARIANT nrf52840)
set(LD_FILE_GCC ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC

2
hw/bsp/nrf/boards/pca10095/board.cmake
View File

@ -1,5 +1,5 @@
set(MCU_VARIANT nrf5340_application)
set(LD_FILE_GCC ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC

99
hw/bsp/nrf/family.cmake
View File

@ -10,9 +10,6 @@ set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# enable LTO
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
# toolchain set up
if (MCU_VARIANT STREQUAL "nrf5340_application")
set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
@ -26,54 +23,69 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
set(BOARD_TARGET board_${BOARD})
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
# driver
${NRFX_DIR}/drivers/src/nrfx_power.c
${NRFX_DIR}/drivers/src/nrfx_uarte.c
# mcu
${NRFX_DIR}/mdk/system_${MCU_VARIANT}.c
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
CONFIG_GPIO_AS_PINRESET
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_LIST_DIR}
${NRFX_DIR}
${NRFX_DIR}/mdk
${NRFX_DIR}/hal
${NRFX_DIR}/drivers/include
${NRFX_DIR}/drivers/src
${CMSIS_DIR}/CMSIS/Core/Include
)
update_board(${BOARD_TARGET})
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
# driver
${NRFX_DIR}/drivers/src/nrfx_power.c
${NRFX_DIR}/drivers/src/nrfx_uarte.c
# mcu
${NRFX_DIR}/mdk/system_${MCU_VARIANT}.c
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
CONFIG_GPIO_AS_PINRESET
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${NRFX_DIR}
${NRFX_DIR}/mdk
${NRFX_DIR}/hal
${NRFX_DIR}/drivers/include
${NRFX_DIR}/drivers/src
${CMSIS_DIR}/CMSIS/Core/Include
)
if (NOT DEFINED LD_FILE_${TOOLCHAIN})
set(LD_FILE_GCC ${NRFX_DIR}/mdk/${MCU_VARIANT}_xxaa.ld)
endif ()
update_board(${BOARD_TARGET})
if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
set(LD_FILE_GNU ${NRFX_DIR}/mdk/${MCU_VARIANT}_xxaa.ld)
endif ()
if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
set(STARTUP_FILE_GNU ${NRFX_DIR}/mdk/gcc_startup_${MCU_VARIANT}.S)
endif ()
if (TOOLCHAIN STREQUAL "gcc")
target_sources(${BOARD_TARGET} PUBLIC
${NRFX_DIR}/mdk/gcc_startup_${MCU_VARIANT}.S
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_link_options(${BOARD_TARGET} PUBLIC
# linker file
"LINKER:--script=${LD_FILE_GCC}"
-L${NRFX_DIR}/mdk
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
else ()
# TODO support IAR
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
# linker file
"LINKER:--script=${LD_FILE_GNU}"
-L${NRFX_DIR}/mdk
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endif () # BOARD_TARGET
endfunction()
#------------------------------------
@ -82,6 +94,9 @@ endif () # BOARD_TARGET
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
@ -102,7 +117,7 @@ function(family_configure_example TARGET)
family_add_tinyusb(${TARGET} OPT_MCU_NRF5X)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_jlink(${TARGET})

4
hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
View File

@ -1,10 +1,10 @@
#set(MCU_VARIANT MIMXRT1011)
set(JLINK_DEVICE STM32G0B1RE)
set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/stm32g0b1xx_flash.icf)
set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s)
set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s)
set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_stm32g0b1xx.s)
function(update_board TARGET)

37
hw/bsp/stm32g0/family.cmake
View File

@ -11,8 +11,8 @@ set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# enable LTO
#set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
@ -20,17 +20,21 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS STM32G0 CACHE INTERNAL "")
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target TARGET)
if (NOT TARGET ${TARGET})
add_library(${TARGET} STATIC
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
@ -42,30 +46,31 @@ function(add_board_target TARGET)
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMSIS_5}/CMSIS/Core/Include
${ST_CMSIS}/Include
${ST_HAL_DRIVER}/Inc
)
target_compile_options(${TARGET} PUBLIC
target_compile_options(${BOARD_TARGET} PUBLIC
)
target_compile_definitions(${TARGET} PUBLIC
target_compile_definitions(${BOARD_TARGET} PUBLIC
)
update_board(${TARGET})
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GCC")
target_link_options(${TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GCC}"
cmake_print_variables(CMAKE_C_COMPILER_ID)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
# TODO support IAR
target_link_options(${TARGET} PUBLIC
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()

4
hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
View File

@ -1,10 +1,10 @@
set(MCU_VARIANT stm32g474xx)
set(JLINK_DEVICE stm32g474re)
set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
function(update_board TARGET)

4
hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
View File

@ -1,10 +1,10 @@
set(MCU_VARIANT stm32g474xx)
set(JLINK_DEVICE stm32g474re)
set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
function(update_board TARGET)

97
hw/bsp/stm32g4/family.cmake
View File

@ -11,8 +11,8 @@ set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# enable LTO
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
@ -20,58 +20,60 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS STM32G4 CACHE INTERNAL "")
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# enable LTO if supported
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif ()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
set(BOARD_TARGET board_${BOARD})
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_LIST_DIR}
${CMSIS_5}/CMSIS/Core/Include
${ST_CMSIS}/Include
${ST_HAL_DRIVER}/Inc
)
target_compile_options(${BOARD_TARGET} PUBLIC
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
)
update_board(${BOARD_TARGET})
target_sources(${BOARD_TARGET} PUBLIC
${STARTUP_FILE_${TOOLCHAIN}}
)
if (TOOLCHAIN STREQUAL "gcc")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GCC}"
-nostartfiles
# nanolib
--specs=nosys.specs
--specs=nano.specs
function(add_board_target BOARD_TARGET)
if (NOT TARGET ${BOARD_TARGET})
add_library(${BOARD_TARGET} STATIC
${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
else ()
# TODO support IAR
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMSIS_5}/CMSIS/Core/Include
${ST_CMSIS}/Include
${ST_HAL_DRIVER}/Inc
)
target_compile_options(${BOARD_TARGET} PUBLIC
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
# nanolib
--specs=nosys.specs
--specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endif ()
endif () # BOARD_TARGET
endfunction()
#------------------------------------
@ -80,6 +82,9 @@ endif () # BOARD_TARGET
function(family_configure_example TARGET)
family_configure_common(${TARGET})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
@ -100,7 +105,7 @@ function(family_configure_example TARGET)
family_add_tinyusb(${TARGET} OPT_MCU_STM32G4)
# Link dependencies
target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_flash_stlink(${TARGET})

12
tools/cmake/cpu/cortex-m3.cmake
View File

@ -1,10 +1,16 @@
if (TOOLCHAIN STREQUAL "gcc")
list(APPEND TOOLCHAIN_COMMON_FLAGS
set(TOOLCHAIN_COMMON_FLAGS
-mthumb
-mcpu=cortex-m3
)
set(FREERTOS_PORT GCC_ARM_CM3 CACHE INTERNAL "")
else ()
# TODO support IAR
elseif (TOOLCHAIN STREQUAL "iar")
set(TOOLCHAIN_COMMON_FLAGS
--cpu cortex-m3
)
set(FREERTOS_PORT IAR_ARM_CM3 CACHE INTERNAL "")
endif ()

13
tools/cmake/cpu/cortex-m33.cmake
View File

@ -1,5 +1,5 @@
if (TOOLCHAIN STREQUAL "gcc")
list(APPEND TOOLCHAIN_COMMON_FLAGS
set(TOOLCHAIN_COMMON_FLAGS
-mthumb
-mcpu=cortex-m33
-mfloat-abi=hard
@ -7,6 +7,13 @@ if (TOOLCHAIN STREQUAL "gcc")
)
set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "")
else ()
# TODO support IAR
elseif (TOOLCHAIN STREQUAL "iar")
set(TOOLCHAIN_COMMON_FLAGS
--cpu cortex-m33
--fpu VFPv5-SP
)
set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
endif ()

13
tools/cmake/cpu/cortex-m4.cmake
View File

@ -1,5 +1,5 @@
if (TOOLCHAIN STREQUAL "gcc")
list(APPEND TOOLCHAIN_COMMON_FLAGS
set(TOOLCHAIN_COMMON_FLAGS
-mthumb
-mcpu=cortex-m4
-mfloat-abi=hard
@ -7,6 +7,13 @@ if (TOOLCHAIN STREQUAL "gcc")
)
set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
else ()
# TODO support IAR
elseif (TOOLCHAIN STREQUAL "iar")
set(TOOLCHAIN_COMMON_FLAGS
--cpu cortex-m4
--fpu VFPv4
)
set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
endif ()

13
tools/cmake/cpu/cortex-m7.cmake
View File

@ -1,5 +1,5 @@
if (TOOLCHAIN STREQUAL "gcc")
list(APPEND TOOLCHAIN_COMMON_FLAGS
set(TOOLCHAIN_COMMON_FLAGS
-mthumb
-mcpu=cortex-m7
-mfloat-abi=hard
@ -7,6 +7,13 @@ if (TOOLCHAIN STREQUAL "gcc")
)
set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "")
else ()
# TODO support IAR
elseif (TOOLCHAIN STREQUAL "iar")
set(TOOLCHAIN_COMMON_FLAGS
--cpu cortex-m7
--fpu VFPv5_D16
)
set(FREERTOS_PORT IAR_ARM_CM7 CACHE INTERNAL "")
endif ()