- add xfer_complete_isr()
- merge addr0 ep to pool - add control status to xact in/out - use atomic flag busy to ensure only 1 transfer is active at any time - execute pending transfer after one is complete (or clear busy flag) - change rtt mode to block if full
This commit is contained in:
hathach
parent
84df3b04db
commit
b31924e13e
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@ -216,6 +216,7 @@ function(family_configure_common TARGET RTOS)
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if (NOT TARGET segger_rtt)
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add_library(segger_rtt STATIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c)
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target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
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target_compile_definitions(segger_rtt PUBLIC SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL)
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endif()
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target_link_libraries(${TARGET} PUBLIC segger_rtt)
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endif ()
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@ -195,9 +195,7 @@ typedef struct {
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uint8_t hxfr;
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volatile uint16_t frame_count;
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max3421_ep_t ep0_addr0; // control endpoint for addr0
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max3421_ep_t ep[CFG_TUH_MAX3421_ENDPOINT_TOTAL];
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max3421_ep_t ep[CFG_TUH_MAX3421_ENDPOINT_TOTAL]; // [0] is reserved for addr0
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OSAL_MUTEX_DEF(spi_mutexdef);
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#if OSAL_MUTEX_REQUIRED
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@ -328,7 +326,7 @@ static inline void sndbc_write(uint8_t rhport, uint8_t data, bool in_isr) {
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//--------------------------------------------------------------------+
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static max3421_ep_t* find_ep_not_addr0(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
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for(size_t i=0; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
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for(size_t i=1; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
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max3421_ep_t* ep = &_hcd_data.ep[i];
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// for control endpoint, skip direction check
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if (daddr == ep->daddr && ep_num == ep->ep_num && (ep_dir == ep->ep_dir || ep_num == 0)) {
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@ -344,9 +342,17 @@ TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * allocate_ep(void) {
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return find_ep_not_addr0(0, 0, 0);
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}
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TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * find_opened_ep(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
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if (daddr == 0 && ep_num == 0) {
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return &_hcd_data.ep[0];
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}else{
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return find_ep_not_addr0(daddr, ep_num, ep_dir);
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}
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}
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// free all endpoints belong to device address
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static void free_ep(uint8_t daddr) {
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for (size_t i=0; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
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for (size_t i=1; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
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max3421_ep_t* ep = &_hcd_data.ep[i];
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if (ep->daddr == daddr) {
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tu_memclr(ep, sizeof(max3421_ep_t));
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@ -354,16 +360,8 @@ static void free_ep(uint8_t daddr) {
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * find_opened_ep(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
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if (daddr == 0 && ep_num == 0) {
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return &_hcd_data.ep0_addr0;
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}else{
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return find_ep_not_addr0(daddr, ep_num, ep_dir);
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}
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}
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static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) {
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size_t idx = cur_ep - _hcd_data.ep;
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size_t const idx = cur_ep - _hcd_data.ep;
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// starting from next endpoint
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for (size_t i = idx + 1; i < CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
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@ -553,7 +551,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * e
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max3421_ep_t * ep;
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if (daddr == 0 && ep_num == 0) {
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ep = &_hcd_data.ep0_addr0;
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ep = &_hcd_data.ep[0];
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}else {
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ep = allocate_ep();
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TU_ASSERT(ep);
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@ -581,12 +579,20 @@ void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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reg_write(rhport, HCTL_ADDR, hctl, in_isr);
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}
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uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
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TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ, );
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fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
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sndbc_write(rhport, xact_len, in_isr);
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uint8_t hxfr = ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0);
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if (ep->ep_num == 0 && (ep->buf == NULL || ep->total_len == 0)) {
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// Control ZLP status use HS
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hxfr |= HXFR_HS;
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} else {
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uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
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TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
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if (xact_len) {
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fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
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}
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sndbc_write(rhport, xact_len, in_isr);
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}
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uint8_t const hxfr = ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0);
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hxfr_write(rhport, hxfr, in_isr);
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}
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@ -599,7 +605,12 @@ void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
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reg_write(rhport, HCTL_ADDR, hctl, in_isr);
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}
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uint8_t const hxfr = ep->ep_num | (ep->is_iso ? HXFR_ISO : 0);
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uint8_t hxfr = ep->ep_num | (ep->is_iso ? HXFR_ISO : 0);
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if (ep->ep_num == 0 && (ep->buf == NULL || ep->total_len == 0)) {
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// Control ZLP status use HS
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hxfr |= HXFR_HS;
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}
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hxfr_write(rhport, hxfr, in_isr);
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}
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@ -611,24 +622,8 @@ TU_ATTR_ALWAYS_INLINE static inline void xact_inout(uint8_t rhport, max3421_ep_t
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}
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}
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void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t data_toggle) {
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(void) rhport;
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(void) result;
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ep->xfer_pending = 0;
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ep->data_toggle = data_toggle;
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//uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
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//hcd_event_xfer_complete(rhport, ep_addr, ep->xferred_len, result, true);
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// max3421_ep_t *next_ep = find_next_pending_ep(ep);
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// if (next_ep) {
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// xact_inout(rhport, next_ep, true, true);
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// }
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}
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// Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
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bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
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(void) rhport;
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uint8_t const ep_num = tu_edpt_number(ep_addr);
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uint8_t const ep_dir = tu_edpt_dir(ep_addr);
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@ -644,24 +639,12 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
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ep->xfer_complete = 0;
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ep->xfer_pending = 1;
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if ( ep_num == 0 ) {
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ep->data_toggle = 1;
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}
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// carry out transfer if not busy
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// if ( atomic_flag_test_and_set(&_hcd_data.busy) )
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{
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uint8_t hxfr = ep_num;
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if ( ep_num == 0 ) {
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ep->data_toggle = 1;
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if ( buffer == NULL || buflen == 0 ) {
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// ZLP for ACK stage, use HS
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peraddr_write(rhport, daddr, false);
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hxfr |= HXFR_HS;
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hxfr |= (ep_dir ? 0 : HXFR_OUT_NIN);
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hxfr_write(rhport, hxfr, false);
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return true;
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}
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}
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if ( !atomic_flag_test_and_set(&_hcd_data.busy) ) {
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xact_inout(rhport, ep, true, false);
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}
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@ -683,6 +666,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]
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(void) rhport;
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max3421_ep_t* ep = find_opened_ep(daddr, 0, 0);
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TU_ASSERT(ep);
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ep->ep_dir = 0;
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ep->total_len = 8;
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ep->xferred_len = 0;
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@ -703,6 +688,26 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
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return false;
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}
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//--------------------------------------------------------------------+
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// Interrupt Handler
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//--------------------------------------------------------------------+
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static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t data_toggle) {
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uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
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ep->data_toggle = data_toggle;
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ep->xfer_pending = 0;
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hcd_event_xfer_complete(ep->daddr, ep_addr, ep->xferred_len, result, true);
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// Find next pending endpoint
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max3421_ep_t *next_ep = find_next_pending_ep(ep);
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if (next_ep) {
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xact_inout(rhport, next_ep, true, true);
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}else {
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// no more pending
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atomic_flag_clear(&_hcd_data.busy);
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}
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}
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static void handle_xfer_done(uint8_t rhport) {
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uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, true);
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uint8_t const hresult = hrsl & HRSL_RESULT_MASK;
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@ -739,7 +744,7 @@ static void handle_xfer_done(uint8_t rhport) {
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max3421_ep_t *next_ep = find_next_pending_ep(ep);
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if (ep == next_ep) {
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// only one pending, retry immediately
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// this endpoint is only one pending, retry immediately
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hxfr_write(rhport, _hcd_data.hxfr, true);
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}else if (next_ep) {
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// switch to next pending TODO could have issue with double buffered if not clear previously out data
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@ -763,7 +768,6 @@ static void handle_xfer_done(uint8_t rhport) {
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if ( ep->xfer_complete ) {
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uint8_t const dt = (hrsl & HRSL_RCVTOGRD) ? 1 : 0; // save data toggle
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xfer_complete_isr(rhport, ep, xfer_result, dt);
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hcd_event_xfer_complete(_hcd_data.peraddr, TUSB_DIR_IN_MASK | ep_num, ep->xferred_len, xfer_result, true);
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}else {
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// more to transfer
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hxfr_write(rhport, _hcd_data.hxfr, true);
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@ -786,8 +790,8 @@ static void handle_xfer_done(uint8_t rhport) {
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if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) {
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uint8_t const dt = (hrsl & HRSL_SNDTOGRD) ? 1 : 0; // save data toggle
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xfer_complete_isr(rhport, ep, xfer_result, dt);
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hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
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} else {
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// more to transfer
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xact_out(rhport, ep, false, true);
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}
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}
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