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update s3 devkitm with max3421 pin following metro s3, check max3421 version to make sure it is valid

This commit is contained in:
hathach 2023-10-27 17:40:53 +07:00
parent a2390802f8
commit 9cba9a753b
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3 changed files with 7 additions and 6 deletions
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2
.idea/cmake.xml
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@ -16,7 +16,7 @@
</envs> </envs>
</ADDITIONAL_GENERATION_ENVIRONMENT> </ADDITIONAL_GENERATION_ENVIRONMENT>
</configuration> </configuration>
<configuration PROFILE_NAME="esp32s3" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_s3_devkitm"> <configuration PROFILE_NAME="espressif_s3_devkitm" ENABLED="true" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_s3_devkitm -DMAX3421_HOST=1 -DLOG=2">
<ADDITIONAL_GENERATION_ENVIRONMENT> <ADDITIONAL_GENERATION_ENVIRONMENT>
<envs> <envs>
<env name="ESPBAUD" value="1500000" /> <env name="ESPBAUD" value="1500000" />

6
hw/bsp/espressif/boards/espressif_s3_devkitm/board.h
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@ -38,9 +38,9 @@
// SPI for USB host shield // SPI for USB host shield
#define MAX3421_SPI_HOST SPI2_HOST #define MAX3421_SPI_HOST SPI2_HOST
#define MAX3421_SCK_PIN 36 #define MAX3421_SCK_PIN 39
#define MAX3421_MOSI_PIN 35 #define MAX3421_MOSI_PIN 42
#define MAX3421_MISO_PIN 37 #define MAX3421_MISO_PIN 21
#define MAX3421_CS_PIN 15 #define MAX3421_CS_PIN 15
#define MAX3421_INTR_PIN 14 #define MAX3421_INTR_PIN 14

5
src/portable/analog/max3421/hcd_max3421.c
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@ -433,8 +433,9 @@ bool hcd_init(uint8_t rhport) {
reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false); reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false);
// V1 is 0x01, V2 is 0x12, V3 is 0x13 // V1 is 0x01, V2 is 0x12, V3 is 0x13
// uint8_t const revision = reg_read(rhport, REVISION_ADDR, false); uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
// TU_LOG2_HEX(revision); TU_ASSERT(revision == 0x01 || revision == 0x12 || revision == 0x13, false);
TU_LOG2_HEX(revision);
// reset // reset
reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false); reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false);