Merge pull request #1931 from branalba/master
For STM32H7 BSP boards, initialize RCC_...TypeDef structs as empty
This commit is contained in:
commit
990fb6ae5c
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@ -57,9 +57,9 @@
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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static inline void board_stm32h7_clock_init(void)
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static inline void board_stm32h7_clock_init(void)
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{
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
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/*!< Supply configuration update enable */
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/*!< Supply configuration update enable */
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/* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */
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/* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */
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@ -64,8 +64,8 @@
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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static inline void board_stm32h7_clock_init(void)
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static inline void board_stm32h7_clock_init(void)
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{
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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/* The PWR block is always enabled on the H7 series- there is no clock
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/* The PWR block is always enabled on the H7 series- there is no clock
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enable. For now, use the default VOS3 scale mode (lowest) and limit clock
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enable. For now, use the default VOS3 scale mode (lowest) and limit clock
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@ -111,7 +111,7 @@ static inline void board_stm32h7_clock_init(void)
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separate. However, the main system PLL (PLL1) doesn't have a direct
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separate. However, the main system PLL (PLL1) doesn't have a direct
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connection to the USB peripheral clock to generate 48 MHz, so we do this
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connection to the USB peripheral clock to generate 48 MHz, so we do this
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dance. This will connect PLL1's Q output to the USB peripheral clock. */
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dance. This will connect PLL1's Q output to the USB peripheral clock. */
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct;
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
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RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
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@ -63,9 +63,9 @@
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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static inline void board_stm32h7_clock_init(void)
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static inline void board_stm32h7_clock_init(void)
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{
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
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/*!< Supply configuration update enable */
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/*!< Supply configuration update enable */
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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@ -55,8 +55,8 @@
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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static inline void board_stm32h7_clock_init(void)
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static inline void board_stm32h7_clock_init(void)
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{
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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/* The PWR block is always enabled on the H7 series- there is no clock
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/* The PWR block is always enabled on the H7 series- there is no clock
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enable. For now, use the default VOS3 scale mode (lowest) and limit clock
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enable. For now, use the default VOS3 scale mode (lowest) and limit clock
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@ -102,7 +102,7 @@ static inline void board_stm32h7_clock_init(void)
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separate. However, the main system PLL (PLL1) doesn't have a direct
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separate. However, the main system PLL (PLL1) doesn't have a direct
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connection to the USB peripheral clock to generate 48 MHz, so we do this
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connection to the USB peripheral clock to generate 48 MHz, so we do this
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dance. This will connect PLL1's Q output to the USB peripheral clock. */
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dance. This will connect PLL1's Q output to the USB peripheral clock. */
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct;
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
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RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
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@ -57,9 +57,9 @@
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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static inline void board_stm32h7_clock_init(void)
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static inline void board_stm32h7_clock_init(void)
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{
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
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/*!< Supply configuration update enable */
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/*!< Supply configuration update enable */
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/* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */
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/* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */
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