rename HCD_MAX_XFER to CFG_TUH_ENDPOINT_MAX

minor clean up
This commit is contained in:
hathach 2022-03-04 17:07:04 +07:00
parent eb6b5d1219
commit 96165a1950
7 changed files with 32 additions and 26 deletions

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@ -35,6 +35,19 @@
extern "C" { extern "C" {
#endif #endif
//--------------------------------------------------------------------+
// Configuration
//--------------------------------------------------------------------+
#ifndef CFG_TUH_ENDPOINT_MAX
#define CFG_TUH_ENDPOINT_MAX (CFG_TUH_DEVICE_MAX*(CFG_TUH_HUB + CFG_TUH_HID*2 + CFG_TUH_MSC*2 + CFG_TUH_CDC*3))
// #ifdef TUP_HCD_ENDPOINT_MAX
// #define CFG_TUH_ENDPPOINT_MAX TUP_HCD_ENDPOINT_MAX
// #else
// #define
// #endif
#endif
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF // MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@ -81,17 +94,6 @@ typedef struct
} hcd_event_t; } hcd_event_t;
#if CFG_TUH_ENABLED
// Max number of endpoints per device
enum {
// TODO better computation
HCD_MAX_ENDPOINT = CFG_TUH_DEVICE_MAX*(CFG_TUH_HUB + CFG_TUH_HID*2 + CFG_TUH_MSC*2 + CFG_TUH_CDC*3),
HCD_MAX_XFER = HCD_MAX_ENDPOINT*2,
};
//#define HCD_MAX_ENDPOINT 16
//#define HCD_MAX_XFER 16
typedef struct { typedef struct {
uint8_t rhport; uint8_t rhport;
uint8_t hub_addr; uint8_t hub_addr;
@ -99,8 +101,6 @@ typedef struct {
uint8_t speed; uint8_t speed;
} hcd_devtree_info_t; } hcd_devtree_info_t;
#endif
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// Controller API // Controller API
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+

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@ -54,7 +54,7 @@ static inline hub_interface_t* get_itf(uint8_t dev_addr)
return &hub_data[dev_addr-1-CFG_TUH_DEVICE_MAX]; return &hub_data[dev_addr-1-CFG_TUH_DEVICE_MAX];
} }
#if CFG_TUSB_DEBUG #if CFG_TUSB_DEBUG >= 2
static char const* const _hub_feature_str[] = static char const* const _hub_feature_str[] =
{ {
[HUB_FEATURE_PORT_CONNECTION ] = "PORT_CONNECTION", [HUB_FEATURE_PORT_CONNECTION ] = "PORT_CONNECTION",

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@ -58,6 +58,8 @@
#define FRAMELIST_SIZE (1024 >> FRAMELIST_SIZE_BIT_VALUE) #define FRAMELIST_SIZE (1024 >> FRAMELIST_SIZE_BIT_VALUE)
#define HCD_MAX_XFER CFG_TUH_ENDPOINT_MAX
typedef struct typedef struct
{ {
ehci_link_t period_framelist[FRAMELIST_SIZE]; ehci_link_t period_framelist[FRAMELIST_SIZE];
@ -73,7 +75,7 @@ typedef struct
ehci_qtd_t qtd; ehci_qtd_t qtd;
}control[CFG_TUH_DEVICE_MAX+CFG_TUH_HUB+1]; }control[CFG_TUH_DEVICE_MAX+CFG_TUH_HUB+1];
ehci_qhd_t qhd_pool[HCD_MAX_ENDPOINT]; ehci_qhd_t qhd_pool[CFG_TUH_ENDPOINT_MAX];
ehci_qtd_t qtd_pool[HCD_MAX_XFER] TU_ATTR_ALIGNED(32); ehci_qtd_t qtd_pool[HCD_MAX_XFER] TU_ATTR_ALIGNED(32);
ehci_registers_t* regs; ehci_registers_t* regs;
@ -189,6 +191,7 @@ static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr)
prev = list_next(prev) ) prev = list_next(prev) )
{ {
// TODO check type for ISO iTD and siTD // TODO check type for ISO iTD and siTD
// TODO Suppress cast-align warning
#pragma GCC diagnostic push #pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wcast-align" #pragma GCC diagnostic ignored "-Wcast-align"
ehci_qhd_t* qhd = (ehci_qhd_t*) list_next(prev); ehci_qhd_t* qhd = (ehci_qhd_t*) list_next(prev);
@ -477,7 +480,7 @@ static void async_advance_isr(uint8_t rhport)
(void) rhport; (void) rhport;
ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; ehci_qhd_t* qhd_pool = ehci_data.qhd_pool;
for(uint32_t i = 0; i < HCD_MAX_ENDPOINT; i++) for(uint32_t i = 0; i < CFG_TUH_ENDPOINT_MAX; i++)
{ {
if ( qhd_pool[i].removing ) if ( qhd_pool[i].removing )
{ {
@ -545,7 +548,7 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint32_t interval_ms)
// TODO abstract max loop guard for period // TODO abstract max loop guard for period
while( !next_item.terminate && while( !next_item.terminate &&
!(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) && !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) &&
max_loop < (HCD_MAX_ENDPOINT + EHCI_MAX_ITD + EHCI_MAX_SITD)*CFG_TUH_DEVICE_MAX) max_loop < (CFG_TUH_ENDPOINT_MAX + EHCI_MAX_ITD + EHCI_MAX_SITD)*CFG_TUH_DEVICE_MAX)
{ {
switch ( next_item.type ) switch ( next_item.type )
{ {
@ -717,7 +720,7 @@ void hcd_int_handler(uint8_t rhport)
//------------- queue head helper -------------// //------------- queue head helper -------------//
static inline ehci_qhd_t* qhd_find_free (void) static inline ehci_qhd_t* qhd_find_free (void)
{ {
for (uint32_t i=0; i<HCD_MAX_ENDPOINT; i++) for (uint32_t i=0; i<CFG_TUH_ENDPOINT_MAX; i++)
{ {
if ( !ehci_data.qhd_pool[i].used ) return &ehci_data.qhd_pool[i]; if ( !ehci_data.qhd_pool[i].used ) return &ehci_data.qhd_pool[i];
} }
@ -734,7 +737,7 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
{ {
ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; ehci_qhd_t* qhd_pool = ehci_data.qhd_pool;
for(uint32_t i=0; i<HCD_MAX_ENDPOINT; i++) for(uint32_t i=0; i<CFG_TUH_ENDPOINT_MAX; i++)
{ {
if ( (qhd_pool[i].dev_addr == dev_addr) && if ( (qhd_pool[i].dev_addr == dev_addr) &&
ep_addr == tu_edpt_addr(qhd_pool[i].ep_number, qhd_pool[i].pid) ) ep_addr == tu_edpt_addr(qhd_pool[i].ep_number, qhd_pool[i].pid) )

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@ -125,7 +125,7 @@ typedef struct
uint16_t bda[2*2]; uint16_t bda[2*2];
}; };
endpoint_state_t endpoint[2]; endpoint_state_t endpoint[2];
pipe_state_t pipe[HCD_MAX_XFER * 2]; pipe_state_t pipe[CFG_TUH_ENDPOINT_MAX * 2];
uint32_t in_progress; /* Bitmap. Each bit indicates that a transfer of the corresponding pipe is in progress */ uint32_t in_progress; /* Bitmap. Each bit indicates that a transfer of the corresponding pipe is in progress */
uint32_t pending; /* Bitmap. Each bit indicates that a transfer of the corresponding pipe will be resume the next frame */ uint32_t pending; /* Bitmap. Each bit indicates that a transfer of the corresponding pipe will be resume the next frame */
bool need_reset; /* The device has not been reset after connection. */ bool need_reset; /* The device has not been reset after connection. */
@ -142,7 +142,7 @@ int find_pipe(uint8_t dev_addr, uint8_t ep_addr)
{ {
/* Find the target pipe */ /* Find the target pipe */
int num; int num;
for (num = 0; num < HCD_MAX_XFER * 2; ++num) { for (num = 0; num < CFG_TUH_ENDPOINT_MAX * 2; ++num) {
pipe_state_t *p = &_hcd.pipe[num]; pipe_state_t *p = &_hcd.pipe[num];
if ((p->dev_addr == dev_addr) && (p->ep_addr == ep_addr)) if ((p->dev_addr == dev_addr) && (p->ep_addr == ep_addr))
return num; return num;
@ -463,7 +463,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
const unsigned ie = NVIC_GetEnableIRQ(USB0_IRQn); const unsigned ie = NVIC_GetEnableIRQ(USB0_IRQn);
NVIC_DisableIRQ(USB0_IRQn); NVIC_DisableIRQ(USB0_IRQn);
pipe_state_t *p = &_hcd.pipe[0]; pipe_state_t *p = &_hcd.pipe[0];
pipe_state_t *end = &_hcd.pipe[HCD_MAX_XFER * 2]; pipe_state_t *end = &_hcd.pipe[CFG_TUH_ENDPOINT_MAX * 2];
for (;p != end; ++p) { for (;p != end; ++p) {
if (p->dev_addr == dev_addr) if (p->dev_addr == dev_addr)
tu_memclr(p, sizeof(*p)); tu_memclr(p, sizeof(*p));
@ -511,7 +511,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
// TU_LOG1("O %u %x\n", dev_addr, ep_addr); // TU_LOG1("O %u %x\n", dev_addr, ep_addr);
/* Find a free pipe */ /* Find a free pipe */
pipe_state_t *p = &_hcd.pipe[0]; pipe_state_t *p = &_hcd.pipe[0];
pipe_state_t *end = &_hcd.pipe[HCD_MAX_XFER * 2]; pipe_state_t *end = &_hcd.pipe[CFG_TUH_ENDPOINT_MAX * 2];
if (dev_addr || ep_addr) { if (dev_addr || ep_addr) {
p += 2; p += 2;
for (; p < end && (p->dev_addr || p->ep_addr); ++p) ; for (; p < end && (p->dev_addr || p->ep_addr); ++p) ;

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@ -313,7 +313,7 @@ static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
ohci_ed_t* ed_pool = ohci_data.ed_pool; ohci_ed_t* ed_pool = ohci_data.ed_pool;
for(uint32_t i=0; i<HCD_MAX_ENDPOINT; i++) for(uint32_t i=0; i<CFG_TUH_ENDPOINT_MAX; i++)
{ {
if ( (ed_pool[i].dev_addr == dev_addr) && if ( (ed_pool[i].dev_addr == dev_addr) &&
ep_addr == tu_edpt_addr(ed_pool[i].ep_number, ed_pool[i].pid == PID_IN) ) ep_addr == tu_edpt_addr(ed_pool[i].ep_number, ed_pool[i].pid == PID_IN) )
@ -329,7 +329,7 @@ static ohci_ed_t * ed_find_free(void)
{ {
ohci_ed_t* ed_pool = ohci_data.ed_pool; ohci_ed_t* ed_pool = ohci_data.ed_pool;
for(uint8_t i = 0; i < HCD_MAX_ENDPOINT; i++) for(uint8_t i = 0; i < CFG_TUH_ENDPOINT_MAX; i++)
{ {
if ( !ed_pool[i].used ) return &ed_pool[i]; if ( !ed_pool[i].used ) return &ed_pool[i];
} }

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@ -42,6 +42,8 @@ enum {
OHCI_MAX_ITD = 4 OHCI_MAX_ITD = 4
}; };
#define HCD_MAX_XFER CFG_TUH_ENDPOINT_MAX
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// OHCI Data Structure // OHCI Data Structure
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@ -162,7 +164,7 @@ typedef struct TU_ATTR_ALIGNED(256)
}control[CFG_TUH_DEVICE_MAX+CFG_TUH_HUB+1]; }control[CFG_TUH_DEVICE_MAX+CFG_TUH_HUB+1];
// ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32 // ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32
ohci_ed_t ed_pool[HCD_MAX_ENDPOINT]; ohci_ed_t ed_pool[CFG_TUH_ENDPOINT_MAX];
ohci_gtd_t gtd_pool[HCD_MAX_XFER]; ohci_gtd_t gtd_pool[HCD_MAX_XFER];
volatile uint16_t frame_number_hi; volatile uint16_t frame_number_hi;

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@ -58,6 +58,7 @@ void rp2040_usb_init(void)
unreset_block_wait(RESETS_RESET_USBCTRL_BITS); unreset_block_wait(RESETS_RESET_USBCTRL_BITS);
// Clear any previous state just in case // Clear any previous state just in case
// TODO Suppress warning array-bounds with gcc11
#pragma GCC diagnostic push #pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Warray-bounds" #pragma GCC diagnostic ignored "-Warray-bounds"
memset(usb_hw, 0, sizeof(*usb_hw)); memset(usb_hw, 0, sizeof(*usb_hw));