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update rt1024 evk

This commit is contained in:
hathach 2023-11-16 18:23:48 +07:00
parent 794dbf923a
commit 882da9944d
No known key found for this signature in database
GPG Key ID: F5D50C6D51D17CBA
4 changed files with 965 additions and 11 deletions
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1
hw/bsp/imxrt/boards/mimxrt1024_evk/board.h
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@ -46,6 +46,7 @@
// UART - DRN verified
#define UART_PORT LPUART1
#define UART_CLK_ROOT BOARD_BOOTCLOCKRUN_UART_CLK_ROOT
#define UART_RX_PINMUX IOMUXC_GPIO_AD_B0_07_LPUART1_RX
#define UART_TX_PINMUX IOMUXC_GPIO_AD_B0_06_LPUART1_TX

490
hw/bsp/imxrt/boards/mimxrt1024_evk/board/pin_mux.c Normal file
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@ -0,0 +1,490 @@
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v13.1
processor: MIMXRT1024xxxxx
package_id: MIMXRT1024DAG5A
mcu_data: ksdk2_0
processor_version: 13.0.2
board: MIMXRT1024-EVK
pin_labels:
- {pin_num: '52', pin_signal: WAKEUP, label: USER_BUTTON, identifier: USER_BUTTON}
- {pin_num: '82', pin_signal: GPIO_AD_B1_08, label: 'UART_TX/USER_LED/J17[4]', identifier: USER_LED}
power_domains: {NVCC_GPIO: '3.3'}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
#include "fsl_common.h"
#include "fsl_iomuxc.h"
#include "fsl_gpio.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBootPins
* Description : Calls initialization functions.
*
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void) {
BOARD_InitPins();
BOARD_InitDEBUG_UARTPins();
/* GPIO_AD_B1_00~GPIO_AD_B1_05 can only be configured as flexspi function. Note that it can't be modified here */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_FLEXSPI_A_DATA03,1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_FLEXSPI_A_SCLK,1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_FLEXSPI_A_DATA00,1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_FLEXSPI_A_DATA02,1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_FLEXSPI_A_DATA01,1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_FLEXSPI_A_SS0_B,1U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '52', peripheral: GPIO5, signal: 'gpio_io, 00', pin_signal: WAKEUP, direction: INPUT}
- {pin_num: '82', peripheral: GPIO1, signal: 'gpio_io, 24', pin_signal: GPIO_AD_B1_08, direction: OUTPUT}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
CLOCK_EnableClock(kCLOCK_IomuxcSnvs); /* iomuxc_snvs clock (iomuxc_snvs_clk_enable): 0x03U */
/* GPIO configuration of USER_LED on GPIO_AD_B1_08 (pin 82) */
gpio_pin_config_t USER_LED_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
/* Initialize GPIO functionality on GPIO_AD_B1_08 (pin 82) */
GPIO_PinInit(GPIO1, 24U, &USER_LED_config);
/* GPIO configuration of USER_BUTTON on WAKEUP (pin 52) */
gpio_pin_config_t USER_BUTTON_config = {
.direction = kGPIO_DigitalInput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
/* Initialize GPIO functionality on WAKEUP (pin 52) */
GPIO_PinInit(GPIO5, 0U, &USER_BUTTON_config);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_08_GPIO1_IO24, /* GPIO_AD_B1_08 is configured as GPIO1_IO24 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_SNVS_WAKEUP_GPIO5_IO00, /* WAKEUP is configured as GPIO5_IO00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitDEBUG_UARTPins:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '101', peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_07}
- {pin_num: '105', peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_06}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitDEBUG_UARTPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitDEBUG_UARTPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_06_LPUART1_TX, /* GPIO_AD_B0_06 is configured as LPUART1_TX */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_07_LPUART1_RX, /* GPIO_AD_B0_07 is configured as LPUART1_RX */
0U); /* Software Input On Field: Input Path is determined by functionality */
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitSDRAMPins:
- options: {coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '142', peripheral: SEMC, signal: 'ADDR, 00', pin_signal: GPIO_EMC_16}
- {pin_num: '141', peripheral: SEMC, signal: 'ADDR, 01', pin_signal: GPIO_EMC_17}
- {pin_num: '140', peripheral: SEMC, signal: 'ADDR, 02', pin_signal: GPIO_EMC_18}
- {pin_num: '139', peripheral: SEMC, signal: 'ADDR, 03', pin_signal: GPIO_EMC_19}
- {pin_num: '138', peripheral: SEMC, signal: 'ADDR, 04', pin_signal: GPIO_EMC_20}
- {pin_num: '136', peripheral: SEMC, signal: 'ADDR, 06', pin_signal: GPIO_EMC_22}
- {pin_num: '137', peripheral: SEMC, signal: 'ADDR, 05', pin_signal: GPIO_EMC_21}
- {pin_num: '133', peripheral: SEMC, signal: 'ADDR, 07', pin_signal: GPIO_EMC_23}
- {pin_num: '132', peripheral: SEMC, signal: 'ADDR, 08', pin_signal: GPIO_EMC_24}
- {pin_num: '131', peripheral: SEMC, signal: 'ADDR, 09', pin_signal: GPIO_EMC_25}
- {pin_num: '143', peripheral: SEMC, signal: 'ADDR, 10', pin_signal: GPIO_EMC_15}
- {pin_num: '130', peripheral: SEMC, signal: 'ADDR, 11', pin_signal: GPIO_EMC_26}
- {pin_num: '129', peripheral: SEMC, signal: 'ADDR, 12', pin_signal: GPIO_EMC_27}
- {pin_num: '2', peripheral: SEMC, signal: 'BA, 0', pin_signal: GPIO_EMC_13}
- {pin_num: '1', peripheral: SEMC, signal: 'BA, 1', pin_signal: GPIO_EMC_14}
- {pin_num: '7', peripheral: SEMC, signal: semc_cas, pin_signal: GPIO_EMC_10}
- {pin_num: '127', peripheral: SEMC, signal: semc_cke, pin_signal: GPIO_EMC_29}
- {pin_num: '126', peripheral: SEMC, signal: semc_clk, pin_signal: GPIO_EMC_30}
- {pin_num: '3', peripheral: SEMC, signal: 'CS, 0', pin_signal: GPIO_EMC_12}
- {pin_num: '8', peripheral: SEMC, signal: semc_we, pin_signal: GPIO_EMC_09}
- {pin_num: '4', peripheral: SEMC, signal: semc_ras, pin_signal: GPIO_EMC_11}
- {pin_num: '128', peripheral: SEMC, signal: semc_dqs, pin_signal: GPIO_EMC_28}
- {pin_num: '125', peripheral: SEMC, signal: 'DM, 1', pin_signal: GPIO_EMC_31}
- {pin_num: '9', peripheral: SEMC, signal: 'DM, 0', pin_signal: GPIO_EMC_08}
- {pin_num: '117', peripheral: SEMC, signal: 'DATA, 15', pin_signal: GPIO_EMC_39}
- {pin_num: '118', peripheral: SEMC, signal: 'DATA, 14', pin_signal: GPIO_EMC_38}
- {pin_num: '119', peripheral: SEMC, signal: 'DATA, 13', pin_signal: GPIO_EMC_37}
- {pin_num: '120', peripheral: SEMC, signal: 'DATA, 12', pin_signal: GPIO_EMC_36}
- {pin_num: '122', peripheral: SEMC, signal: 'DATA, 10', pin_signal: GPIO_EMC_34}
- {pin_num: '121', peripheral: SEMC, signal: 'DATA, 11', pin_signal: GPIO_EMC_35}
- {pin_num: '123', peripheral: SEMC, signal: 'DATA, 09', pin_signal: GPIO_EMC_33}
- {pin_num: '124', peripheral: SEMC, signal: 'DATA, 08', pin_signal: GPIO_EMC_32}
- {pin_num: '10', peripheral: SEMC, signal: 'DATA, 07', pin_signal: GPIO_EMC_07}
- {pin_num: '12', peripheral: SEMC, signal: 'DATA, 06', pin_signal: GPIO_EMC_06}
- {pin_num: '13', peripheral: SEMC, signal: 'DATA, 05', pin_signal: GPIO_EMC_05}
- {pin_num: '14', peripheral: SEMC, signal: 'DATA, 04', pin_signal: GPIO_EMC_04}
- {pin_num: '15', peripheral: SEMC, signal: 'DATA, 03', pin_signal: GPIO_EMC_03}
- {pin_num: '16', peripheral: SEMC, signal: 'DATA, 02', pin_signal: GPIO_EMC_02}
- {pin_num: '17', peripheral: SEMC, signal: 'DATA, 01', pin_signal: GPIO_EMC_01}
- {pin_num: '18', peripheral: SEMC, signal: 'DATA, 00', pin_signal: GPIO_EMC_00}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitSDRAMPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitSDRAMPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 is configured as SEMC_DATA00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_01_SEMC_DATA01, /* GPIO_EMC_01 is configured as SEMC_DATA01 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_02_SEMC_DATA02, /* GPIO_EMC_02 is configured as SEMC_DATA02 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_03_SEMC_DATA03, /* GPIO_EMC_03 is configured as SEMC_DATA03 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_04_SEMC_DATA04, /* GPIO_EMC_04 is configured as SEMC_DATA04 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_05_SEMC_DATA05, /* GPIO_EMC_05 is configured as SEMC_DATA05 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_06_SEMC_DATA06, /* GPIO_EMC_06 is configured as SEMC_DATA06 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_07_SEMC_DATA07, /* GPIO_EMC_07 is configured as SEMC_DATA07 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_08_SEMC_DM00, /* GPIO_EMC_08 is configured as SEMC_DM00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_09_SEMC_WE, /* GPIO_EMC_09 is configured as SEMC_WE */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_10_SEMC_CAS, /* GPIO_EMC_10 is configured as SEMC_CAS */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_11_SEMC_RAS, /* GPIO_EMC_11 is configured as SEMC_RAS */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_12_SEMC_CS0, /* GPIO_EMC_12 is configured as SEMC_CS0 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_13_SEMC_BA0, /* GPIO_EMC_13 is configured as SEMC_BA0 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_14_SEMC_BA1, /* GPIO_EMC_14 is configured as SEMC_BA1 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_15_SEMC_ADDR10, /* GPIO_EMC_15 is configured as SEMC_ADDR10 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_16_SEMC_ADDR00, /* GPIO_EMC_16 is configured as SEMC_ADDR00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_17_SEMC_ADDR01, /* GPIO_EMC_17 is configured as SEMC_ADDR01 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_18_SEMC_ADDR02, /* GPIO_EMC_18 is configured as SEMC_ADDR02 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_19_SEMC_ADDR03, /* GPIO_EMC_19 is configured as SEMC_ADDR03 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_20_SEMC_ADDR04, /* GPIO_EMC_20 is configured as SEMC_ADDR04 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_21_SEMC_ADDR05, /* GPIO_EMC_21 is configured as SEMC_ADDR05 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_22_SEMC_ADDR06, /* GPIO_EMC_22 is configured as SEMC_ADDR06 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_23_SEMC_ADDR07, /* GPIO_EMC_23 is configured as SEMC_ADDR07 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_24_SEMC_ADDR08, /* GPIO_EMC_24 is configured as SEMC_ADDR08 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_25_SEMC_ADDR09, /* GPIO_EMC_25 is configured as SEMC_ADDR09 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_26_SEMC_ADDR11, /* GPIO_EMC_26 is configured as SEMC_ADDR11 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_27_SEMC_ADDR12, /* GPIO_EMC_27 is configured as SEMC_ADDR12 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_28_SEMC_DQS, /* GPIO_EMC_28 is configured as SEMC_DQS */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_29_SEMC_CKE, /* GPIO_EMC_29 is configured as SEMC_CKE */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_30_SEMC_CLK, /* GPIO_EMC_30 is configured as SEMC_CLK */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_31_SEMC_DM01, /* GPIO_EMC_31 is configured as SEMC_DM01 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_32_SEMC_DATA08, /* GPIO_EMC_32 is configured as SEMC_DATA08 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_33_SEMC_DATA09, /* GPIO_EMC_33 is configured as SEMC_DATA09 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_34_SEMC_DATA10, /* GPIO_EMC_34 is configured as SEMC_DATA10 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_35_SEMC_DATA11, /* GPIO_EMC_35 is configured as SEMC_DATA11 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_36_SEMC_DATA12, /* GPIO_EMC_36 is configured as SEMC_DATA12 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_37_SEMC_DATA13, /* GPIO_EMC_37 is configured as SEMC_DATA13 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_38_SEMC_DATA14, /* GPIO_EMC_38 is configured as SEMC_DATA14 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_39_SEMC_DATA15, /* GPIO_EMC_39 is configured as SEMC_DATA15 */
0U); /* Software Input On Field: Input Path is determined by functionality */
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitCANPins:
- options: {coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '32', peripheral: CAN1, signal: RX, pin_signal: GPIO_SD_B1_01}
- {pin_num: '33', peripheral: CAN1, signal: TX, pin_signal: GPIO_SD_B1_00}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitCANPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitCANPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B1_00_FLEXCAN1_TX, /* GPIO_SD_B1_00 is configured as FLEXCAN1_TX */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B1_01_FLEXCAN1_RX, /* GPIO_SD_B1_01 is configured as FLEXCAN1_RX */
0U); /* Software Input On Field: Input Path is determined by functionality */
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitENETPins:
- options: {coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '97', peripheral: ENET, signal: enet_rx_en, pin_signal: GPIO_AD_B0_11}
- {pin_num: '84', peripheral: GPIO1, signal: 'gpio_io, 22', pin_signal: GPIO_AD_B1_06}
- {pin_num: '107', peripheral: GPIO1, signal: 'gpio_io, 04', pin_signal: GPIO_AD_B0_04}
- {pin_num: '100', peripheral: ENET, signal: enet_tx_clk, pin_signal: GPIO_AD_B0_08}
- {pin_num: '95', peripheral: ENET, signal: enet_tx_en, pin_signal: GPIO_AD_B0_13}
- {pin_num: '93', peripheral: ENET, signal: 'enet_tx_data, 1', pin_signal: GPIO_AD_B0_15}
- {pin_num: '94', peripheral: ENET, signal: 'enet_tx_data, 0', pin_signal: GPIO_AD_B0_14}
- {pin_num: '96', peripheral: ENET, signal: enet_rx_er, pin_signal: GPIO_AD_B0_12}
- {pin_num: '99', peripheral: ENET, signal: 'enet_rx_data, 1', pin_signal: GPIO_AD_B0_09}
- {pin_num: '98', peripheral: ENET, signal: 'enet_rx_data, 0', pin_signal: GPIO_AD_B0_10}
- {pin_num: '116', peripheral: ENET, signal: enet_mdio, pin_signal: GPIO_EMC_40}
- {pin_num: '115', peripheral: ENET, signal: enet_mdc, pin_signal: GPIO_EMC_41}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitENETPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitENETPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, /* GPIO_AD_B0_04 is configured as GPIO1_IO04 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_08_ENET_TX_CLK, /* GPIO_AD_B0_08 is configured as ENET_TX_CLK */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, /* GPIO_AD_B0_09 is configured as ENET_RDATA01 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, /* GPIO_AD_B0_10 is configured as ENET_RDATA00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_11_ENET_RX_EN, /* GPIO_AD_B0_11 is configured as ENET_RX_EN */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_12_ENET_RX_ER, /* GPIO_AD_B0_12 is configured as ENET_RX_ER */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_13_ENET_TX_EN, /* GPIO_AD_B0_13 is configured as ENET_TX_EN */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_14_ENET_TDATA00, /* GPIO_AD_B0_14 is configured as ENET_TDATA00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_15_ENET_TDATA01, /* GPIO_AD_B0_15 is configured as ENET_TDATA01 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, /* GPIO_AD_B1_06 is configured as GPIO1_IO22 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_40_ENET_MDIO, /* GPIO_EMC_40 is configured as ENET_MDIO */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_41_ENET_MDC, /* GPIO_EMC_41 is configured as ENET_MDC */
0U); /* Software Input On Field: Input Path is determined by functionality */
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitUSDHCPins:
- options: {coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '45', peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_03}
- {pin_num: '46', peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_02}
- {pin_num: '43', peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_04}
- {pin_num: '42', peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_05}
- {pin_num: '48', peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_00}
- {pin_num: '47', peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_01}
- {pin_num: '41', peripheral: GPIO3, signal: 'gpio_io, 19', pin_signal: GPIO_SD_B0_06}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitUSDHCPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitUSDHCPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B0_00_USDHC1_DATA2, /* GPIO_SD_B0_00 is configured as USDHC1_DATA2 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3, /* GPIO_SD_B0_01 is configured as USDHC1_DATA3 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B0_02_USDHC1_CMD, /* GPIO_SD_B0_02 is configured as USDHC1_CMD */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B0_03_USDHC1_CLK, /* GPIO_SD_B0_03 is configured as USDHC1_CLK */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B0_04_USDHC1_DATA0, /* GPIO_SD_B0_04 is configured as USDHC1_DATA0 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B0_05_USDHC1_DATA1, /* GPIO_SD_B0_05 is configured as USDHC1_DATA1 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B0_06_GPIO3_IO19, /* GPIO_SD_B0_06 is configured as GPIO3_IO19 */
0U); /* Software Input On Field: Input Path is determined by functionality */
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitQSPIPins:
- options: {coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '24', peripheral: FLEXSPI, signal: FLEXSPI_A_SCLK, pin_signal: GPIO_SD_B1_07}
- {pin_num: '23', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA0, pin_signal: GPIO_SD_B1_08}
- {pin_num: '21', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA1, pin_signal: GPIO_SD_B1_10}
- {pin_num: '22', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA2, pin_signal: GPIO_SD_B1_09}
- {pin_num: '25', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA3, pin_signal: GPIO_SD_B1_06}
- {pin_num: '19', peripheral: FLEXSPI, signal: FLEXSPI_A_SS0_B, pin_signal: GPIO_SD_B1_11}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitQSPIPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitQSPIPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B1_06_FLEXSPI_A_DATA03, /* GPIO_SD_B1_06 is configured as FLEXSPI_A_DATA03 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B1_07_FLEXSPI_A_SCLK, /* GPIO_SD_B1_07 is configured as FLEXSPI_A_SCLK */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B1_08_FLEXSPI_A_DATA00, /* GPIO_SD_B1_08 is configured as FLEXSPI_A_DATA00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B1_09_FLEXSPI_A_DATA02, /* GPIO_SD_B1_09 is configured as FLEXSPI_A_DATA02 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B1_10_FLEXSPI_A_DATA01, /* GPIO_SD_B1_10 is configured as FLEXSPI_A_DATA01 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B1_11_FLEXSPI_A_SS0_B, /* GPIO_SD_B1_11 is configured as FLEXSPI_A_SS0_B */
0U); /* Software Input On Field: Input Path is determined by functionality */
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_
/***********************************************************************************************************************
* Definitions
**********************************************************************************************************************/
/* Define the flexspi macro. Note that it can't be modified here */
#define IOMUXC_GPIO_AD_B1_00_FLEXSPI_A_DATA03 0x401F80FCU, 0x1U, 0x401F8374U, 0x1U, 0x401F8270U
#define IOMUXC_GPIO_AD_B1_01_FLEXSPI_A_SCLK 0x401F8100U, 0x1U, 0x401F8378U, 0x1U, 0x401F8274U
#define IOMUXC_GPIO_AD_B1_02_FLEXSPI_A_DATA00 0x401F8104U, 0x1U, 0x401F8368U, 0x1U, 0x401F8278U
#define IOMUXC_GPIO_AD_B1_03_FLEXSPI_A_DATA02 0x401F8108U, 0x1U, 0x401F8370U, 0x1U, 0x401F827CU
#define IOMUXC_GPIO_AD_B1_04_FLEXSPI_A_DATA01 0x401F810CU, 0x1U, 0x401F836CU, 0x1U, 0x401F8280U
#define IOMUXC_GPIO_AD_B1_05_FLEXSPI_A_SS0_B 0x401F8110U, 0x1U, 0, 0, 0x401F8284U
/*! @brief Direction type */
typedef enum _pin_mux_direction
{
kPIN_MUX_DirectionInput = 0U, /* Input direction */
kPIN_MUX_DirectionOutput = 1U, /* Output direction */
kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
} pin_mux_direction_t;
/*!
* @addtogroup pin_mux
* @{
*/
/***********************************************************************************************************************
* API
**********************************************************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @brief Calls initialization functions.
*
*/
void BOARD_InitBootPins(void);
/* WAKEUP (number 52), USER_BUTTON */
#define BOARD_INITPINS_USER_BUTTON_GPIO GPIO5 /*!< GPIO device name: GPIO5 */
#define BOARD_INITPINS_USER_BUTTON_PORT GPIO5 /*!< PORT device name: GPIO5 */
#define BOARD_INITPINS_USER_BUTTON_PIN 0U /*!< GPIO5 pin index: 0 */
/* GPIO_AD_B1_08 (number 82), UART_TX/USER_LED/J17[4] */
#define BOARD_INITPINS_USER_LED_GPIO GPIO1 /*!< GPIO device name: GPIO1 */
#define BOARD_INITPINS_USER_LED_PORT GPIO1 /*!< PORT device name: GPIO1 */
#define BOARD_INITPINS_USER_LED_PIN 24U /*!< GPIO1 pin index: 24 */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins(void);
/* GPIO_AD_B0_07 (number 101), UART1_RXD/J17[8] */
#define BOARD_INITDEBUG_UARTPINS_UART1_RXD_PERIPHERAL LPUART1 /*!< Device name: LPUART1 */
#define BOARD_INITDEBUG_UARTPINS_UART1_RXD_SIGNAL RX /*!< LPUART1 signal: RX */
/* GPIO_AD_B0_06 (number 105), UART1_TXD/J17[12] */
#define BOARD_INITDEBUG_UARTPINS_UART1_TXD_PERIPHERAL LPUART1 /*!< Device name: LPUART1 */
#define BOARD_INITDEBUG_UARTPINS_UART1_TXD_SIGNAL TX /*!< LPUART1 signal: TX */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitDEBUG_UARTPins(void);
/* GPIO_EMC_16 (number 142), SEMC_A0/U14[23]/BOOT_MODE[0] */
#define BOARD_INITSDRAMPINS_SEMC_A0_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A0_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A0_CHANNEL 0U /*!< SEMC ADDR channel: 00 */
/* GPIO_EMC_17 (number 141), SEMC_A1/U14[24]/BOOT_MODE[1] */
#define BOARD_INITSDRAMPINS_SEMC_A1_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A1_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A1_CHANNEL 1U /*!< SEMC ADDR channel: 01 */
/* GPIO_EMC_18 (number 140), SEMC_A2/U14[25]/BT_CFG[0] */
#define BOARD_INITSDRAMPINS_SEMC_A2_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A2_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A2_CHANNEL 2U /*!< SEMC ADDR channel: 02 */
/* GPIO_EMC_19 (number 139), SEMC_A3/U14[26]/BT_CFG[1] */
#define BOARD_INITSDRAMPINS_SEMC_A3_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A3_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A3_CHANNEL 3U /*!< SEMC ADDR channel: 03 */
/* GPIO_EMC_20 (number 138), SEMC_A4/U14[29]/BT_CFG[2] */
#define BOARD_INITSDRAMPINS_SEMC_A4_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A4_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A4_CHANNEL 4U /*!< SEMC ADDR channel: 04 */
/* GPIO_EMC_22 (number 136), SEMC_A6/U14[31]/BT_CFG[4] */
#define BOARD_INITSDRAMPINS_SEMC_A6_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A6_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A6_CHANNEL 6U /*!< SEMC ADDR channel: 06 */
/* GPIO_EMC_21 (number 137), SEMC_A5/U14[30]/BT_CFG[3] */
#define BOARD_INITSDRAMPINS_SEMC_A5_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A5_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A5_CHANNEL 5U /*!< SEMC ADDR channel: 05 */
/* GPIO_EMC_23 (number 133), SEMC_A7/U14[32]/BT_CFG[5] */
#define BOARD_INITSDRAMPINS_SEMC_A7_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A7_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A7_CHANNEL 7U /*!< SEMC ADDR channel: 07 */
/* GPIO_EMC_24 (number 132), SEMC_A8/U14[33]/BT_CFG[6] */
#define BOARD_INITSDRAMPINS_SEMC_A8_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A8_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A8_CHANNEL 8U /*!< SEMC ADDR channel: 08 */
/* GPIO_EMC_25 (number 131), SEMC_A9/U14[34]/BT_CFG[7] */
#define BOARD_INITSDRAMPINS_SEMC_A9_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A9_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A9_CHANNEL 9U /*!< SEMC ADDR channel: 09 */
/* GPIO_EMC_15 (number 143), SEMC_A10/U14[22] */
#define BOARD_INITSDRAMPINS_SEMC_A10_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A10_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A10_CHANNEL 10U /*!< SEMC ADDR channel: 10 */
/* GPIO_EMC_26 (number 130), SEMC_A11/U14[35]/BT_CFG[8] */
#define BOARD_INITSDRAMPINS_SEMC_A11_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A11_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A11_CHANNEL 11U /*!< SEMC ADDR channel: 11 */
/* GPIO_EMC_27 (number 129), SEMC_A12/U14[36]/BT_CFG[9] */
#define BOARD_INITSDRAMPINS_SEMC_A12_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_A12_SIGNAL ADDR /*!< SEMC signal: ADDR */
#define BOARD_INITSDRAMPINS_SEMC_A12_CHANNEL 12U /*!< SEMC ADDR channel: 12 */
/* GPIO_EMC_13 (number 2), SEMC_BA0/U14[20] */
#define BOARD_INITSDRAMPINS_SEMC_BA0_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_BA0_SIGNAL BA /*!< SEMC signal: BA */
#define BOARD_INITSDRAMPINS_SEMC_BA0_CHANNEL 0U /*!< SEMC BA channel: 0 */
/* GPIO_EMC_14 (number 1), SEMC_BA1/U14[21] */
#define BOARD_INITSDRAMPINS_SEMC_BA1_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_BA1_SIGNAL BA /*!< SEMC signal: BA */
#define BOARD_INITSDRAMPINS_SEMC_BA1_CHANNEL 1U /*!< SEMC BA channel: 1 */
/* GPIO_EMC_10 (number 7), SEMC_CAS/U14[17] */
#define BOARD_INITSDRAMPINS_SEMC_CAS_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_CAS_SIGNAL semc_cas /*!< SEMC signal: semc_cas */
/* GPIO_EMC_29 (number 127), SEMC_CKE/U14[37] */
#define BOARD_INITSDRAMPINS_SEMC_CKE_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_CKE_SIGNAL semc_cke /*!< SEMC signal: semc_cke */
/* GPIO_EMC_30 (number 126), SEMC_CLK/U14[38] */
#define BOARD_INITSDRAMPINS_SEMC_CLK_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_CLK_SIGNAL semc_clk /*!< SEMC signal: semc_clk */
/* GPIO_EMC_12 (number 3), SEMC_CS0/U14[19] */
#define BOARD_INITSDRAMPINS_SEMC_CS0_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_CS0_SIGNAL CS /*!< SEMC signal: CS */
#define BOARD_INITSDRAMPINS_SEMC_CS0_CHANNEL 0U /*!< SEMC CS channel: 0 */
/* GPIO_EMC_09 (number 8), SEMC_WE/U14[16] */
#define BOARD_INITSDRAMPINS_SEMC_WE_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_WE_SIGNAL semc_we /*!< SEMC signal: semc_we */
/* GPIO_EMC_11 (number 4), SEMC_RAS/U14[18] */
#define BOARD_INITSDRAMPINS_SEMC_RAS_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_RAS_SIGNAL semc_ras /*!< SEMC signal: semc_ras */
/* GPIO_EMC_28 (number 128), SAI3_MCLK */
#define BOARD_INITSDRAMPINS_SEMC_DQS_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_DQS_SIGNAL semc_dqs /*!< SEMC signal: semc_dqs */
/* GPIO_EMC_31 (number 125), SEMC_DM1/U14[39] */
#define BOARD_INITSDRAMPINS_SEMC_DM1_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_DM1_SIGNAL DM /*!< SEMC signal: DM */
#define BOARD_INITSDRAMPINS_SEMC_DM1_CHANNEL 1U /*!< SEMC DM channel: 1 */
/* GPIO_EMC_08 (number 9), SEMC_DM0/U14[15] */
#define BOARD_INITSDRAMPINS_SEMC_DM0_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_DM0_SIGNAL DM /*!< SEMC signal: DM */
#define BOARD_INITSDRAMPINS_SEMC_DM0_CHANNEL 0U /*!< SEMC DM channel: 0 */
/* GPIO_EMC_39 (number 117), SEMC_D15/U14[53] */
#define BOARD_INITSDRAMPINS_SEMC_D15_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D15_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D15_CHANNEL 15U /*!< SEMC DATA channel: 15 */
/* GPIO_EMC_38 (number 118), SEMC_D14/U14[51] */
#define BOARD_INITSDRAMPINS_SEMC_D14_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D14_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D14_CHANNEL 14U /*!< SEMC DATA channel: 14 */
/* GPIO_EMC_37 (number 119), SEMC_D13/U14[50] */
#define BOARD_INITSDRAMPINS_SEMC_D13_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D13_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D13_CHANNEL 13U /*!< SEMC DATA channel: 13 */
/* GPIO_EMC_36 (number 120), SEMC_D12/U14[48] */
#define BOARD_INITSDRAMPINS_SEMC_D12_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D12_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D12_CHANNEL 12U /*!< SEMC DATA channel: 12 */
/* GPIO_EMC_34 (number 122), SEMC_D10/U14[45] */
#define BOARD_INITSDRAMPINS_SEMC_D10_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D10_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D10_CHANNEL 10U /*!< SEMC DATA channel: 10 */
/* GPIO_EMC_35 (number 121), SEMC_D11/U14[47] */
#define BOARD_INITSDRAMPINS_SEMC_D11_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D11_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D11_CHANNEL 11U /*!< SEMC DATA channel: 11 */
/* GPIO_EMC_33 (number 123), SEMC_D9/U14[44] */
#define BOARD_INITSDRAMPINS_SEMC_D9_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D9_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D9_CHANNEL 9U /*!< SEMC DATA channel: 09 */
/* GPIO_EMC_32 (number 124), SEMC_D8/U14[42] */
#define BOARD_INITSDRAMPINS_SEMC_D8_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D8_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D8_CHANNEL 8U /*!< SEMC DATA channel: 08 */
/* GPIO_EMC_07 (number 10), SEMC_D7/U14[13] */
#define BOARD_INITSDRAMPINS_SEMC_D7_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D7_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D7_CHANNEL 7U /*!< SEMC DATA channel: 07 */
/* GPIO_EMC_06 (number 12), SEMC_D6/U14[11] */
#define BOARD_INITSDRAMPINS_SEMC_D6_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D6_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D6_CHANNEL 6U /*!< SEMC DATA channel: 06 */
/* GPIO_EMC_05 (number 13), SEMC_D5/U14[10] */
#define BOARD_INITSDRAMPINS_SEMC_D5_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D5_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D5_CHANNEL 5U /*!< SEMC DATA channel: 05 */
/* GPIO_EMC_04 (number 14), SEMC_D4/U14[8] */
#define BOARD_INITSDRAMPINS_SEMC_D4_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D4_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D4_CHANNEL 4U /*!< SEMC DATA channel: 04 */
/* GPIO_EMC_03 (number 15), SEMC_D3/U14[7] */
#define BOARD_INITSDRAMPINS_SEMC_D3_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D3_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D3_CHANNEL 3U /*!< SEMC DATA channel: 03 */
/* GPIO_EMC_02 (number 16), SEMC_D2/U14[5] */
#define BOARD_INITSDRAMPINS_SEMC_D2_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D2_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D2_CHANNEL 2U /*!< SEMC DATA channel: 02 */
/* GPIO_EMC_01 (number 17), SEMC_D1/U14[4] */
#define BOARD_INITSDRAMPINS_SEMC_D1_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D1_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D1_CHANNEL 1U /*!< SEMC DATA channel: 01 */
/* GPIO_EMC_00 (number 18), SEMC_D0/U14[2] */
#define BOARD_INITSDRAMPINS_SEMC_D0_PERIPHERAL SEMC /*!< Device name: SEMC */
#define BOARD_INITSDRAMPINS_SEMC_D0_SIGNAL DATA /*!< SEMC signal: DATA */
#define BOARD_INITSDRAMPINS_SEMC_D0_CHANNEL 0U /*!< SEMC DATA channel: 00 */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitSDRAMPins(void);
/* GPIO_SD_B1_01 (number 32), CAN1_RX/U9[4] */
#define BOARD_INITCANPINS_CAN1_RX_PERIPHERAL CAN1 /*!< Device name: CAN1 */
#define BOARD_INITCANPINS_CAN1_RX_SIGNAL RX /*!< CAN1 signal: RX */
/* GPIO_SD_B1_00 (number 33), CAN1_TX/U9[1] */
#define BOARD_INITCANPINS_CAN1_TX_PERIPHERAL CAN1 /*!< Device name: CAN1 */
#define BOARD_INITCANPINS_CAN1_TX_SIGNAL TX /*!< CAN1 signal: TX */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitCANPins(void);
/* GPIO_AD_B0_11 (number 97), ENET_CRS_DV/U11[18]/J19[6] */
#define BOARD_INITENETPINS_ENET_CRS_DV_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_CRS_DV_SIGNAL enet_rx_en /*!< ENET signal: enet_rx_en */
/* GPIO_AD_B1_06 (number 84), ENET_INT/U11[21]/J17[16] */
#define BOARD_INITENETPINS_ENET_INT_GPIO GPIO1 /*!< GPIO device name: GPIO1 */
#define BOARD_INITENETPINS_ENET_INT_PORT GPIO1 /*!< PORT device name: GPIO1 */
#define BOARD_INITENETPINS_ENET_INT_PIN 22U /*!< GPIO1 pin index: 22 */
/* GPIO_AD_B0_04 (number 107), JTAG_TDO/ENET_RST/U11[32] */
#define BOARD_INITENETPINS_ENET_RST_GPIO GPIO1 /*!< GPIO device name: GPIO1 */
#define BOARD_INITENETPINS_ENET_RST_PORT GPIO1 /*!< PORT device name: GPIO1 */
#define BOARD_INITENETPINS_ENET_RST_PIN 4U /*!< GPIO1 pin index: 4 */
/* GPIO_AD_B0_08 (number 100), ENET_TX_REF_CLK/U11[9] */
#define BOARD_INITENETPINS_ENET_TX_CLK_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_TX_CLK_SIGNAL enet_tx_clk /*!< ENET signal: enet_tx_clk */
/* GPIO_AD_B0_13 (number 95), ENET_TXEN/U11[23]/J19[10] */
#define BOARD_INITENETPINS_ENET_TXEN_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_TXEN_SIGNAL enet_tx_en /*!< ENET signal: enet_tx_en */
/* GPIO_AD_B0_15 (number 93), ENET_TXD1/U11[25]/J19[4] */
#define BOARD_INITENETPINS_ENET_TXD1_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_TXD1_SIGNAL enet_tx_data /*!< ENET signal: enet_tx_data */
#define BOARD_INITENETPINS_ENET_TXD1_CHANNEL 1U /*!< ENET enet_tx_data channel: 1 */
/* GPIO_AD_B0_14 (number 94), ENET_TXD0/U11[24]/J17[14] */
#define BOARD_INITENETPINS_ENET_TXD0_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_TXD0_SIGNAL enet_tx_data /*!< ENET signal: enet_tx_data */
#define BOARD_INITENETPINS_ENET_TXD0_CHANNEL 0U /*!< ENET enet_tx_data channel: 0 */
/* GPIO_AD_B0_12 (number 96), ENET_RXER/U11[20]/J19[8] */
#define BOARD_INITENETPINS_ENET_RXER_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_RXER_SIGNAL enet_rx_er /*!< ENET signal: enet_rx_er */
/* GPIO_AD_B0_09 (number 99), ENET_RXD1/U11[15]/J17[6] */
#define BOARD_INITENETPINS_ENET_RXD1_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_RXD1_SIGNAL enet_rx_data /*!< ENET signal: enet_rx_data */
#define BOARD_INITENETPINS_ENET_RXD1_CHANNEL 1U /*!< ENET enet_rx_data channel: 1 */
/* GPIO_AD_B0_10 (number 98), ENET_RXD0/U11[16]/J19[12] */
#define BOARD_INITENETPINS_ENET_RXD0_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_RXD0_SIGNAL enet_rx_data /*!< ENET signal: enet_rx_data */
#define BOARD_INITENETPINS_ENET_RXD0_CHANNEL 0U /*!< ENET enet_rx_data channel: 0 */
/* GPIO_EMC_40 (number 116), ENET_MDIO/U11[11] */
#define BOARD_INITENETPINS_ENET_MDIO_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_MDIO_SIGNAL enet_mdio /*!< ENET signal: enet_mdio */
/* GPIO_EMC_41 (number 115), ENET_MDC/U11[12] */
#define BOARD_INITENETPINS_ENET_MDC_PERIPHERAL ENET /*!< Device name: ENET */
#define BOARD_INITENETPINS_ENET_MDC_SIGNAL enet_mdc /*!< ENET signal: enet_mdc */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitENETPins(void);
/* GPIO_SD_B0_03 (number 45), SD1_CLK/J15[5] */
#define BOARD_INITUSDHCPINS_SD1_CLK_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */
#define BOARD_INITUSDHCPINS_SD1_CLK_SIGNAL usdhc_clk /*!< USDHC1 signal: usdhc_clk */
/* GPIO_SD_B0_02 (number 46), SD1_CMD/J15[3] */
#define BOARD_INITUSDHCPINS_SD1_CMD_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */
#define BOARD_INITUSDHCPINS_SD1_CMD_SIGNAL usdhc_cmd /*!< USDHC1 signal: usdhc_cmd */
/* GPIO_SD_B0_04 (number 43), SD1_D0/J15[7] */
#define BOARD_INITUSDHCPINS_SD1_D0_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */
#define BOARD_INITUSDHCPINS_SD1_D0_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */
#define BOARD_INITUSDHCPINS_SD1_D0_CHANNEL 0U /*!< USDHC1 usdhc_data channel: 0 */
/* GPIO_SD_B0_05 (number 42), SD1_D1/J15[8] */
#define BOARD_INITUSDHCPINS_SD1_D1_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */
#define BOARD_INITUSDHCPINS_SD1_D1_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */
#define BOARD_INITUSDHCPINS_SD1_D1_CHANNEL 1U /*!< USDHC1 usdhc_data channel: 1 */
/* GPIO_SD_B0_00 (number 48), SD1_D2/J15[1] */
#define BOARD_INITUSDHCPINS_SD1_D2_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */
#define BOARD_INITUSDHCPINS_SD1_D2_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */
#define BOARD_INITUSDHCPINS_SD1_D2_CHANNEL 2U /*!< USDHC1 usdhc_data channel: 2 */
/* GPIO_SD_B0_01 (number 47), SD1_D3/J15[2] */
#define BOARD_INITUSDHCPINS_SD1_D3_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */
#define BOARD_INITUSDHCPINS_SD1_D3_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */
#define BOARD_INITUSDHCPINS_SD1_D3_CHANNEL 3U /*!< USDHC1 usdhc_data channel: 3 */
/* GPIO_SD_B0_06 (number 41), SD_CD_SW/J15[9] */
#define BOARD_INITUSDHCPINS_SD_CD_SW_GPIO GPIO3 /*!< GPIO device name: GPIO3 */
#define BOARD_INITUSDHCPINS_SD_CD_SW_PORT GPIO3 /*!< PORT device name: GPIO3 */
#define BOARD_INITUSDHCPINS_SD_CD_SW_PIN 19U /*!< GPIO3 pin index: 19 */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitUSDHCPins(void);
/* GPIO_SD_B1_07 (number 24), SAI3_TX_SYNC */
#define BOARD_INITQSPIPINS_FlexSPI_CLK_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */
#define BOARD_INITQSPIPINS_FlexSPI_CLK_SIGNAL FLEXSPI_A_SCLK /*!< FLEXSPI signal: FLEXSPI_A_SCLK */
/* GPIO_SD_B1_08 (number 23), SAI3_TXD */
#define BOARD_INITQSPIPINS_FlexSPI_D0_A_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */
#define BOARD_INITQSPIPINS_FlexSPI_D0_A_SIGNAL FLEXSPI_A_DATA0 /*!< FLEXSPI signal: FLEXSPI_A_DATA0 */
/* GPIO_SD_B1_10 (number 21), SD_PWREN */
#define BOARD_INITQSPIPINS_FlexSPI_D1_A_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */
#define BOARD_INITQSPIPINS_FlexSPI_D1_A_SIGNAL FLEXSPI_A_DATA1 /*!< FLEXSPI signal: FLEXSPI_A_DATA1 */
/* GPIO_SD_B1_09 (number 22), AUD_INT */
#define BOARD_INITQSPIPINS_FlexSPI_D2_A_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */
#define BOARD_INITQSPIPINS_FlexSPI_D2_A_SIGNAL FLEXSPI_A_DATA2 /*!< FLEXSPI signal: FLEXSPI_A_DATA2 */
/* GPIO_SD_B1_06 (number 25), SAI3_TX_BCLK */
#define BOARD_INITQSPIPINS_FlexSPI_D3_A_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */
#define BOARD_INITQSPIPINS_FlexSPI_D3_A_SIGNAL FLEXSPI_A_DATA3 /*!< FLEXSPI signal: FLEXSPI_A_DATA3 */
/* GPIO_SD_B1_11 (number 19), SAI3_RXD */
#define BOARD_INITQSPIPINS_FlexSPI_SS0_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */
#define BOARD_INITQSPIPINS_FlexSPI_SS0_SIGNAL FLEXSPI_A_SS0_B /*!< FLEXSPI signal: FLEXSPI_A_SS0_B */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitQSPIPins(void);
#if defined(__cplusplus)
}
#endif
/*!
* @}
*/
#endif /* _PIN_MUX_H_ */
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

46
hw/bsp/imxrt/boards/mimxrt1024_evk/mimxrt1024_evk.mex
View File

@ -26,6 +26,10 @@
</generated_project_files>
<pins_profile>
<processor_version>13.0.2</processor_version>
<pin_labels>
<pin_label pin_num="52" pin_signal="WAKEUP" label="USER_BUTTON" identifier="USER_BUTTON"/>
<pin_label pin_num="82" pin_signal="GPIO_AD_B1_08" label="UART_TX/USER_LED/J17[4]" identifier="USER_LED"/>
</pin_labels>
<power_domains>
<power_domain name="NVCC_GPIO" value="3.3"/>
</power_domains>
@ -39,13 +43,39 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="GPIO5" description="Peripheral GPIO5 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins/>
<pins>
<pin peripheral="GPIO5" signal="gpio_io, 00" pin_num="52" pin_signal="WAKEUP">
<pin_features>
<pin_feature name="direction" value="INPUT"/>
</pin_features>
</pin>
<pin peripheral="GPIO1" signal="gpio_io, 24" pin_num="82" pin_signal="GPIO_AD_B1_08">
<pin_features>
<pin_feature name="direction" value="OUTPUT"/>
</pin_features>
</pin>
</pins>
</function>
<function name="BOARD_InitDEBUG_UARTPins">
<description>Configures pin routing and optionally pin electrical features.</description>
@ -423,11 +453,8 @@
</clock_configuration>
</clock_configurations>
</clocks>
<dcdx name="DCDx" version="3.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/dcd.c" update_enabled="true"/>
<file path="board/dcd.h" update_enabled="true"/>
</generated_project_files>
<dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
<generated_project_files/>
<dcdx_profile>
<processor_version>13.0.2</processor_version>
<output_format>c_array</output_format>
@ -440,11 +467,8 @@
</dcdx_configuration>
</dcdx_configurations>
</dcdx>
<periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/peripherals.c" update_enabled="true"/>
<file path="board/peripherals.h" update_enabled="true"/>
</generated_project_files>
<periphs name="Peripherals" version="12.0" enabled="false" update_project_code="true">
<generated_project_files/>
<peripherals_profile>
<processor_version>13.0.2</processor_version>
</peripherals_profile>