msc add support
- SCSI_CMD_MODE_SELECT_6 - SCSI_CMD_MODE_SENSE_6 - SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL fix msc device bug with no data unsupported command complete msc device demo with ram disk of 8KB
This commit is contained in:
hathach
parent
d02ef07337
commit
83d9ececfb
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@ -61,12 +61,6 @@ void board_init(void)
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// USB1 Power: EA4357 channel A U20 is enabled by SJ5 connected to pad 1-2, no more action required
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// TODO Remove R170, R171, solder a pair of 15K to USB1 D+/D- to test with USB1 Host
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// TODO Device only USB0
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// 1.5Kohm pull-up resistor is needed on the USB DP data signal. GPIO28 (base), P9_5 (LPC4357) controls
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// scu_pinmux(0x9, 5, MD_PUP|MD_EZI|MD_ZI, FUNC4); // GPIO5[18]
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// GPIO_SetDir(5, BIT_(18), 1); // output
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// GPIO_ClearValue(5, BIT_(18));
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//------------- LED -------------//
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I2C_Init(LPC_I2C0, 100000);
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I2C_Cmd(LPC_I2C0, ENABLE);
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@ -86,6 +80,10 @@ void board_init(void)
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UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
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#endif
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//------------- NAND Flash (K9FXX) Size = 128M, Page Size = 2K, Block Size = 128K, Number of Block = 1024 -------------//
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// nand_init();
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#if 0
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//------------- Ethernet -------------//
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LPC_CREG->CREG6 &= ~0x7;
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@ -65,6 +65,7 @@
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#include "oem_base_board/pca9532.h" // LEDs
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#include "oem_board/nand.h"
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//#define CFG_PRINTF_TARGET PRINTF_TARGET_SWO
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@ -0,0 +1,474 @@
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/******************************************************************
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***** *****
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***** Name: cs8900.c *****
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***** Ver.: 1.0 *****
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***** Date: 07/05/2001 *****
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***** Auth: Andreas Dannenberg *****
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***** HTWK Leipzig *****
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***** university of applied sciences *****
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***** Germany *****
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***** Func: ethernet packet-driver for use with LAN- *****
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***** controller CS8900 from Crystal/Cirrus Logic *****
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***** *****
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***** NXP: Module modified for use with NXP *****
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***** lpc43xx EMAC Ethernet controller *****
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***** *****
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******************************************************************/
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#include "EMAC.h"
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//#include "tcpip.h"
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#include "lpc43xx.h"
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#include "lpc43xx_scu.h"
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#include "lpc43xx_rgu.h"
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#define TIMEOUT 100000
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static unsigned short *rptr;
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static unsigned short *tptr;
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static unsigned int TxDescIndex = 0;
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static unsigned int RxDescIndex = 0;
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// Keil: function added to write PHY
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static void write_PHY (unsigned int PhyReg, unsigned short Value) {
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unsigned int tout;
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/* Write a data 'Value' to PHY register 'PhyReg'. */
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while(LPC_ETHERNET->MAC_MII_ADDR & GMII_BUSY); // Check GMII busy bit
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LPC_ETHERNET->MAC_MII_ADDR = (DP83848C_DEF_ADR<<11) | (PhyReg<<6) | GMII_WRITE;
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LPC_ETHERNET->MAC_MII_DATA = Value;
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LPC_ETHERNET->MAC_MII_ADDR |= GMII_BUSY; // Start PHY Write Cycle
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/* Wait utill operation completed */
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for (tout = 0; tout < MII_WR_TOUT; tout++) {
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if ((LPC_ETHERNET->MAC_MII_ADDR & GMII_BUSY) == 0) {
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break;
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}
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}
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if (tout == MII_WR_TOUT) // Trap the timeout
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while(1);
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}
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// Keil: function added to read PHY
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static unsigned short read_PHY (unsigned int PhyReg) {
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unsigned int tout, val;
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/* Read a PHY register 'PhyReg'. */
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while(LPC_ETHERNET->MAC_MII_ADDR & GMII_BUSY); // Check GMII busy bit
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LPC_ETHERNET->MAC_MII_ADDR = (DP83848C_DEF_ADR<<11) | (PhyReg<<6) | GMII_READ;
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LPC_ETHERNET->MAC_MII_ADDR |= GMII_BUSY; // Start PHY Read Cycle
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/* Wait until operation completed */
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for (tout = 0; tout < MII_RD_TOUT; tout++) {
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if ((LPC_ETHERNET->MAC_MII_ADDR & GMII_BUSY) == 0) {
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break;
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}
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}
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if (tout == MII_RD_TOUT) // Trap the timeout
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while(1);
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val = LPC_ETHERNET->MAC_MII_DATA;
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return (val);
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}
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// Keil: function added to initialize Rx Descriptors
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void rx_descr_init (void)
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{
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unsigned int i;
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for (i = 0; i < NUM_RX_DESC; i++) {
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RX_DESC_STAT(i) = OWN_BIT;
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RX_DESC_CTRL(i) = ETH_FRAG_SIZE;
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RX_BUFADDR(i) = RX_BUF(i);
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if (i == (NUM_RX_DESC-1)) // Last Descriptor?
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RX_DESC_CTRL(i) |= RX_END_RING;
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}
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/* Set Starting address of RX Descriptor list */
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LPC_ETHERNET->DMA_REC_DES_ADDR = RX_DESC_BASE;
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}
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// Keil: function added to initialize Tx Descriptors
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void tx_descr_init (void)
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{
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unsigned int i;
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for (i = 0; i < NUM_TX_DESC; i++) { // Take it out!!!!
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TX_DESC_STAT(i) = 0;
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TX_DESC_CTRL(i) = 0;
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TX_BUFADDR(i) = 0;
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}
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for (i = 0; i < NUM_TX_DESC; i++) {
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TX_DESC_STAT(i) = TX_LAST_SEGM | TX_FIRST_SEGM;
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TX_DESC_CTRL(i) = 0;
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TX_BUFADDR(i) = TX_BUF(i);
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if (i == (NUM_TX_DESC-1)) // Last Descriptor?
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TX_DESC_STAT(i) |= TX_END_RING;
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}
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/* Set Starting address of RX Descriptor list */
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LPC_ETHERNET->DMA_TRANS_DES_ADDR = TX_DESC_BASE;
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}
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// configure port-pins for use with LAN-controller,
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// reset it and send the configuration-sequence
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void Init_EMAC(void)
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{
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int id1, id2, tout, regv;
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unsigned phy_in_use = 0;
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/* Ethernet pins configuration */
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#if MII
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scu_pinmux(0xC ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_MDC: PC_1 -> FUNC3
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scu_pinmux(0x1 ,17 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_MDIO: P1_17 -> FUNC3
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scu_pinmux(0x1 ,18 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TXD0: P1_18 -> FUNC3
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scu_pinmux(0x1 ,20 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TXD1: P1_20 -> FUNC3
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scu_pinmux(0x1 ,19 , (MD_PLN | MD_EZI | MD_ZI), FUNC0); // ENET_REF: P1_19 -> FUNC0 (default)
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// scu_pinmux(0xC ,4 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TX_EN: PC_4 -> FUNC3
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scu_pinmux(0x0 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC6); // ENET_TX_EN: P0_1 -> FUNC6
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scu_pinmux(0x1 ,15 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RXD0: P1_15 -> FUNC3
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scu_pinmux(0x0 ,0 , (MD_PLN | MD_EZI | MD_ZI), FUNC2); // ENET_RXD1: P0_0 -> FUNC2
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// scu_pinmux(0x1 ,16 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_CRS: P1_16 -> FUNC3
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scu_pinmux(0x9 ,0 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_CRS: P9_0 -> FUNC5
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// scu_pinmux(0xC ,9 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RX_ER: PC_9 -> FUNC3
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scu_pinmux(0x9 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_RX_ER: P9_1 -> FUNC5
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// scu_pinmux(0xC ,8 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RXDV: PC_8 -> FUNC3
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scu_pinmux(0x1 ,16 , (MD_PLN | MD_EZI | MD_ZI), FUNC7); // ENET_RXDV: P1_16 -> FUNC7
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#else
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scu_pinmux(0xC ,1 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_MDC: PC_1 -> FUNC3
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scu_pinmux(0x1 ,17 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_MDIO: P1_17 -> FUNC3
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scu_pinmux(0x1 ,18 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TXD0: P1_18 -> FUNC3
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scu_pinmux(0x1 ,20 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TXD1: P1_20 -> FUNC3
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scu_pinmux(0x1 ,19 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC0); // ENET_REF: P1_19 -> FUNC0 (default)
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// scu_pinmux(0xC ,4 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TX_EN: PC_4 -> FUNC3
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scu_pinmux(0x0 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC6); // ENET_TX_EN: P0_1 -> FUNC6
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scu_pinmux(0x1 ,15 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RXD0: P1_15 -> FUNC3
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scu_pinmux(0x0 ,0 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC2); // ENET_RXD1: P0_0 -> FUNC2
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// scu_pinmux(0x1 ,16 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_CRS: P1_16 -> FUNC3
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// scu_pinmux(0x9 ,0 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_CRS: P9_0 -> FUNC5
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// scu_pinmux(0xC ,9 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RX_ER: PC_9 -> FUNC3
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// scu_pinmux(0x9 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_RX_ER: P9_1 -> FUNC5
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// scu_pinmux(0xC ,8 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RXDV: PC_8 -> FUNC3
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scu_pinmux(0x1 ,16 , (MD_PLN | MD_EZI | MD_ZI), FUNC7); // ENET_RXDV: P1_16 -> FUNC7
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#endif
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#if MII /* Select MII interface */ // check MUXING for new Eagle...
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// scu_pinmux(0xC ,6 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RXD2: PC_6 -> FUNC3
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scu_pinmux(0x9 ,3 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_RXD2: P9_3 -> FUNC5
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// scu_pinmux(0xC ,7 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RXD3: PC_7 -> FUNC3
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scu_pinmux(0x9 ,2 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_RXD3: P9_2 -> FUNC5
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scu_pinmux(0xC ,0 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_RXLK: PC_0 -> FUNC3
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// scu_pinmux(0xC ,2 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TXD2: PC_2 -> FUNC3
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scu_pinmux(0x9 ,4 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_TXD2: P9_4 -> FUNC5
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// scu_pinmux(0xC ,3 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TXD3: PC_3 -> FUNC3
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scu_pinmux(0x9 ,5 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_TXD3: P9_5 -> FUNC5
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// scu_pinmux(0xC ,5 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TX_ER: PC_5 -> FUNC3
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scu_pinmux(0xC ,5 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); // ENET_TX_ER: PC_5 -> FUNC3
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// scu_pinmux(0x0 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC2); // ENET_COL: P0_1 -> FUNC2
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scu_pinmux(0x9 ,6 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); // ENET_COL: P9_6 -> FUNC5
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#else /* Select RMII interface */
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LPC_CREG->CREG6 |= RMII_SELECT;
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#endif
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RGU_SoftReset(RGU_SIG_ETHERNET);
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while(1){ // Confirm the reset happened
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if (LPC_RGU->RESET_ACTIVE_STATUS0 & (1<<ETHERNET_RST))
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break;
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}
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LPC_ETHERNET->DMA_BUS_MODE |= DMA_SOFT_RESET; // Reset all GMAC Subsystem internal registers and logic
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while(LPC_ETHERNET->DMA_BUS_MODE & DMA_SOFT_RESET); // Wait for software reset completion
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/* Put the DP83848C in reset mode */
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write_PHY (PHY_REG_BMCR, PHY_BMCR_RESET);
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/* Wait for hardware reset to end. */
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for (tout = 0; tout < TIMEOUT; tout++) {
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regv = read_PHY (PHY_REG_BMCR);
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if (!(regv & PHY_BMCR_RESET)) {
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/* Reset complete */
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break;
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}
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}
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/* Check if this is a DP83848C PHY. */
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id1 = read_PHY (PHY_REG_IDR1);
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id2 = read_PHY (PHY_REG_IDR2);
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if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {
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phy_in_use = DP83848C_ID;
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}
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else if (((id1 << 16) | (id2 & 0xFFF0)) == LAN8720_ID) {
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phy_in_use = LAN8720_ID;
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}
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if (phy_in_use != 0) {
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/* Configure the PHY device */
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#if !MII
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write_PHY (PHY_REG_RBR, 0x20);
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#endif
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/* Use autonegotiation about the link speed. */
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write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
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/* Wait to complete Auto_Negotiation. */
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for (tout = 0; tout < TIMEOUT; tout++) {
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regv = read_PHY (PHY_REG_BMSR);
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if (regv & PHY_AUTO_NEG_DONE) {
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/* Autonegotiation Complete. */
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break;
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}
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}
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}
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/* Check the link status. */
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for (tout = 0; tout < TIMEOUT; tout++) {
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regv = read_PHY (PHY_REG_STS);
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if (regv & LINK_VALID_STS) {
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/* Link is on. */
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break;
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}
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}
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// Configure the EMAC with the established parameters
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switch (phy_in_use) {
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case DP83848C_ID:
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/* Configure Full/Half Duplex mode. */
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if (regv & FULL_DUP_STS) {
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/* Full duplex is enabled. */
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LPC_ETHERNET->MAC_CONFIG |= MAC_DUPMODE;
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}
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/* Configure 100MBit/10MBit mode. */
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if (~(regv & SPEED_10M_STS)) {
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/* 100MBit mode. */
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LPC_ETHERNET->MAC_CONFIG |= MAC_100MPS;
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}
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// value = ReadFromPHY (PHY_REG_STS); /* PHY Extended Status Register */
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// // Now configure for full/half duplex mode
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// if (value & 0x0004) {
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// // We are in full duplex is enabled mode
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// LPC_ETHERNET->MAC2 |= MAC2_FULL_DUP;
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// LPC_ETHERNET->Command |= CR_FULL_DUP;
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// LPC_ETHERNET->IPGT = IPGT_FULL_DUP;
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// }
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// else {
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// // Otherwise we are in half duplex mode
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// LPC_ETHERNET->IPGT = IPGT_HALF_DUP;
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// }
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// // Now configure 100MBit or 10MBit mode
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// if (value & 0x0002) {
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// // 10MBit mode
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// LPC_ETHERNET->SUPP = 0;
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// }
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// else {
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// // 100MBit mode
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// LPC_ETHERNET->SUPP = SUPP_SPEED;
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// }
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break;
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case LAN8720_ID:
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regv = read_PHY (PHY_REG_SCSR); /* PHY Extended Status Register */
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// Now configure for full/half duplex mode
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if (regv & (1<<4)) { /* bit 4: 1 = Full Duplex, 0 = Half Duplex */
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// We are in full duplex is enabled mode
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LPC_ETHERNET->MAC_CONFIG |= MAC_DUPMODE;
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}
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// Now configure 100MBit or 10MBit mode
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if (regv & (1<<3)) { /* bit 3: 1 = 100Mbps, 0 = 10Mbps */
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// 100MBit mode
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LPC_ETHERNET->MAC_CONFIG |= MAC_100MPS;
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}
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break;
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}
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/* Set the Ethernet MAC Address registers */
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LPC_ETHERNET->MAC_ADDR0_HIGH = (MYMAC_6 << 8) | MYMAC_5;
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LPC_ETHERNET->MAC_ADDR0_LOW = (MYMAC_4 << 24) | (MYMAC_3 << 16) | (MYMAC_2 << 8) | MYMAC_1;
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/* Initialize Descriptor Lists */
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rx_descr_init();
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tx_descr_init();
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/* Configure Filter */
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LPC_ETHERNET->MAC_FRAME_FILTER = MAC_PROMISCUOUS | MAC_RECEIVEALL;
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/* Enable Receiver and Transmitter */
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LPC_ETHERNET->MAC_CONFIG |= (MAC_TX_ENABLE | MAC_RX_ENABLE);
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/* Enable interrupts */
|
||||
//LPC_ETHERNET->DMA_INT_EN = DMA_INT_NOR_SUM | DMA_INT_RECEIVE | DMA_INT_TRANSMIT;
|
||||
|
||||
/* Start Transmission & Receive processes */
|
||||
LPC_ETHERNET->DMA_OP_MODE |= (DMA_SS_TRANSMIT | DMA_SS_RECEIVE );
|
||||
|
||||
}
|
||||
|
||||
|
||||
// reads a word in little-endian byte order from RX_BUFFER
|
||||
|
||||
unsigned short ReadFrame_EMAC(void)
|
||||
{
|
||||
return (*rptr++);
|
||||
}
|
||||
|
||||
|
||||
// easyWEB internal function
|
||||
// help function to swap the byte order of a WORD
|
||||
|
||||
unsigned short SwapBytes(unsigned short Data)
|
||||
{
|
||||
return (Data >> 8) | (Data << 8);
|
||||
}
|
||||
|
||||
// reads a word in big-endian byte order from RX_FRAME_PORT
|
||||
// (useful to avoid permanent byte-swapping while reading
|
||||
// TCP/IP-data)
|
||||
|
||||
unsigned short ReadFrameBE_EMAC(void)
|
||||
{
|
||||
unsigned short ReturnValue;
|
||||
|
||||
ReturnValue = SwapBytes (*rptr++);
|
||||
return (ReturnValue);
|
||||
}
|
||||
|
||||
|
||||
// copies bytes from frame port to MCU-memory
|
||||
// NOTES: * an odd number of byte may only be transfered
|
||||
// if the frame is read to the end!
|
||||
// * MCU-memory MUST start at word-boundary
|
||||
|
||||
void CopyFromFrame_EMAC(void *Dest, unsigned short Size)
|
||||
{
|
||||
unsigned short * piDest; // Keil: Pointer added to correct expression
|
||||
|
||||
piDest = Dest; // Keil: Line added
|
||||
while (Size > 1) {
|
||||
*piDest++ = ReadFrame_EMAC();
|
||||
Size -= 2;
|
||||
}
|
||||
|
||||
if (Size) { // check for leftover byte...
|
||||
*(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0
|
||||
} // for the highbyte
|
||||
}
|
||||
|
||||
// does a dummy read on frame-I/O-port
|
||||
// NOTE: only an even number of bytes is read!
|
||||
|
||||
void DummyReadFrame_EMAC(unsigned short Size) // discards an EVEN number of bytes
|
||||
{ // from RX-fifo
|
||||
while (Size > 1) {
|
||||
ReadFrame_EMAC();
|
||||
Size -= 2;
|
||||
}
|
||||
}
|
||||
|
||||
// Reads the length of the received ethernet frame and checks if the
|
||||
// destination address is a broadcast message or not
|
||||
// returns the frame length
|
||||
unsigned short StartReadFrame(void) {
|
||||
unsigned short RxLen;
|
||||
|
||||
if ((RX_DESC_STAT(RxDescIndex) & OWN_BIT) == 0) {
|
||||
RxLen = (RX_DESC_STAT(RxDescIndex) >> 16) & 0x03FFF;
|
||||
rptr = (unsigned short *)RX_BUFADDR(RxDescIndex);
|
||||
return(RxLen);
|
||||
}
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
void EndReadFrame(void) {
|
||||
|
||||
RX_DESC_STAT(RxDescIndex) = OWN_BIT;
|
||||
RxDescIndex++;
|
||||
if (RxDescIndex == NUM_RX_DESC)
|
||||
RxDescIndex = 0;
|
||||
}
|
||||
|
||||
unsigned int CheckFrameReceived(void) { // Packet received ?
|
||||
|
||||
if ((RX_DESC_STAT(RxDescIndex) & OWN_BIT) == 0)
|
||||
return(1);
|
||||
else
|
||||
return(0);
|
||||
}
|
||||
|
||||
// requests space in EMAC memory for storing an outgoing frame
|
||||
|
||||
void RequestSend(unsigned short FrameSize)
|
||||
{
|
||||
tptr = (unsigned short *)TX_BUFADDR(TxDescIndex);
|
||||
TX_DESC_CTRL(TxDescIndex) = FrameSize;
|
||||
}
|
||||
|
||||
// check if ethernet controller is ready to accept the
|
||||
// frame we want to send
|
||||
|
||||
unsigned int Rdy4Tx(void)
|
||||
{
|
||||
return (1); // the ethernet controller transmits much faster
|
||||
} // than the CPU can load its buffers
|
||||
|
||||
|
||||
// writes a word in little-endian byte order to TX_BUFFER
|
||||
void WriteFrame_EMAC(unsigned short Data)
|
||||
{
|
||||
*tptr++ = Data;
|
||||
}
|
||||
|
||||
// copies bytes from MCU-memory to frame port
|
||||
// NOTES: * an odd number of byte may only be transfered
|
||||
// if the frame is written to the end!
|
||||
// * MCU-memory MUST start at word-boundary
|
||||
|
||||
void CopyToFrame_EMAC(void *Source, unsigned int Size)
|
||||
{
|
||||
unsigned short * piSource;
|
||||
// unsigned int idx;
|
||||
|
||||
piSource = Source;
|
||||
Size = (Size + 1) & 0xFFFE; // round Size up to next even number
|
||||
while (Size > 0) {
|
||||
WriteFrame_EMAC(*piSource++);
|
||||
Size -= 2;
|
||||
}
|
||||
TX_DESC_STAT(TxDescIndex) |= OWN_BIT;
|
||||
LPC_ETHERNET->DMA_TRANS_POLL_DEMAND = 1; // Wake Up the DMA if it's in Suspended Mode
|
||||
TxDescIndex++;
|
||||
if (TxDescIndex == NUM_TX_DESC)
|
||||
TxDescIndex = 0;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,157 @@
|
|||
#ifndef __EMAC_H
|
||||
#define __EMAC_H
|
||||
|
||||
|
||||
/* Configuration */
|
||||
|
||||
/* Interface Selection */
|
||||
#define MII 0 // =0 RMII - =1 MII
|
||||
|
||||
/* MAC Configuration */
|
||||
#define MYMAC_1 0x1EU /* our ethernet (MAC) address */
|
||||
#define MYMAC_2 0x30U /* (MUST be unique in LAN!) */
|
||||
#define MYMAC_3 0x6cU
|
||||
#define MYMAC_4 0xa2U
|
||||
#define MYMAC_5 0x45U
|
||||
#define MYMAC_6 0x5eU
|
||||
|
||||
|
||||
#define ETH_FRAG_SIZE 1536
|
||||
#define NUM_RX_DESC 3
|
||||
#define NUM_TX_DESC 3
|
||||
|
||||
/* End of Configuration */
|
||||
|
||||
|
||||
/* EMAC Descriptors and Buffers located in 16K SRAM */
|
||||
/* Rx Descriptors */
|
||||
#define RX_DESC_BASE 0x20008000
|
||||
#define RX_STAT_BASE RX_DESC_BASE
|
||||
#define RX_CTRL_BASE (RX_STAT_BASE + 4)
|
||||
#define RX_BUFADDR_BASE (RX_CTRL_BASE + 4)
|
||||
#define RX_NEXTDESC_BASE (RX_BUFADDR_BASE + 4)
|
||||
#define RX_BUF_BASE (RX_DESC_BASE + NUM_RX_DESC*16)
|
||||
|
||||
#define RX_DESC_STAT(i) (*(unsigned int *)(RX_STAT_BASE + 16*i))
|
||||
#define RX_DESC_CTRL(i) (*(unsigned int *)(RX_CTRL_BASE + 16*i))
|
||||
#define RX_BUFADDR(i) (*(unsigned int *)(RX_BUFADDR_BASE + 16*i))
|
||||
#define RX_NEXTDESC(i) (*(unsigned int *)(RX_NEXTDESC_BASE + 16*i))
|
||||
#define RX_BUF(i) (RX_BUF_BASE + ETH_FRAG_SIZE*i)
|
||||
|
||||
/* Tx Descriptors */
|
||||
#define TX_DESC_BASE RX_BUF_BASE + (ETH_FRAG_SIZE * NUM_RX_DESC)
|
||||
#define TX_STAT_BASE TX_DESC_BASE
|
||||
#define TX_CTRL_BASE (TX_STAT_BASE + 4)
|
||||
#define TX_BUFADDR_BASE (TX_CTRL_BASE + 4)
|
||||
#define TX_NEXTDESC_BASE (TX_BUFADDR_BASE + 4)
|
||||
#define TX_BUF_BASE (TX_DESC_BASE + NUM_TX_DESC*16)
|
||||
|
||||
#define TX_DESC_STAT(i) (*(unsigned int *)(TX_STAT_BASE + 16*i))
|
||||
#define TX_DESC_CTRL(i) (*(unsigned int *)(TX_CTRL_BASE + 16*i))
|
||||
#define TX_BUFADDR(i) (*(unsigned int *)(TX_BUFADDR_BASE + 16*i))
|
||||
#define TX_NEXTDESC(i) (*(unsigned int *)(TX_NEXTDESC_BASE + 16*i))
|
||||
#define TX_BUF(i) (TX_BUF_BASE + ETH_FRAG_SIZE*i)
|
||||
|
||||
/* Descriptors Fields bits */
|
||||
#define OWN_BIT (1U<<31) /* Own bit in RDES0 & TDES0 */
|
||||
#define RX_END_RING (1<<15) /* Receive End of Ring bit in RDES1 */
|
||||
#define RX_NXTDESC_FLAG (1<<14) /* Second Address Chained bit in RDES1 */
|
||||
#define TX_LAST_SEGM (1<<29) /* Last Segment bit in TDES0 */
|
||||
#define TX_FIRST_SEGM (1<<28) /* First Segment bit in TDES0 */
|
||||
#define TX_END_RING (1<<21) /* Transmit End of Ring bit in TDES0 */
|
||||
#define TX_NXTDESC_FLAG (1<<20) /* Second Address Chained bit in TDES0 */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* EMAC Control and Status bits */
|
||||
#define MAC_RX_ENABLE (1<<2) /* Receiver Enable in MAC_CONFIG reg */
|
||||
#define MAC_TX_ENABLE (1<<3) /* Transmitter Enable in MAC_CONFIG reg */
|
||||
#define MAC_PADCRC_STRIP (1<<7) /* Automatic Pad-CRC Stripping in MAC_CONFIG reg */
|
||||
#define MAC_DUPMODE (1<<11) /* Duplex Mode in MAC_CONFIG reg */
|
||||
#define MAC_100MPS (1<<14) /* Speed is 100Mbps in MAC_CONFIG reg */
|
||||
#define MAC_PROMISCUOUS (1U<<0) /* Promiscuous Mode bit in MAC_FRAME_FILTER reg */
|
||||
#define MAC_DIS_BROAD (1U<<5) /* Disable Broadcast Frames bit in MAC_FRAME_FILTER reg */
|
||||
#define MAC_RECEIVEALL (1U<<31) /* Receive All bit in MAC_FRAME_FILTER reg */
|
||||
#define DMA_SOFT_RESET 0x01 /* Software Reset bit in DMA_BUS_MODE reg */
|
||||
#define DMA_SS_RECEIVE (1<<1) /* Start/Stop Receive bit in DMA_OP_MODE reg */
|
||||
#define DMA_SS_TRANSMIT (1<<13) /* Start/Stop Transmission bit in DMA_OP_MODE reg */
|
||||
#define DMA_INT_TRANSMIT (1<<0) /* Transmit Interrupt Enable bit in DMA_INT_EN reg */
|
||||
#define DMA_INT_OVERFLOW (1<<4) /* Overflow Interrupt Enable bit in DMA_INT_EN reg */
|
||||
#define DMA_INT_UNDERFLW (1<<5) /* Underflow Interrupt Enable bit in DMA_INT_EN reg */
|
||||
#define DMA_INT_RECEIVE (1<<6) /* Receive Interrupt Enable bit in DMA_INT_EN reg */
|
||||
#define DMA_INT_ABN_SUM (1<<15) /* Abnormal Interrupt Summary Enable bit in DMA_INT_EN reg */
|
||||
#define DMA_INT_NOR_SUM (1<<16) /* Normal Interrupt Summary Enable bit in DMA_INT_EN reg */
|
||||
|
||||
/* MII Management Command Register */
|
||||
#define GMII_READ (0<<1) /* GMII Read PHY */
|
||||
#define GMII_WRITE (1<<1) /* GMII Write PHY */
|
||||
#define GMII_BUSY 0x00000001 /* GMII is Busy / Start Read/Write */
|
||||
#define MII_WR_TOUT 0x00050000 /* MII Write timeout count */
|
||||
#define MII_RD_TOUT 0x00050000 /* MII Read timeout count */
|
||||
|
||||
/* MII Management Address Register */
|
||||
#define MADR_PHY_ADR 0x00001F00 /* PHY Address Mask */
|
||||
|
||||
/* DP83848C PHY Registers */
|
||||
#define PHY_REG_BMCR 0x00 /* Basic Mode Control Register */
|
||||
#define PHY_REG_BMSR 0x01 /* Basic Mode Status Register */
|
||||
#define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */
|
||||
#define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */
|
||||
#define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */
|
||||
#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */
|
||||
#define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */
|
||||
#define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */
|
||||
|
||||
/* PHY Extended Registers */
|
||||
#define PHY_REG_STS 0x10 /* Status Register */
|
||||
#define PHY_REG_MICR 0x11 /* MII Interrupt Control Register */
|
||||
#define PHY_REG_MISR 0x12 /* MII Interrupt Status Register */
|
||||
#define PHY_REG_FCSCR 0x14 /* False Carrier Sense Counter */
|
||||
#define PHY_REG_RECR 0x15 /* Receive Error Counter */
|
||||
#define PHY_REG_PCSR 0x16 /* PCS Sublayer Config. and Status */
|
||||
#define PHY_REG_RBR 0x17 /* RMII and Bypass Register */
|
||||
#define PHY_REG_LEDCR 0x18 /* LED Direct Control Register */
|
||||
#define PHY_REG_PHYCR 0x19 /* PHY Control Register */
|
||||
#define PHY_REG_10BTSCR 0x1A /* 10Base-T Status/Control Register */
|
||||
#define PHY_REG_CDCTRL1 0x1B /* CD Test Control and BIST Extens. */
|
||||
#define PHY_REG_EDCR 0x1D /* Energy Detect Control Register */
|
||||
|
||||
/* PHY Control and Status bits */
|
||||
#define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */
|
||||
#define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */
|
||||
#define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */
|
||||
#define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */
|
||||
#define PHY_AUTO_NEG 0x1000 /* Select Auto Negotiation */
|
||||
#define PHY_AUTO_NEG_DONE 0x0020 /* AutoNegotiation Complete in BMSR PHY reg */
|
||||
#define PHY_BMCR_RESET 0x8000 /* Reset bit at BMCR PHY reg */
|
||||
#define LINK_VALID_STS 0x0001 /* Link Valid Status at REG_STS PHY reg */
|
||||
#define FULL_DUP_STS 0x0004 /* Full Duplex Status at REG_STS PHY reg */
|
||||
#define SPEED_10M_STS 0x0002 /* 10Mbps Status at REG_STS PHY reg */
|
||||
|
||||
#define DP83848C_DEF_ADR 0x01 /* Default PHY device address */
|
||||
#define DP83848C_ID 0x20005C90 /* PHY Identifier (without Rev. info */
|
||||
|
||||
#define LAN8720_ID 0x0007C0F0 /* PHY Identifier */
|
||||
#define PHY_REG_SCSR 0x1F /* PHY Special Control/Status Register */
|
||||
|
||||
/* Misc */
|
||||
#define ETHERNET_RST 22 /* Reset Output for EMAC at RGU */
|
||||
#define RMII_SELECT 0x04 /* Select RMII in EMACCFG */
|
||||
|
||||
|
||||
/* Prototypes */
|
||||
void Init_EMAC(void);
|
||||
unsigned short ReadFrameBE_EMAC(void);
|
||||
void CopyToFrame_EMAC(void *Source, unsigned int Size);
|
||||
void CopyFromFrame_EMAC(void *Dest, unsigned short Size);
|
||||
void DummyReadFrame_EMAC(unsigned short Size);
|
||||
unsigned short StartReadFrame(void);
|
||||
void EndReadFrame(void);
|
||||
unsigned int CheckFrameReceived(void);
|
||||
void RequestSend(unsigned short FrameSize);
|
||||
unsigned int Rdy4Tx(void);
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,543 @@
|
|||
/*****************************************************************************
|
||||
*
|
||||
* Copyright(C) 2011, Embedded Artists AB
|
||||
* All rights reserved.
|
||||
*
|
||||
******************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* Embedded Artists AB assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. Embedded Artists AB
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. Embedded Artists AB also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Includes
|
||||
*****************************************************************************/
|
||||
|
||||
#include "lpc_types.h"
|
||||
#include "lpc43xx_scu.h"
|
||||
#include "lpc43xx_timer.h"
|
||||
#include "nand.h"
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Defines and typedefs
|
||||
*****************************************************************************/
|
||||
|
||||
#define K9F1G_CLE ((volatile uint8_t *)0x1D100000)
|
||||
#define K9F1G_ALE ((volatile uint8_t *)0x1D080000)
|
||||
#define K9F1G_DATA ((volatile uint8_t *)0x1D000000)
|
||||
|
||||
#define K9FXX_WAIT()
|
||||
|
||||
#define K9FXX_READ_1 0x00
|
||||
#define K9FXX_READ_2 0x30
|
||||
|
||||
#define K9FXX_SET_ADDR_A 0x00
|
||||
#define K9FXX_SET_ADDR_B 0x01
|
||||
#define K9FXX_SET_ADDR_C 0x50
|
||||
#define K9FXX_READ_ID 0x90
|
||||
#define K9FXX_RESET 0xff
|
||||
#define K9FXX_BLOCK_PROGRAM_1 0x80
|
||||
#define K9FXX_BLOCK_PROGRAM_2 0x10
|
||||
#define K9FXX_BLOCK_ERASE_1 0x60
|
||||
#define K9FXX_BLOCK_ERASE_2 0xd0
|
||||
#define K9FXX_READ_STATUS 0x70
|
||||
#define K9FXX_BUSY (1 << 6)
|
||||
#define K9FXX_OK (1 << 0)
|
||||
|
||||
#define ID_MARKER_CODE (0xEC)
|
||||
#define ID_SAMSUNG (0xF1)
|
||||
|
||||
#define ID_PAGE_SZ_1KB (0x00)
|
||||
#define ID_PAGE_SZ_2KB (0x01)
|
||||
#define ID_PAGE_SZ_4KB (0x02)
|
||||
#define ID_PAGE_SZ_8KB (0x03)
|
||||
|
||||
#define ID_BLOCK_SZ_64KB (0x00)
|
||||
#define ID_BLOCK_SZ_128KB (0x01)
|
||||
#define ID_BLOCK_SZ_256KB (0x02)
|
||||
#define ID_BLOCK_SZ_512KB (0x03)
|
||||
|
||||
#define ID_PAGE_SZ_1KB (0x00)
|
||||
#define ID_PAGE_SZ_2KB (0x01)
|
||||
#define ID_PAGE_SZ_4KB (0x02)
|
||||
#define ID_PAGE_SZ_8KB (0x03)
|
||||
|
||||
#define ID_REDUND_SZ_8 (0x00)
|
||||
#define ID_REDUND_SZ_16 (0x01)
|
||||
|
||||
|
||||
|
||||
/* This macro could be changed to check the ready pin */
|
||||
#define WAIT_READY() (TIM_Waitus(25))
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* External global variables
|
||||
*****************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Local variables
|
||||
*****************************************************************************/
|
||||
|
||||
static uint32_t pageSize = 0;
|
||||
static uint32_t blockSize = 0;
|
||||
static uint32_t reduntSize = 0;
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Local Functions
|
||||
*****************************************************************************/
|
||||
|
||||
static void pinConfig(void)
|
||||
{
|
||||
/* Set up EMC pin */
|
||||
scu_pinmux( 2 , 9 , MD_PLN_FAST , 3 );//A0
|
||||
scu_pinmux( 2 , 10 , MD_PLN_FAST , 3 );//A1
|
||||
scu_pinmux( 2 , 11 , MD_PLN_FAST , 3 );//A2
|
||||
scu_pinmux( 2 , 12 , MD_PLN_FAST , 3 );//A3
|
||||
scu_pinmux( 2 , 13 , MD_PLN_FAST , 3 );//A4
|
||||
scu_pinmux( 1 , 0 , MD_PLN_FAST , 2 );//A5
|
||||
scu_pinmux( 1 , 1 , MD_PLN_FAST , 2 );//A6
|
||||
scu_pinmux( 1 , 2 , MD_PLN_FAST , 2 );//A7
|
||||
scu_pinmux( 2 , 8 , MD_PLN_FAST , 3 );//A8
|
||||
scu_pinmux( 2 , 7 , MD_PLN_FAST , 3 );//A9
|
||||
scu_pinmux( 2 , 6 , MD_PLN_FAST , 2 );//A10
|
||||
scu_pinmux( 2 , 2 , MD_PLN_FAST , 2 );//A11
|
||||
scu_pinmux( 2 , 1 , MD_PLN_FAST , 2 );//A12
|
||||
scu_pinmux( 2 , 0 , MD_PLN_FAST , 2 );//A13
|
||||
scu_pinmux( 6 , 8 , MD_PLN_FAST , 1 );//A14
|
||||
scu_pinmux( 6 , 7 , MD_PLN_FAST , 1 );//A15
|
||||
scu_pinmux( 13 , 16 , MD_PLN_FAST , 2 );//A16
|
||||
scu_pinmux( 13 , 15 , MD_PLN_FAST , 2 );//A17
|
||||
scu_pinmux( 14 , 0 , MD_PLN_FAST , 3 );//A18
|
||||
scu_pinmux( 14 , 1 , MD_PLN_FAST , 3 );//A19
|
||||
scu_pinmux( 14 , 2 , MD_PLN_FAST , 3 );//A20
|
||||
scu_pinmux( 14 , 3 , MD_PLN_FAST , 3 );//A21
|
||||
scu_pinmux( 14 , 4 , MD_PLN_FAST , 3 );//A22
|
||||
scu_pinmux( 10 , 4 , MD_PLN_FAST , 3 );//A23
|
||||
|
||||
scu_pinmux( 1 , 7 , MD_PLN_FAST , 3 );//D0
|
||||
scu_pinmux( 1 , 8 , MD_PLN_FAST , 3 );//D1
|
||||
scu_pinmux( 1 , 9 , MD_PLN_FAST , 3 );//D2
|
||||
scu_pinmux( 1 , 10 , MD_PLN_FAST , 3 );//D3
|
||||
scu_pinmux( 1 , 11 , MD_PLN_FAST , 3 );//D4
|
||||
scu_pinmux( 1 , 12 , MD_PLN_FAST , 3 );//D5
|
||||
scu_pinmux( 1 , 13 , MD_PLN_FAST , 3 );//D6
|
||||
scu_pinmux( 1 , 14 , MD_PLN_FAST , 3 );//D7
|
||||
scu_pinmux( 5 , 4 , MD_PLN_FAST , 2 );//D8
|
||||
scu_pinmux( 5 , 5 , MD_PLN_FAST , 2 );//D9
|
||||
scu_pinmux( 5 , 6 , MD_PLN_FAST , 2 );//D10
|
||||
scu_pinmux( 5 , 7 , MD_PLN_FAST , 2 );//D11
|
||||
scu_pinmux( 5 , 0 , MD_PLN_FAST , 2 );//D12
|
||||
scu_pinmux( 5 , 1 , MD_PLN_FAST , 2 );//D13
|
||||
scu_pinmux( 5 , 2 , MD_PLN_FAST , 2 );//D14
|
||||
scu_pinmux( 5 , 3 , MD_PLN_FAST , 2 );//D15
|
||||
scu_pinmux( 13 , 2 , MD_PLN_FAST , 2 );//D16
|
||||
scu_pinmux( 13 , 3 , MD_PLN_FAST , 2 );//D17
|
||||
scu_pinmux( 13 , 4 , MD_PLN_FAST , 2 );//D18
|
||||
scu_pinmux( 13 , 5 , MD_PLN_FAST , 2 );//D19
|
||||
scu_pinmux( 13 , 6 , MD_PLN_FAST , 2 );//D20
|
||||
scu_pinmux( 13 , 7 , MD_PLN_FAST , 2 );//D21
|
||||
scu_pinmux( 13 , 8 , MD_PLN_FAST , 2 );//D22
|
||||
scu_pinmux( 13 , 9 , MD_PLN_FAST , 2 );//D23
|
||||
scu_pinmux( 14 , 5 , MD_PLN_FAST , 3 );//D24
|
||||
scu_pinmux( 14 , 6 , MD_PLN_FAST , 3 );//D25
|
||||
scu_pinmux( 14 , 7 , MD_PLN_FAST , 3 );//D26
|
||||
scu_pinmux( 14 , 8 , MD_PLN_FAST , 3 );//D27
|
||||
scu_pinmux( 14 , 9 , MD_PLN_FAST , 3 );//D28
|
||||
scu_pinmux( 14 , 10 , MD_PLN_FAST , 3 );//D29
|
||||
scu_pinmux( 14 , 11 , MD_PLN_FAST , 3 );//D30
|
||||
scu_pinmux( 14 , 12 , MD_PLN_FAST , 3 );//D31
|
||||
|
||||
scu_pinmux( 1 , 3 , MD_PLN_FAST , 3 );//OE
|
||||
scu_pinmux( 1 , 6 , MD_PLN_FAST , 3 );//WE
|
||||
|
||||
scu_pinmux( 1 , 4 , MD_PLN_FAST , 3 );//BLS0
|
||||
scu_pinmux( 6 , 6 , MD_PLN_FAST , 1 );//BLS1
|
||||
scu_pinmux( 13 , 13 , MD_PLN_FAST , 2 );//BLS2
|
||||
scu_pinmux( 13 , 10 , MD_PLN_FAST , 2 );//BLS3
|
||||
|
||||
scu_pinmux( 1 , 5 , MD_PLN_FAST , 3 );//CS0
|
||||
scu_pinmux( 6 , 3 , MD_PLN_FAST , 3 );//CS1
|
||||
scu_pinmux( 13 , 12 , MD_PLN_FAST , 2 );//CS2
|
||||
scu_pinmux( 13 , 11 , MD_PLN_FAST , 2 );//CS3
|
||||
}
|
||||
|
||||
|
||||
static uint32_t nandReadId(void)
|
||||
{
|
||||
uint8_t a, b, c, d;
|
||||
volatile uint8_t *pCLE;
|
||||
volatile uint8_t *pALE;
|
||||
volatile uint8_t *pData;
|
||||
|
||||
pCLE = K9F1G_CLE;
|
||||
pALE = K9F1G_ALE;
|
||||
pData = K9F1G_DATA;
|
||||
|
||||
*pCLE = K9FXX_READ_ID;
|
||||
*pALE = 0;
|
||||
|
||||
a = *pData;
|
||||
b = *pData;
|
||||
c = *pData;
|
||||
d = *pData;
|
||||
|
||||
|
||||
return (a << 24) | (b << 16) | (c << 8) | d;
|
||||
}
|
||||
|
||||
static uint8_t nandStatus(void)
|
||||
{
|
||||
uint8_t status = 0;
|
||||
volatile uint8_t *pCLE;
|
||||
volatile uint8_t *pALE;
|
||||
volatile uint8_t *pData;
|
||||
|
||||
pCLE = K9F1G_CLE;
|
||||
pALE = K9F1G_ALE;
|
||||
pData = K9F1G_DATA;
|
||||
|
||||
*pCLE = K9FXX_READ_STATUS;
|
||||
*pALE = 0;
|
||||
|
||||
status = *pData;
|
||||
|
||||
/* remove bits not used */
|
||||
return (status & 0xC1);
|
||||
}
|
||||
|
||||
static void nandWaitReady(void)
|
||||
{
|
||||
while( !(nandStatus() & (1<<6)) );
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Public Functions
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Initialize the NAND Flash
|
||||
*
|
||||
* Returns:
|
||||
* TRUE if initialization successful; otherwise FALSE
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t nand_init (void)
|
||||
{
|
||||
uint32_t nandId = 0;
|
||||
TIM_TIMERCFG_Type timerCfg;
|
||||
|
||||
// LPC_SC->PCONP |= 0x00000800;
|
||||
LPC_EMC->CONTROL = 0x00000001;
|
||||
LPC_EMC->CONFIG = 0x00000000;
|
||||
|
||||
pinConfig();
|
||||
|
||||
TIM_ConfigStructInit(TIM_TIMER_MODE, &timerCfg);
|
||||
TIM_Init(LPC_TIMER0, TIM_TIMER_MODE, &timerCfg);
|
||||
|
||||
LPC_EMC->STATICCONFIG1 = 0x00000080;
|
||||
|
||||
LPC_EMC->STATICWAITWEN1 = 0x00000002;
|
||||
LPC_EMC->STATICWAITOEN1 = 0x00000002;
|
||||
LPC_EMC->STATICWAITRD1 = 0x00000008;
|
||||
LPC_EMC->STATICWAITPAG1 = 0x0000001f;
|
||||
LPC_EMC->STATICWAITWR1 = 0x00000008;
|
||||
LPC_EMC->STATICWAITTURN1 = 0x0000000f;
|
||||
|
||||
nandId = nandReadId();
|
||||
|
||||
if ((nandId & 0xffff0000) !=
|
||||
(((uint32_t)(ID_MARKER_CODE) << 24) | ID_SAMSUNG << 16)) {
|
||||
/* unknown NAND chip */
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
pageSize = 1024 * (1 << (nandId & 0x03));
|
||||
blockSize = 64*1024 * (1 << ((nandId>>4) & 0x03));
|
||||
reduntSize = 8 * (1 << ((nandId >> 1) & 0x1));
|
||||
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Get the page size of the NAND flash
|
||||
*
|
||||
* Returns:
|
||||
* page size in bytes
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t nand_getPageSize(void)
|
||||
{
|
||||
return pageSize;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Get the block size of the NAND flash
|
||||
*
|
||||
* Returns:
|
||||
* block size in bytes
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t nand_getBlockSize(void)
|
||||
{
|
||||
return blockSize;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Get the redundant (spare) size per page
|
||||
*
|
||||
* Returns:
|
||||
* redundant/spare size in bytes
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t nand_getRedundantSize(void)
|
||||
{
|
||||
return reduntSize * (pageSize/512);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Check if a block is valid
|
||||
*
|
||||
* Returns:
|
||||
* TRUE if the block is valid; otherwise FALSE
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t nand_isBlockValid(uint32_t block)
|
||||
{
|
||||
uint32_t addr = 0;
|
||||
uint32_t page = 0;
|
||||
|
||||
volatile uint8_t *pCLE;
|
||||
volatile uint8_t *pALE;
|
||||
volatile uint8_t *pData;
|
||||
|
||||
|
||||
pCLE = K9F1G_CLE;
|
||||
pALE = K9F1G_ALE;
|
||||
pData = K9F1G_DATA;
|
||||
|
||||
if (block >= NAND_NUM_BLOCKS) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
addr = block * (blockSize/pageSize);
|
||||
|
||||
/*
|
||||
* Check page 0 and page 1 in each block. If the first byte
|
||||
* in the spare area (of either page 0 or page 1) is != 0xFF
|
||||
* the block is invalid.
|
||||
*/
|
||||
|
||||
nandWaitReady();
|
||||
|
||||
for (page = 0; page < 2; page++) {
|
||||
addr += page;
|
||||
|
||||
*pCLE = K9FXX_READ_1;
|
||||
*pALE = (uint8_t) (pageSize & 0x00FF);
|
||||
*pALE = (uint8_t)((pageSize & 0xFF00) >> 8);
|
||||
*pALE = (uint8_t)((addr & 0x00FF));
|
||||
*pALE = (uint8_t)((addr & 0xFF00) >> 8);
|
||||
*pCLE = K9FXX_READ_2;
|
||||
|
||||
WAIT_READY();
|
||||
|
||||
if (*pData != 0xFF) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Read a page from the NAND memory
|
||||
*
|
||||
* Params:
|
||||
* block - block number to read from
|
||||
* page - page withín block to read from
|
||||
* pageBuf - data is copied to this buffer. The size must be at least
|
||||
* pageSize.
|
||||
*
|
||||
* Returns:
|
||||
* TRUE if read successful; otherwise FALSE
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t nand_readPage(uint32_t block, uint32_t page, uint8_t* pageBuf)
|
||||
{
|
||||
uint32_t i = 0;
|
||||
uint32_t addr = 0;
|
||||
|
||||
volatile uint8_t *pCLE;
|
||||
volatile uint8_t *pALE;
|
||||
volatile uint8_t *pData;
|
||||
|
||||
|
||||
pCLE = K9F1G_CLE;
|
||||
pALE = K9F1G_ALE;
|
||||
pData = K9F1G_DATA;
|
||||
|
||||
if (block >= NAND_NUM_BLOCKS) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
if (page >= blockSize/pageSize) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
addr = block * (blockSize/pageSize) + page;
|
||||
|
||||
/*
|
||||
* Always reading from start of a page address.
|
||||
* This means that the column address is always 0.
|
||||
*/
|
||||
|
||||
*pCLE = K9FXX_READ_1;
|
||||
*pALE = 0;
|
||||
*pALE = 0;
|
||||
*pALE = (uint8_t)((addr & 0x00FF));
|
||||
*pALE = (uint8_t)((addr & 0xFF00) >> 8);
|
||||
*pCLE = K9FXX_READ_2;
|
||||
|
||||
WAIT_READY();
|
||||
|
||||
|
||||
for (i = 0; i < pageSize; i++) {
|
||||
*pageBuf++ = *pData;
|
||||
}
|
||||
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Write a page of data to the NAND memory
|
||||
*
|
||||
* Params:
|
||||
* block - block number to write to
|
||||
* page - page within block to write to
|
||||
* pageBuf - data is copied from this buffer. The size must be at least
|
||||
* pageSize.
|
||||
*
|
||||
* Returns:
|
||||
* TRUE if write successful; otherwise FALSE
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t nand_writePage(uint32_t block, uint32_t page, uint8_t* pageBuf)
|
||||
{
|
||||
uint32_t i = 0;
|
||||
uint32_t addr = 0;
|
||||
|
||||
volatile uint8_t *pCLE;
|
||||
volatile uint8_t *pALE;
|
||||
volatile uint8_t *pData;
|
||||
|
||||
|
||||
pCLE = K9F1G_CLE;
|
||||
pALE = K9F1G_ALE;
|
||||
pData = K9F1G_DATA;
|
||||
|
||||
if (block >= NAND_NUM_BLOCKS) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
if (page >= blockSize/pageSize) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
addr = block * (blockSize/pageSize) + page;
|
||||
|
||||
/*
|
||||
* Always writing to start of a page address.
|
||||
* This means that the column address is always 0.
|
||||
*/
|
||||
|
||||
*pCLE = K9FXX_BLOCK_PROGRAM_1;
|
||||
*pALE = 0;
|
||||
*pALE = 0;
|
||||
*pALE = (uint8_t)((addr & 0x00FF));
|
||||
*pALE = (uint8_t)((addr & 0xFF00) >> 8);
|
||||
|
||||
|
||||
for (i = 0; i < pageSize; i++) {
|
||||
*pData = *pageBuf++;
|
||||
}
|
||||
|
||||
*pCLE = K9FXX_BLOCK_PROGRAM_2;
|
||||
|
||||
TIM_Waitus(700);
|
||||
nandWaitReady();
|
||||
|
||||
return ((nandStatus() & 0x01) != 0x01);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Erase a block
|
||||
*
|
||||
* Params:
|
||||
* block - block number to erase
|
||||
*
|
||||
* Returns:
|
||||
* TRUE if eras successful; otherwise FALSE
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t nand_eraseBlock(uint32_t block)
|
||||
{
|
||||
uint32_t addr = 0;
|
||||
|
||||
volatile uint8_t *pCLE;
|
||||
volatile uint8_t *pALE;
|
||||
|
||||
pCLE = K9F1G_CLE;
|
||||
pALE = K9F1G_ALE;
|
||||
|
||||
if (block >= NAND_NUM_BLOCKS) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
addr = block * (blockSize/pageSize);
|
||||
|
||||
*pCLE = K9FXX_BLOCK_ERASE_1;
|
||||
*pALE = (uint8_t)(addr & 0x00FF);
|
||||
*pALE = (uint8_t)((addr & 0xFF00) >> 8);
|
||||
*pCLE = K9FXX_BLOCK_ERASE_2;
|
||||
|
||||
TIM_Waitus(700);
|
||||
nandWaitReady();
|
||||
|
||||
return ((nandStatus() & 0x01) != 0x01);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*****************************************************************************
|
||||
*
|
||||
* Copyright(C) 2011, Embedded Artists AB
|
||||
* All rights reserved.
|
||||
*
|
||||
******************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* Embedded Artists AB assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. Embedded Artists AB
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. Embedded Artists AB also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
*****************************************************************************/
|
||||
#ifndef __NAND_H
|
||||
#define __NAND_H
|
||||
|
||||
#define NAND_NUM_BLOCKS (1024)
|
||||
|
||||
extern uint32_t nand_init (void);
|
||||
extern uint32_t nand_getPageSize(void);
|
||||
extern uint32_t nand_getBlockSize(void);
|
||||
extern uint32_t nand_getRedundantSize(void);
|
||||
extern uint32_t nand_isBlockValid(uint32_t blockNum);
|
||||
uint32_t nand_readPage(uint32_t block, uint32_t page, uint8_t* pageBuf);
|
||||
uint32_t nand_writePage(uint32_t block, uint32_t page, uint8_t* pageBuf);
|
||||
uint32_t nand_eraseBlock(uint32_t block);
|
||||
|
||||
|
||||
#endif /* end __NAND_H */
|
||||
/****************************************************************************
|
||||
** End Of File
|
||||
*****************************************************************************/
|
||||
|
|
@ -0,0 +1,267 @@
|
|||
/*****************************************************************************
|
||||
*
|
||||
* Copyright(C) 2011, Embedded Artists AB
|
||||
* All rights reserved.
|
||||
*
|
||||
******************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* Embedded Artists AB assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. Embedded Artists AB
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. Embedded Artists AB also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Includes
|
||||
*****************************************************************************/
|
||||
|
||||
#include "lpc43xx.h"
|
||||
#include "lpc_types.h"
|
||||
#include "lpc43xx_scu.h"
|
||||
#include "lpc43xx_timer.h"
|
||||
#include "lpc43xx_cgu.h"
|
||||
#include "sdram.h"
|
||||
#include <string.h>
|
||||
|
||||
/******************************************************************************
|
||||
* Defines and typedefs
|
||||
*****************************************************************************/
|
||||
|
||||
/* SDRAM refresh time to 16 clock num */
|
||||
#define EMC_SDRAM_REFRESH(freq,time) \
|
||||
(((uint64_t)((uint64_t)time * freq)/16000000000ull)+1)
|
||||
|
||||
/******************************************************************************
|
||||
* External global variables
|
||||
*****************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Local variables
|
||||
*****************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* Local Functions
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
/*-------------------------PRIVATE FUNCTIONS------------------------------*/
|
||||
/*********************************************************************
|
||||
* @brief Calculate EMC Clock from nano second
|
||||
* @param[in] freq - frequency of EMC Clk
|
||||
* @param[in] time - nano second
|
||||
* @return None
|
||||
**********************************************************************/
|
||||
uint32_t NS2CLK(uint32_t freq, uint32_t time){
|
||||
return (((uint64_t)time*freq/1000000000));
|
||||
}
|
||||
|
||||
static void pinConfig(void)
|
||||
{
|
||||
/* Set up EMC pin */
|
||||
scu_pinmux( 2 , 9 , MD_PLN_FAST , 3 );//A0
|
||||
scu_pinmux( 2 , 10 , MD_PLN_FAST , 3 );//A1
|
||||
scu_pinmux( 2 , 11 , MD_PLN_FAST , 3 );//A2
|
||||
scu_pinmux( 2 , 12 , MD_PLN_FAST , 3 );//A3
|
||||
scu_pinmux( 2 , 13 , MD_PLN_FAST , 3 );//A4
|
||||
scu_pinmux( 1 , 0 , MD_PLN_FAST , 2 );//A5
|
||||
scu_pinmux( 1 , 1 , MD_PLN_FAST , 2 );//A6
|
||||
scu_pinmux( 1 , 2 , MD_PLN_FAST , 2 );//A7
|
||||
scu_pinmux( 2 , 8 , MD_PLN_FAST , 3 );//A8
|
||||
scu_pinmux( 2 , 7 , MD_PLN_FAST , 3 );//A9
|
||||
scu_pinmux( 2 , 6 , MD_PLN_FAST , 2 );//A10
|
||||
scu_pinmux( 2 , 2 , MD_PLN_FAST , 2 );//A11
|
||||
scu_pinmux( 2 , 1 , MD_PLN_FAST , 2 );//A12
|
||||
scu_pinmux( 2 , 0 , MD_PLN_FAST , 2 );//A13
|
||||
scu_pinmux( 6 , 8 , MD_PLN_FAST , 1 );//A14
|
||||
scu_pinmux( 6 , 7 , MD_PLN_FAST , 1 );//A15
|
||||
scu_pinmux( 13 , 16 , MD_PLN_FAST , 2 );//A16
|
||||
scu_pinmux( 13 , 15 , MD_PLN_FAST , 2 );//A17
|
||||
scu_pinmux( 14 , 0 , MD_PLN_FAST , 3 );//A18
|
||||
scu_pinmux( 14 , 1 , MD_PLN_FAST , 3 );//A19
|
||||
scu_pinmux( 14 , 2 , MD_PLN_FAST , 3 );//A20
|
||||
scu_pinmux( 14 , 3 , MD_PLN_FAST , 3 );//A21
|
||||
scu_pinmux( 14 , 4 , MD_PLN_FAST , 3 );//A22
|
||||
scu_pinmux( 10 , 4 , MD_PLN_FAST , 3 );//A23
|
||||
|
||||
scu_pinmux( 1 , 7 , MD_PLN_FAST , 3 );//D0
|
||||
scu_pinmux( 1 , 8 , MD_PLN_FAST , 3 );//D1
|
||||
scu_pinmux( 1 , 9 , MD_PLN_FAST , 3 );//D2
|
||||
scu_pinmux( 1 , 10 , MD_PLN_FAST , 3 );//D3
|
||||
scu_pinmux( 1 , 11 , MD_PLN_FAST , 3 );//D4
|
||||
scu_pinmux( 1 , 12 , MD_PLN_FAST , 3 );//D5
|
||||
scu_pinmux( 1 , 13 , MD_PLN_FAST , 3 );//D6
|
||||
scu_pinmux( 1 , 14 , MD_PLN_FAST , 3 );//D7
|
||||
scu_pinmux( 5 , 4 , MD_PLN_FAST , 2 );//D8
|
||||
scu_pinmux( 5 , 5 , MD_PLN_FAST , 2 );//D9
|
||||
scu_pinmux( 5 , 6 , MD_PLN_FAST , 2 );//D10
|
||||
scu_pinmux( 5 , 7 , MD_PLN_FAST , 2 );//D11
|
||||
scu_pinmux( 5 , 0 , MD_PLN_FAST , 2 );//D12
|
||||
scu_pinmux( 5 , 1 , MD_PLN_FAST , 2 );//D13
|
||||
scu_pinmux( 5 , 2 , MD_PLN_FAST , 2 );//D14
|
||||
scu_pinmux( 5 , 3 , MD_PLN_FAST , 2 );//D15
|
||||
scu_pinmux( 13 , 2 , MD_PLN_FAST , 2 );//D16
|
||||
scu_pinmux( 13 , 3 , MD_PLN_FAST , 2 );//D17
|
||||
scu_pinmux( 13 , 4 , MD_PLN_FAST , 2 );//D18
|
||||
scu_pinmux( 13 , 5 , MD_PLN_FAST , 2 );//D19
|
||||
scu_pinmux( 13 , 6 , MD_PLN_FAST , 2 );//D20
|
||||
scu_pinmux( 13 , 7 , MD_PLN_FAST , 2 );//D21
|
||||
scu_pinmux( 13 , 8 , MD_PLN_FAST , 2 );//D22
|
||||
scu_pinmux( 13 , 9 , MD_PLN_FAST , 2 );//D23
|
||||
scu_pinmux( 14 , 5 , MD_PLN_FAST , 3 );//D24
|
||||
scu_pinmux( 14 , 6 , MD_PLN_FAST , 3 );//D25
|
||||
scu_pinmux( 14 , 7 , MD_PLN_FAST , 3 );//D26
|
||||
scu_pinmux( 14 , 8 , MD_PLN_FAST , 3 );//D27
|
||||
scu_pinmux( 14 , 9 , MD_PLN_FAST , 3 );//D28
|
||||
scu_pinmux( 14 , 10 , MD_PLN_FAST , 3 );//D29
|
||||
scu_pinmux( 14 , 11 , MD_PLN_FAST , 3 );//D30
|
||||
scu_pinmux( 14 , 12 , MD_PLN_FAST , 3 );//D31
|
||||
|
||||
scu_pinmux( 1 , 3 , MD_PLN_FAST , 3 );//OE
|
||||
scu_pinmux( 1 , 6 , MD_PLN_FAST , 3 );//WE
|
||||
|
||||
scu_pinmux( 1 , 4 , MD_PLN_FAST , 3 );//BLS0
|
||||
scu_pinmux( 6 , 6 , MD_PLN_FAST , 1 );//BLS1
|
||||
scu_pinmux( 13 , 13 , MD_PLN_FAST , 2 );//BLS2
|
||||
scu_pinmux( 13 , 10 , MD_PLN_FAST , 2 );//BLS3
|
||||
|
||||
scu_pinmux( 1 , 5 , MD_PLN_FAST , 3 );//CS0
|
||||
scu_pinmux( 6 , 3 , MD_PLN_FAST , 3 );//CS1
|
||||
scu_pinmux( 13 , 12 , MD_PLN_FAST , 2 );//CS2
|
||||
scu_pinmux( 13 , 11 , MD_PLN_FAST , 2 );//CS3
|
||||
|
||||
scu_pinmux( 6 , 4 , MD_PLN_FAST , 3 );//CAS
|
||||
scu_pinmux( 6 , 5 , MD_PLN_FAST , 3 );//RAS
|
||||
|
||||
scu_pinmux( 6 , 9 , MD_PLN_FAST , 3 );//DYCS0
|
||||
scu_pinmux( 6 , 1 , MD_PLN_FAST , 1 );//DYCS1
|
||||
scu_pinmux( 13 , 14 , MD_PLN_FAST , 2 );//DYCS2
|
||||
scu_pinmux( 15 , 14 , MD_PLN_FAST , 3 );//DYCS3
|
||||
|
||||
scu_pinmux( 6 , 11 , MD_PLN_FAST , 3 );//CKEOUT0
|
||||
scu_pinmux( 6 , 2 , MD_PLN_FAST , 1 );//CKEOUT1
|
||||
scu_pinmux( 13 , 1 , MD_PLN_FAST , 2 );//CKEOUT2
|
||||
scu_pinmux( 14 , 15 , MD_PLN_FAST , 3 );//CKEOUT3
|
||||
|
||||
scu_pinmux( 6 , 12 , MD_PLN_FAST , 3 );//DQMOUT0
|
||||
scu_pinmux( 6 , 10 , MD_PLN_FAST , 3 );//DQMOUT1
|
||||
scu_pinmux( 13 , 0 , MD_PLN_FAST , 2 );//DQMOUT2
|
||||
scu_pinmux( 14 , 13 , MD_PLN_FAST , 3 );//DQMOUT3
|
||||
}
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Public Functions
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Description:
|
||||
* Initialize the SDRAM
|
||||
*
|
||||
*****************************************************************************/
|
||||
uint32_t sdram_init (void)
|
||||
{
|
||||
uint32_t pclk, temp;
|
||||
uint64_t tmpclk;
|
||||
|
||||
pinConfig(); //Full 32-bit Data bus, 24-bit Address
|
||||
|
||||
/* Select EMC clock-out */
|
||||
LPC_SCU->SFSCLK_0 = MD_PLN_FAST;
|
||||
LPC_SCU->SFSCLK_1 = MD_PLN_FAST;
|
||||
LPC_SCU->SFSCLK_2 = MD_PLN_FAST;
|
||||
LPC_SCU->SFSCLK_3 = MD_PLN_FAST;
|
||||
|
||||
LPC_EMC->CONTROL = 0x00000001;
|
||||
LPC_EMC->CONFIG = 0x00000000;
|
||||
LPC_EMC->DYNAMICCONFIG0 = 1<<14 | 0<<12 | 2<<9 | 1<<7; /* 256Mb, 8Mx32, 4 banks, row=12, column=9 */
|
||||
|
||||
pclk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE);
|
||||
|
||||
LPC_EMC->DYNAMICRASCAS0 = 0x00000202; /* 2 RAS, 2 CAS latency */
|
||||
LPC_EMC->DYNAMICREADCONFIG = 0x00000001; /* Command delayed strategy, using EMCCLKDELAY */
|
||||
|
||||
LPC_EMC->DYNAMICRP = NS2CLK(pclk, 20);
|
||||
LPC_EMC->DYNAMICRAS = NS2CLK(pclk, 42);
|
||||
LPC_EMC->DYNAMICSREX = NS2CLK(pclk, 63);
|
||||
LPC_EMC->DYNAMICAPR = 0x00000005;
|
||||
LPC_EMC->DYNAMICDAL = 0x00000005;
|
||||
LPC_EMC->DYNAMICWR = 2;
|
||||
LPC_EMC->DYNAMICRC = NS2CLK(pclk, 63);
|
||||
LPC_EMC->DYNAMICRFC = NS2CLK(pclk, 63);
|
||||
LPC_EMC->DYNAMICXSR = NS2CLK(pclk, 63);
|
||||
LPC_EMC->DYNAMICRRD = NS2CLK(pclk, 14);
|
||||
LPC_EMC->DYNAMICMRD = 0x00000002;
|
||||
|
||||
TIM_Waitus(100); /* wait 100ms */
|
||||
LPC_EMC->DYNAMICCONTROL = 0x00000183; /* Issue NOP command */
|
||||
|
||||
TIM_Waitus(200); /* wait 200ms */
|
||||
LPC_EMC->DYNAMICCONTROL = 0x00000103; /* Issue PALL command */
|
||||
|
||||
LPC_EMC->DYNAMICREFRESH = EMC_SDRAM_REFRESH(pclk,70); /* ( n * 16 ) -> 32 clock cycles */
|
||||
|
||||
//for(i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */
|
||||
TIM_Waitus(200); /* wait 200ms */
|
||||
|
||||
tmpclk = (uint64_t)15625*(uint64_t)pclk/1000000000/16;
|
||||
LPC_EMC->DYNAMICREFRESH = tmpclk; /* ( n * 16 ) -> 736 clock cycles -> 15.330uS at 48MHz <= 15.625uS ( 64ms / 4096 row ) */
|
||||
|
||||
LPC_EMC->DYNAMICCONTROL = 0x00000083; /* Issue MODE command */
|
||||
|
||||
//Timing for 48/60/72MHZ Bus
|
||||
temp = *((volatile uint32_t *)(SDRAM_BASE | (2<<4| 2)<<(9+2+2))); /* 4 burst, 2 CAS latency */
|
||||
temp = temp;
|
||||
LPC_EMC->DYNAMICCONTROL = 0x00000000; /* Issue NORMAL command */
|
||||
|
||||
//[re]enable buffers
|
||||
LPC_EMC->DYNAMICCONFIG0 |= 1<<19;
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
uint32_t sdram_test( void )
|
||||
{
|
||||
volatile uint32_t *wr_ptr;
|
||||
volatile uint16_t *short_wr_ptr;
|
||||
uint32_t data;
|
||||
uint32_t i, j;
|
||||
|
||||
wr_ptr = (uint32_t *)SDRAM_BASE;
|
||||
short_wr_ptr = (uint16_t *)wr_ptr;
|
||||
|
||||
/* 16 bit write */
|
||||
for (i = 0; i < SDRAM_SIZE/0x40000; i++)
|
||||
{
|
||||
for (j = 0; j < 0x100; j++)
|
||||
{
|
||||
*short_wr_ptr++ = (i + j) & 0xFFFF;
|
||||
*short_wr_ptr++ = ((i + j) + 1) & 0xFFFF;
|
||||
}
|
||||
}
|
||||
|
||||
/* Verifying */
|
||||
wr_ptr = (uint32_t *)SDRAM_BASE;
|
||||
for (i = 0; i < SDRAM_SIZE/0x40000; i++)
|
||||
{
|
||||
for (j = 0; j < 0x100; j++)
|
||||
{
|
||||
data = *wr_ptr;
|
||||
if (data != (((((i + j) + 1) & 0xFFFF) << 16) | ((i + j) & 0xFFFF)))
|
||||
{
|
||||
return 0x0;
|
||||
}
|
||||
wr_ptr++;
|
||||
}
|
||||
}
|
||||
return 0x1;
|
||||
}
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
/*****************************************************************************
|
||||
*
|
||||
* Copyright(C) 2011, Embedded Artists AB
|
||||
* All rights reserved.
|
||||
*
|
||||
******************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* Embedded Artists AB assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. Embedded Artists AB
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. Embedded Artists AB also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
*****************************************************************************/
|
||||
#ifndef __SDRAM_H
|
||||
#define __SDRAM_H
|
||||
|
||||
#define SDRAM_SIZE 0x2000000 /* 256Mbit = 32MB */
|
||||
|
||||
#define SDRAM_BASE 0x28000000 /*CS0*/
|
||||
|
||||
extern uint32_t sdram_init(void);
|
||||
extern uint32_t sdram_test(void);
|
||||
|
||||
#endif /* end __SDRAM_H */
|
||||
/****************************************************************************
|
||||
** End Of File
|
||||
*****************************************************************************/
|
||||
|
|
@ -264,7 +264,7 @@
|
|||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_timer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc11uxx|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc13uxx|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/Font5x7.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_timer.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_adc.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc11uxx|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc13uxx|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/Font5x7.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_timer.c|bsp/lpc43xx/CMSISv2p10_LPC43xx_DriverLib/src/lpc43xx_adc.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@
|
|||
</linkedResources>
|
||||
<filteredResources>
|
||||
<filter>
|
||||
<id>1382883671880</id>
|
||||
<id>1383629800659</id>
|
||||
<name></name>
|
||||
<type>26</type>
|
||||
<matcher>
|
||||
|
|
@ -102,7 +102,7 @@
|
|||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1382883671891</id>
|
||||
<id>1383629800681</id>
|
||||
<name></name>
|
||||
<type>26</type>
|
||||
<matcher>
|
||||
|
|
|
|||
|
|
@ -1,3 +1,44 @@
|
|||
/**************************************************************************/
|
||||
/*!
|
||||
@file main.c
|
||||
@author hathach (tinyusb.org)
|
||||
|
||||
@section LICENSE
|
||||
|
||||
Software License Agreement (BSD License)
|
||||
|
||||
Copyright (c) 2013, hathach (tinyusb.org)
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
3. Neither the name of the copyright holders nor the
|
||||
names of its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
|
||||
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
|
||||
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND
|
||||
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
This file is part of the tinyusb stack.
|
||||
*/
|
||||
/**************************************************************************/
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INCLUDE
|
||||
//--------------------------------------------------------------------+
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
|
@ -5,82 +46,110 @@
|
|||
#include "boards/board.h"
|
||||
#include "tusb.h"
|
||||
|
||||
#include "mscd_app.h"
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO CONSTANT TYPEDEF
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
OSAL_TASK_FUNCTION( led_blinking_task ) (void* p_task_para);
|
||||
OSAL_TASK_DEF(led_blinking_task, 128, LED_BLINKING_APP_TASK_PRIO);
|
||||
|
||||
void print_greeting(void);
|
||||
|
||||
void led_blinking_task(void * p_para);
|
||||
|
||||
void keyboard_device_app_task(void * p_para);
|
||||
void mouse_device_app_task(void * p_para);
|
||||
|
||||
int main(void)
|
||||
|
||||
#if TUSB_CFG_OS == TUSB_OS_NONE
|
||||
// like a real RTOS, this function is a main loop invoking each task in application and never return
|
||||
void os_none_start_scheduler(void)
|
||||
{
|
||||
uint32_t current_tick = system_ticks;
|
||||
|
||||
board_init();
|
||||
tusb_init();
|
||||
|
||||
print_greeting();
|
||||
while (1)
|
||||
{
|
||||
if (current_tick + 1000 < system_ticks)
|
||||
// tusb_task_runner();
|
||||
led_blinking_task(NULL);
|
||||
|
||||
#if TUSB_CFG_DEVICE_HID_KEYBOARD
|
||||
keyboard_device_app_task(NULL);
|
||||
#endif
|
||||
|
||||
#if TUSB_CFG_DEVICE_HID_MOUSE
|
||||
mouse_device_app_task(NULL);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
int main(void)
|
||||
{
|
||||
board_init();
|
||||
print_greeting();
|
||||
|
||||
tusb_init();
|
||||
|
||||
//------------- application task init -------------//
|
||||
(void) osal_task_create( OSAL_TASK_REF(led_blinking_task) );
|
||||
|
||||
msc_dev_app_init();
|
||||
|
||||
|
||||
//------------- start OS scheduler (never return) -------------//
|
||||
#if TUSB_CFG_OS == TUSB_OS_FREERTOS
|
||||
vTaskStartScheduler();
|
||||
#elif TUSB_CFG_OS == TUSB_OS_NONE
|
||||
os_none_start_scheduler();
|
||||
#elif TUSB_CFG_OS == TUSB_OS_CMSIS_RTX
|
||||
while(1)
|
||||
{
|
||||
osDelay(osWaitForever); // CMSIS RTX osKernelStart already started, main() is a task
|
||||
}
|
||||
#else
|
||||
#error need to start RTOS schduler
|
||||
#endif
|
||||
|
||||
while(1) { } // should not be reached here
|
||||
|
||||
#if TUSB_CFG_DEVICE_CDC && 0
|
||||
if (tusb_device_is_configured())
|
||||
{
|
||||
uint8_t cdc_char;
|
||||
if( tusb_cdc_getc(&cdc_char) )
|
||||
{
|
||||
current_tick += 1000;
|
||||
|
||||
led_blinking_task(NULL);
|
||||
|
||||
#if TUSB_CFG_DEVICE_HID_KEYBOARD
|
||||
keyboard_device_app_task(NULL);
|
||||
#endif
|
||||
|
||||
#if TUSB_CFG_DEVICE_HID_MOUSE
|
||||
mouse_device_app_task(NULL);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if TUSB_CFG_DEVICE_CDC && 0
|
||||
if (tusb_device_is_configured())
|
||||
{
|
||||
uint8_t cdc_char;
|
||||
if( tusb_cdc_getc(&cdc_char) )
|
||||
switch (cdc_char)
|
||||
{
|
||||
switch (cdc_char)
|
||||
#ifdef TUSB_CFG_DEVICE_HID_KEYBOARD
|
||||
case '1' :
|
||||
{
|
||||
#ifdef TUSB_CFG_DEVICE_HID_KEYBOARD
|
||||
case '1' :
|
||||
{
|
||||
uint8_t keys[6] = {HID_USAGE_KEYBOARD_aA + 'e' - 'a'};
|
||||
tusbd_hid_keyboard_send_report(0x08, keys, 1); // windows + E --> open explorer
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef TUSB_CFG_DEVICE_HID_MOUSE
|
||||
case '2' :
|
||||
tusb_hid_mouse_send(0, 10, 10);
|
||||
break;
|
||||
#endif
|
||||
|
||||
default :
|
||||
cdc_char = toupper(cdc_char);
|
||||
tusb_cdc_putc(cdc_char);
|
||||
break;
|
||||
|
||||
uint8_t keys[6] = {HID_USAGE_KEYBOARD_aA + 'e' - 'a'};
|
||||
tusbd_hid_keyboard_send_report(0x08, keys, 1); // windows + E --> open explorer
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef TUSB_CFG_DEVICE_HID_MOUSE
|
||||
case '2' :
|
||||
tusb_hid_mouse_send(0, 10, 10);
|
||||
break;
|
||||
#endif
|
||||
|
||||
default :
|
||||
cdc_char = toupper(cdc_char);
|
||||
tusb_cdc_putc(cdc_char);
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void led_blinking_task(void * p_para)
|
||||
{
|
||||
static uint32_t led_on_mask = 0;
|
||||
|
||||
board_leds(led_on_mask, 1 - led_on_mask);
|
||||
led_on_mask = 1 - led_on_mask; // toggle
|
||||
}
|
||||
|
||||
#if TUSB_CFG_DEVICE_HID_KEYBOARD
|
||||
hid_keyboard_report_t keyboard_report TUSB_CFG_ATTR_USBRAM;
|
||||
void keyboard_device_app_task(void * p_para)
|
||||
|
|
@ -119,16 +188,39 @@ void mouse_device_app_task(void * p_para)
|
|||
}
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// BLINKING TASK
|
||||
//--------------------------------------------------------------------+
|
||||
OSAL_TASK_FUNCTION( led_blinking_task ) (void* p_task_para)
|
||||
{
|
||||
static uint32_t led_on_mask = 0;
|
||||
|
||||
OSAL_TASK_LOOP_BEGIN
|
||||
|
||||
osal_task_delay(1000);
|
||||
|
||||
board_leds(led_on_mask, 1 - led_on_mask);
|
||||
led_on_mask = 1 - led_on_mask; // toggle
|
||||
|
||||
OSAL_TASK_LOOP_END
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// HELPER FUNCTION
|
||||
//--------------------------------------------------------------------+
|
||||
void print_greeting(void)
|
||||
{
|
||||
printf("\r\n\
|
||||
--------------------------------------------------------------------\r\n\
|
||||
- Device Demo (a tinyusb example)\r\n\
|
||||
- if you find any bugs or get any questions, feel free to file an\r\n\
|
||||
- issue at https://github.com/hathach/tinyusb\r\n\
|
||||
--------------------------------------------------------------------\r\n\r\n"
|
||||
printf("\n\
|
||||
--------------------------------------------------------------------\n\
|
||||
- Device Demo (a tinyusb example)\n\
|
||||
- if you find any bugs or get any questions, feel free to file an\n\
|
||||
- issue at https://github.com/hathach/tinyusb\n\
|
||||
--------------------------------------------------------------------\n\n"
|
||||
);
|
||||
|
||||
puts("This demo supports the following classes");
|
||||
if (TUSB_CFG_DEVICE_HID_MOUSE ) puts(" - HID Mouse");
|
||||
if (TUSB_CFG_DEVICE_HID_KEYBOARD ) puts(" - HID Keyboard");
|
||||
if (TUSB_CFG_DEVICE_MSC ) puts(" - Mass Storage");
|
||||
if (TUSB_CFG_DEVICE_CDC ) puts(" - Communication Device Class");
|
||||
}
|
||||
|
|
|
|||
|
|
@ -48,10 +48,40 @@
|
|||
//--------------------------------------------------------------------+
|
||||
enum
|
||||
{
|
||||
DISK_CAPACITY = 16 * 1024 * 1024,
|
||||
DISK_BLOCK_NUM = 16,
|
||||
DISK_BLOCK_SIZE = 512
|
||||
};
|
||||
|
||||
typedef ATTR_PACKED_STRUCT(struct) {
|
||||
//------------- common -------------//
|
||||
uint8_t jump_code[3] ; ///< Assembly instruction to jump to boot code.
|
||||
uint8_t oem_name[8] ; ///< OEM Name in ASCII.
|
||||
uint16_t byte_per_sector ; ///< Bytes per sector. Allowed values include 512, 1024, 2048, and 4096.
|
||||
uint8_t sector_per_cluster ; ///< Sectors per cluster (data unit). Allowed values are powers of 2, but the cluster size must be 32KB or smaller.
|
||||
uint16_t reserved_sectors ; ///< Size in sectors of the reserved area.
|
||||
uint8_t fat_num ; ///< Number of FATs. Typically two for redundancy, but according to Microsoft it can be one for some small storage devices.
|
||||
uint16_t fat12_root_entry_num ; ///< Maximum number of files in the root directory for FAT12 and FAT16. This is 0 for FAT32 and typically 512 for FAT16.
|
||||
uint16_t fat12_sector_num_16 ; ///< 16-bit number of sectors in file system. If the number of sectors is larger than can be represented in this 2-byte value, a 4-byte value exists later in the data structure and this should be 0.
|
||||
uint8_t media_type ; ///< 0xf8 should be used for fixed disks and 0xf0 for removable.
|
||||
uint16_t sector_per_fat ; ///< 16-bit size in sectors of each FAT for FAT12 and FAT16. For FAT32, this field is 0.
|
||||
uint16_t sector_per_track ; ///< Sectors per track of storage device.
|
||||
uint16_t head_num ; ///< Number of heads in storage device.
|
||||
uint32_t hidden_sectors ; ///< Number of sectors before the start of partition.
|
||||
uint32_t sector_num_32 ; ///< 32-bit value of number of sectors in file system. Either this value or the 16-bit value above must be 0.
|
||||
|
||||
//------------- FAT32 -------------//
|
||||
uint8_t drive_number ; ///< Physical drive number (0x00 for (first) removable media, 0x80 for (first) fixed disk
|
||||
uint8_t reserved ;
|
||||
uint8_t extended_boot_signature ; ///< should be 0x29
|
||||
uint32_t volume_serial_number ; ///< Volume serial number, which some versions of Windows will calculate based on the creation date and time.
|
||||
uint8_t volume_label[11] ;
|
||||
uint8_t filesystem_type[8] ; ///< File system type label in ASCII, padded with blank (0x20). Standard values include "FAT," "FAT12," and "FAT16," but nothing is required.
|
||||
uint8_t reserved2[448] ;
|
||||
uint16_t fat_signature ; ///< Signature value (0xAA55).
|
||||
}fat16_boot_sector_t;
|
||||
|
||||
STATIC_ASSERT(sizeof(fat16_boot_sector_t) == 512, "size is not correct");
|
||||
|
||||
static scsi_inquiry_data_t mscd_inquiry_data TUSB_CFG_ATTR_USBRAM =
|
||||
{
|
||||
.is_removable = 1,
|
||||
|
|
@ -64,8 +94,8 @@ static scsi_inquiry_data_t mscd_inquiry_data TUSB_CFG_ATTR_USBRAM =
|
|||
|
||||
static scsi_read_capacity10_data_t mscd_read_capacity10_data TUSB_CFG_ATTR_USBRAM =
|
||||
{
|
||||
.last_lba = DISK_CAPACITY / DISK_BLOCK_SIZE, // read capacity
|
||||
.block_size = DISK_BLOCK_SIZE
|
||||
.last_lba = __le2be(DISK_BLOCK_NUM-1), // read capacity
|
||||
.block_size = __le2be(DISK_BLOCK_SIZE)
|
||||
};
|
||||
|
||||
static scsi_sense_fixed_data_t mscd_sense_data TUSB_CFG_ATTR_USBRAM =
|
||||
|
|
@ -78,18 +108,36 @@ static scsi_sense_fixed_data_t mscd_sense_data TUSB_CFG_ATTR_USBRAM =
|
|||
static scsi_read_format_capacity_data_t mscd_format_capacity_data TUSB_CFG_ATTR_USBRAM =
|
||||
{
|
||||
.list_length = 8,
|
||||
.block_num = DISK_CAPACITY / DISK_BLOCK_SIZE, // write capacity
|
||||
.block_num = __le2be(DISK_BLOCK_NUM), // write capacity
|
||||
.descriptor_type = 2, // TODO formatted media, refractor to const
|
||||
.block_size = DISK_BLOCK_SIZE
|
||||
.block_size_u16 = __h2be_16(DISK_BLOCK_SIZE)
|
||||
};
|
||||
|
||||
static scsi_mode_parameters_t msc_dev_mode_para TUSB_CFG_ATTR_USBRAM =
|
||||
{
|
||||
.mode_data_length = 3,
|
||||
.medium_type = 0,
|
||||
.device_specific_para = 0,
|
||||
.block_descriptor_length = 0
|
||||
};
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
uint8_t mscd_app_ramdisk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] TUSB_CFG_ATTR_USBRAM;
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// tinyusb callback (ISR context)
|
||||
//--------------------------------------------------------------------+
|
||||
static uint16_t read10(uint8_t coreid, uint8_t lun, scsi_read10_t* p_read10, void** pp_buffer)
|
||||
{
|
||||
uint8_t block_count = __be2h_16(p_read10->block_count);
|
||||
|
||||
(*pp_buffer) = &mscd_app_ramdisk[ __be2le(p_read10->lba)];
|
||||
|
||||
return block_count*DISK_BLOCK_SIZE;
|
||||
}
|
||||
|
||||
msc_csw_status_t tusbd_msc_scsi_received_isr (uint8_t coreid, uint8_t lun, uint8_t scsi_cmd[16], void ** pp_buffer, uint16_t* p_length)
|
||||
{
|
||||
switch (scsi_cmd[0])
|
||||
|
|
@ -109,11 +157,33 @@ msc_csw_status_t tusbd_msc_scsi_received_isr (uint8_t coreid, uint8_t lun, uint8
|
|||
(*p_length) = sizeof(scsi_sense_fixed_data_t);
|
||||
break;
|
||||
|
||||
case SCSI_CMD_READ_FORMAT_CAPACITY:
|
||||
case SCSI_CMD_READ_FORMAT_CAPACITY:
|
||||
(*pp_buffer) = &mscd_format_capacity_data;
|
||||
(*p_length) = sizeof(scsi_read_format_capacity_data_t);
|
||||
break;
|
||||
|
||||
case SCSI_CMD_MODE_SENSE_6:
|
||||
(*pp_buffer) = &msc_dev_mode_para;
|
||||
(*p_length) = sizeof(msc_dev_mode_para);
|
||||
break;
|
||||
|
||||
case SCSI_CMD_TEST_UNIT_READY:
|
||||
(*pp_buffer) = NULL;
|
||||
(*p_length) = 0;
|
||||
break;
|
||||
|
||||
case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
|
||||
(*pp_buffer) = NULL;
|
||||
(*p_length) = 0;
|
||||
break;
|
||||
|
||||
case SCSI_CMD_READ_10:
|
||||
(*p_length) = read10(coreid, lun, (scsi_read10_t*) scsi_cmd, pp_buffer);
|
||||
break;
|
||||
|
||||
case SCSI_CMD_WRITE_10:
|
||||
break;
|
||||
|
||||
default: return MSC_CSW_STATUS_FAILED;
|
||||
}
|
||||
|
||||
|
|
@ -123,6 +193,30 @@ msc_csw_status_t tusbd_msc_scsi_received_isr (uint8_t coreid, uint8_t lun, uint8
|
|||
//--------------------------------------------------------------------+
|
||||
// IMPLEMENTATION
|
||||
//--------------------------------------------------------------------+
|
||||
void msc_dev_app_init (void)
|
||||
{
|
||||
fat16_boot_sector_t* p_boot_fat = (fat16_boot_sector_t* ) &mscd_app_ramdisk[0];
|
||||
memclr_(p_boot_fat, sizeof(fat16_boot_sector_t));
|
||||
|
||||
memcpy(p_boot_fat->jump_code, "\xEB\x3C\x90", 3);
|
||||
memcpy(p_boot_fat->oem_name, "MSDOS5.0", 8);
|
||||
p_boot_fat->byte_per_sector = DISK_BLOCK_SIZE;
|
||||
p_boot_fat->sector_per_cluster = 1;
|
||||
p_boot_fat->reserved_sectors = 1;
|
||||
p_boot_fat->fat_num = 1;
|
||||
p_boot_fat->fat12_root_entry_num = 16;
|
||||
p_boot_fat->fat12_sector_num_16 = DISK_BLOCK_NUM;
|
||||
p_boot_fat->media_type = 0xf8; // fixed disk
|
||||
p_boot_fat->sector_per_fat = 1;
|
||||
p_boot_fat->sector_per_track = 1;
|
||||
p_boot_fat->head_num = 1;
|
||||
p_boot_fat->hidden_sectors = 0;
|
||||
|
||||
p_boot_fat->drive_number = 0x80;
|
||||
p_boot_fat->extended_boot_signature = 0x29;
|
||||
p_boot_fat->volume_serial_number = 0x1234;
|
||||
memcpy(p_boot_fat->volume_label , "tinyusb msc", 11);
|
||||
memcpy(p_boot_fat->filesystem_type, "FAT12 ", 8);
|
||||
p_boot_fat->fat_signature = 0xAA55;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -55,6 +55,14 @@
|
|||
|
||||
#if TUSB_CFG_DEVICE_MSC
|
||||
|
||||
void msc_dev_app_init(void);
|
||||
OSAL_TASK_FUNCTION( msc_dev_app_task ) (void* p_task_para);
|
||||
|
||||
#else
|
||||
|
||||
#define msc_dev_app_init()
|
||||
#define msc_dev_app_task(x)
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
|
|
@ -1,5 +1,7 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<?fileVersion 4.0.0?>
|
||||
|
||||
<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="com.crt.advproject.config.exe.debug.1239969983">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.1239969983" moduleId="org.eclipse.cdt.core.settings" name="Board NGX4330">
|
||||
|
|
@ -80,7 +82,7 @@
|
|||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_timer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
|
|
@ -88,6 +90,7 @@
|
|||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="scannerConfiguration"/>
|
||||
</cconfiguration>
|
||||
<cconfiguration id="com.crt.advproject.config.exe.debug.1239969983.636406670">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.1239969983.636406670" moduleId="org.eclipse.cdt.core.settings" name="Board EA4357">
|
||||
|
|
@ -175,7 +178,7 @@
|
|||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_timer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
|
|
@ -183,6 +186,7 @@
|
|||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="scannerConfiguration"/>
|
||||
</cconfiguration>
|
||||
<cconfiguration id="com.crt.advproject.config.exe.debug.1239969983.636406670.2112314850">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.1239969983.636406670.2112314850" moduleId="org.eclipse.cdt.core.settings" name="Board MCB4300">
|
||||
|
|
@ -266,7 +270,7 @@
|
|||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_timer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
|
|
@ -274,6 +278,7 @@
|
|||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="scannerConfiguration"/>
|
||||
</cconfiguration>
|
||||
<cconfiguration id="com.crt.advproject.config.exe.debug.1239969983.636406670.533943402">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.1239969983.636406670.533943402" moduleId="org.eclipse.cdt.core.settings" name="Board Hitex4350">
|
||||
|
|
@ -357,7 +362,7 @@
|
|||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_timer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/boards/embedded_artists/oem_base_board|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/boards/embedded_artists/oem_base_board|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
|
|
@ -365,6 +370,7 @@
|
|||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="scannerConfiguration"/>
|
||||
</cconfiguration>
|
||||
<cconfiguration id="com.crt.advproject.config.exe.debug.1239969983.131108573">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.1239969983.131108573" moduleId="org.eclipse.cdt.core.settings" name="Board LPC4357USB">
|
||||
|
|
@ -445,7 +451,7 @@
|
|||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_timer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
<entry excluding="bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdmmc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sdif.c|lwip|lwip/lpclwip/arch/lpc17xx_40xx_systick_arch.c|lwip/lpclwip/arch/lpc17xx_40xx_emac.c|lwip/contrib|lwip/lwip/src/core/snmp|lwip/lwip/src/netif/slipif.c|lwip/lwip/src/netif/ethernetif.c|lwip/lwip/src/netif/ppp|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/sdio.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_ssp.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_pwr.c|bsp/lpc175x_6x|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_wwdt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_i2s.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_sct.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rit.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rgu.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_qei.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_rtc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_mcpwm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_lcd.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_gpdma.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/debug_frmwrk.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_evrt.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_emc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_dac.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_can.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_atimer.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/lpc43xx_adc.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/LCDTerm.c|bsp/lpc43xx/CMSIS_LPC43xx_DriverLib/src/Font5x7.c|bsp/boards/embedded_artists/oem_base_board|bsp/boards/embedded_artists/oem_base_board/acc.c|bsp/boards/embedded_artists/oem_base_board/base_eeprom.c|ngx|bsp/boards/embedded_artists/oem_base_board/joystick.c|bsp/lpc11uxx|bsp/boards/embedded_artists/oem_base_board/lm75a.c|bsp/boards/embedded_artists/oem_base_board/uda1380.c|bsp/lpc13uxx|bsp/boards/embedded_artists/oem_base_board/memreg.c|bsp/boards/embedded_artists/oem_base_board/norflash.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
|
|
@ -453,6 +459,7 @@
|
|||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="scannerConfiguration"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
|
|
|
|||
|
|
@ -56,14 +56,14 @@
|
|||
#include "cdc_serial_app.h"
|
||||
#include "rndis_app.h"
|
||||
|
||||
#if defined(__CODE_RED) // TODO to be removed
|
||||
#include <cr_section_macros.h>
|
||||
#include <NXP/crp.h>
|
||||
// Variable to store CRP value in. Will be placed automatically
|
||||
// by the linker when "Enable Code Read Protect" selected.
|
||||
// See crp.h header for more information
|
||||
__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;
|
||||
#endif
|
||||
//#if defined(__CODE_RED) // TODO to be removed
|
||||
// #include <cr_section_macros.h>
|
||||
// #include <NXP/crp.h>
|
||||
// // Variable to store CRP value in. Will be placed automatically
|
||||
// // by the linker when "Enable Code Read Protect" selected.
|
||||
// // See crp.h header for more information
|
||||
// __CRP const unsigned int CRP_WORD = CRP_NO_CRP ;
|
||||
//#endif
|
||||
|
||||
#if 0
|
||||
#include "lwip/opt.h"
|
||||
|
|
@ -188,7 +188,7 @@ void print_greeting(void)
|
|||
--------------------------------------------------------------------\n\n"
|
||||
);
|
||||
|
||||
puts("This demo support the following classes");
|
||||
puts("This demo supports the following classes");
|
||||
if (TUSB_CFG_HOST_HUB ) puts(" - Hub (1 level only)");
|
||||
if (TUSB_CFG_HOST_HID_MOUSE ) puts(" - HID Mouse");
|
||||
if (TUSB_CFG_HOST_HID_KEYBOARD ) puts(" - HID Keyboard");
|
||||
|
|
|
|||
|
|
@ -121,13 +121,16 @@ STATIC_ASSERT(sizeof(msc_cmd_status_wrapper_t) == 13, "size is not correct");
|
|||
|
||||
/// SCSI Command Operation Code
|
||||
typedef enum {
|
||||
SCSI_CMD_TEST_UNIT_READY = 0x00, ///< The SCSI Test Unit Ready command is used to determine if a device is ready to transfer data (read/write), i.e. if a disk has spun up, if a tape is loaded and ready etc. The device does not perform a self-test operation.
|
||||
SCSI_CMD_INQUIRY = 0x12, ///< The SCSI Inquiry command is used to obtain basic information from a target device.
|
||||
SCSI_CMD_READ_CAPACITY_10 = 0x25, ///< The SCSI Read Capacity command is used to obtain data capacity information from a target device.
|
||||
SCSI_CMD_REQUEST_SENSE = 0x03, ///< The SCSI Request Sense command is part of the SCSI computer protocol standard. This command is used to obtain sense data -- status/error information -- from a target device.
|
||||
SCSI_CMD_READ_FORMAT_CAPACITY = 0x23, ///< The command allows the Host to request a list of the possible format capacities for an installed writable media. This command also has the capability to report the writable capacity for a media when it is installed
|
||||
SCSI_CMD_READ_10 = 0x28, ///< The READ (10) command requests that the device server read the specified logical block(s) and transfer them to the data-in buffer.
|
||||
SCSI_CMD_WRITE_10 = 0x2A, ///< The WRITE (10) command requests thatthe device server transfer the specified logical block(s) from the data-out buffer and write them.
|
||||
SCSI_CMD_TEST_UNIT_READY = 0x00, ///< The SCSI Test Unit Ready command is used to determine if a device is ready to transfer data (read/write), i.e. if a disk has spun up, if a tape is loaded and ready etc. The device does not perform a self-test operation.
|
||||
SCSI_CMD_INQUIRY = 0x12, ///< The SCSI Inquiry command is used to obtain basic information from a target device.
|
||||
SCSI_CMD_MODE_SELECT_6 = 0x15, ///< provides a means for the application client to specify medium, logical unit, or peripheral device parameters to the device server. Device servers that implement the MODE SELECT(6) command shall also implement the MODE SENSE(6) command. Application clients should issue MODE SENSE(6) prior to each MODE SELECT(6) to determine supported mode pages, page lengths, and other parameters.
|
||||
SCSI_CMD_MODE_SENSE_6 = 0x1A, ///< provides a means for a device server to report parameters to an application client. It is a complementary command to the MODE SELECT(6) command. Device servers that implement the MODE SENSE(6) command shall also implement the MODE SELECT(6) command.
|
||||
SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL = 0x1E,
|
||||
SCSI_CMD_READ_CAPACITY_10 = 0x25, ///< The SCSI Read Capacity command is used to obtain data capacity information from a target device.
|
||||
SCSI_CMD_REQUEST_SENSE = 0x03, ///< The SCSI Request Sense command is part of the SCSI computer protocol standard. This command is used to obtain sense data -- status/error information -- from a target device.
|
||||
SCSI_CMD_READ_FORMAT_CAPACITY = 0x23, ///< The command allows the Host to request a list of the possible format capacities for an installed writable media. This command also has the capability to report the writable capacity for a media when it is installed
|
||||
SCSI_CMD_READ_10 = 0x28, ///< The READ (10) command requests that the device server read the specified logical block(s) and transfer them to the data-in buffer.
|
||||
SCSI_CMD_WRITE_10 = 0x2A, ///< The WRITE (10) command requests thatthe device server transfer the specified logical block(s) from the data-out buffer and write them.
|
||||
}scsi_cmd_type_t;
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
|
|
@ -228,6 +231,41 @@ typedef ATTR_PACKED_STRUCT(struct) {
|
|||
|
||||
STATIC_ASSERT(sizeof(scsi_sense_fixed_data_t) == 18, "size is not correct");
|
||||
|
||||
typedef ATTR_PACKED_STRUCT(struct) {
|
||||
uint8_t cmd_code ; ///< SCSI OpCode for \ref SCSI_CMD_MODE_SENSE_6
|
||||
|
||||
uint8_t : 3;
|
||||
uint8_t disable_block_descriptor : 1;
|
||||
uint8_t : 0;
|
||||
|
||||
uint8_t page_code : 6;
|
||||
uint8_t page_control : 2;
|
||||
|
||||
uint8_t subpage_code;
|
||||
uint8_t alloc_length;
|
||||
uint8_t control;
|
||||
} scsi_mode_sense_6_t;
|
||||
|
||||
STATIC_ASSERT( sizeof(scsi_mode_sense_6_t) == 6, "size is not correct");
|
||||
|
||||
typedef ATTR_PACKED_STRUCT(struct) {
|
||||
uint8_t mode_data_length;
|
||||
uint8_t medium_type;
|
||||
uint8_t device_specific_para;
|
||||
uint8_t block_descriptor_length;
|
||||
} scsi_mode_parameters_t;
|
||||
|
||||
STATIC_ASSERT( sizeof(scsi_mode_parameters_t) == 4, "size is not correct");
|
||||
|
||||
typedef ATTR_PACKED_STRUCT(struct) {
|
||||
uint8_t cmd_code; ///< SCSI OpCode for \ref SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL
|
||||
uint8_t reserved[3];
|
||||
uint8_t prohibit_removal;
|
||||
uint8_t control;
|
||||
} scsi_prevent_allow_medium_removal_t;
|
||||
|
||||
STATIC_ASSERT( sizeof(scsi_prevent_allow_medium_removal_t) == 6, "size is not correct");
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// SCSI MMC
|
||||
//--------------------------------------------------------------------+
|
||||
|
|
@ -249,7 +287,7 @@ typedef ATTR_PACKED_STRUCT(struct){
|
|||
uint8_t descriptor_type; // 00: reserved, 01 unformatted media , 10 Formatted media, 11 No media present
|
||||
|
||||
uint8_t reserved2;
|
||||
uint16_t block_size;
|
||||
uint16_t block_size_u16;
|
||||
|
||||
} scsi_read_format_capacity_data_t;
|
||||
|
||||
|
|
|
|||
|
|
@ -151,14 +151,17 @@ void mscd_isr(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_b
|
|||
ASSERT( p_msc->cbw.xfer_bytes >= actual_length, VOID_RETURN );
|
||||
|
||||
//------------- Data Phase -------------//
|
||||
if ( BIT_TEST_(p_msc->cbw.dir, 7) && p_buffer == NULL )
|
||||
{ // application does not provide data to response --> possibly unsupported SCSI command
|
||||
ASSERT( TUSB_ERROR_NONE == dcd_pipe_stall(p_msc->edpt_in), VOID_RETURN );
|
||||
p_msc->csw.status = MSC_CSW_STATUS_FAILED;
|
||||
}else
|
||||
if ( p_msc->cbw.xfer_bytes )
|
||||
{
|
||||
ASSERT( dcd_pipe_queue_xfer( BIT_TEST_(p_msc->cbw.dir, 7) ? p_msc->edpt_in : p_msc->edpt_out,
|
||||
p_buffer, actual_length) == TUSB_ERROR_NONE, VOID_RETURN);
|
||||
if ( p_buffer == NULL || actual_length == 0 )
|
||||
{ // application does not provide data to response --> possibly unsupported SCSI command
|
||||
ASSERT( TUSB_ERROR_NONE == dcd_pipe_stall(p_msc->edpt_in), VOID_RETURN );
|
||||
p_msc->csw.status = MSC_CSW_STATUS_FAILED;
|
||||
}else
|
||||
{
|
||||
ASSERT( dcd_pipe_queue_xfer( BIT_TEST_(p_msc->cbw.dir, 7) ? p_msc->edpt_in : p_msc->edpt_out,
|
||||
p_buffer, actual_length) == TUSB_ERROR_NONE, VOID_RETURN);
|
||||
}
|
||||
}
|
||||
|
||||
//------------- Status Phase -------------//
|
||||
|
|
|
|||
|
|
@ -105,6 +105,9 @@
|
|||
#define U32_TO_U8S_BE(u32) U32_B1_U8(u32), U32_B2_U8(u32), U32_B3_U8(u32), U32_B4_U8(u32)
|
||||
#define U32_TO_U8S_LE(u32) U32_B4_U8(u32), U32_B3_U8(u32), U32_B2_U8(u32), U32_B1_U8(u32)
|
||||
|
||||
#define __h2be_16(u16) ((uint16_t) ((U16_LOW_U8(u16) << 8) | U16_HIGH_U8(u16)) ) // TODO refractor later
|
||||
#define __be2h_16(u16) __h2be_16(u16)
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INLINE FUNCTION
|
||||
//--------------------------------------------------------------------+
|
||||
|
|
|
|||
Loading…
Reference in New Issue