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bsp lpc11

This commit is contained in:
hathach 2023-03-19 17:19:33 +07:00
parent 1867ba0bc1
commit 80be1aa13d
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GPG Key ID: F5D50C6D51D17CBA
10 changed files with 88 additions and 91 deletions
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2
.github/workflows/build_arm.yml vendored
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@ -35,7 +35,7 @@ jobs:
- 'broadcom_32bit'
- 'imxrt'
- 'kinetis_k32 kinetis_kl'
- 'lpc15 lpc18'
- 'lpc11 lpc15 lpc18'
- 'lpc54 lpc55'
- 'mm32 msp432e4'
- 'nrf'

24
hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk Normal file
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@ -0,0 +1,24 @@
MCU = 11uxx
MCU_DRV = 11xx
CFLAGS += \
-DCORE_M0 \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_EXAMPLE_VIDEO_READONLY \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))'
# mcu driver cause following warnings
CFLAGS += \
-Wno-error=strict-prototypes \
-Wno-error=unused-parameter \
-Wno-error=redundant-decls
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/lpc11u37.ld
# For flash-jlink target
JLINK_DEVICE = LPC11U37/401
PYOCD_TARGET = lpc11u37
# flash using pyocd
flash: flash-pyocd

0
hw/bsp/lpcxpresso11u37/lpc11u37.ld → hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld
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2
hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c → hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c
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@ -25,7 +25,7 @@
*/
#include "chip.h"
#include "../board.h"
#include "bsp/board.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler

18
hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk Normal file
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@ -0,0 +1,18 @@
MCU = 11u6x
MCU_DRV = 11u6x
CFLAGS += \
-DCORE_M0PLUS \
-D__VTOR_PRESENT=0 \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/lpc11u68.ld
# For flash-jlink target
JLINK_DEVICE = LPC11U68
PYOCD_TARGET = lpc11u68
# flash using pyocd
flash: flash-pyocd

0
hw/bsp/lpcxpresso11u68/lpc11u68.ld → hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld
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2
hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c → hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c
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@ -25,7 +25,7 @@
*/
#include "chip.h"
#include "../board.h"
#include "bsp/board.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler

43
hw/bsp/lpc11/family.mk Normal file
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@ -0,0 +1,43 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU)
include $(TOP)/$(BOARD_PATH)/board.mk
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0plus \
-nostdlib \
-D__USE_LPCOPEN \
-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
SRC_C += \
src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
$(MCU_DIR)/../gcc/cr_startup_lpc$(MCU_DRV).c \
$(MCU_DIR)/src/chip_$(MCU_DRV).c \
$(MCU_DIR)/src/clock_$(MCU_DRV).c \
$(MCU_DIR)/src/iocon_$(MCU_DRV).c \
$(MCU_DIR)/src/sysinit_$(MCU_DRV).c
ifeq ($(MCU),11u6x)
SRC_C += \
$(MCU_DIR)/src/gpio_$(MCU_DRV).c \
$(MCU_DIR)/src/syscon_$(MCU_DRV).c \
else
SRC_C += \
$(MCU_DIR)/src/gpio_$(MCU_DRV)_1.c \
$(MCU_DIR)/src/sysctl_$(MCU_DRV).c
endif
INC += \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
# For flash-jlink target
JLINK_DEVICE = LPC11U68

46
hw/bsp/lpcxpresso11u37/board.mk
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@ -1,46 +0,0 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0 \
-nostdlib \
-DCORE_M0 \
-D__USE_LPCOPEN \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_EXAMPLE_VIDEO_READONLY \
-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=redundant-decls
MCU_DIR = hw/mcu/nxp/lpcopen/lpc11uxx/lpc_chip_11uxx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/lpc11u37.ld
SRC_C += \
src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
$(MCU_DIR)/../gcc/cr_startup_lpc11xx.c \
$(MCU_DIR)/src/chip_11xx.c \
$(MCU_DIR)/src/clock_11xx.c \
$(MCU_DIR)/src/gpio_11xx_1.c \
$(MCU_DIR)/src/iocon_11xx.c \
$(MCU_DIR)/src/sysctl_11xx.c \
$(MCU_DIR)/src/sysinit_11xx.c
INC += \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
# For flash-jlink target
JLINK_DEVICE = LPC11U37/401
# flash using pyocd
flash: $(BUILD)/$(PROJECT).hex
pyocd flash -t lpc11u37 $<

42
hw/bsp/lpcxpresso11u68/board.mk
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@ -1,42 +0,0 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0plus \
-nostdlib \
-DCORE_M0PLUS \
-D__VTOR_PRESENT=0 \
-D__USE_LPCOPEN \
-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
MCU_DIR = hw/mcu/nxp/lpcopen/lpc11u6x/lpc_chip_11u6x
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/lpc11u68.ld
SRC_C += \
src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
$(MCU_DIR)/../gcc/cr_startup_lpc11u6x.c \
$(MCU_DIR)/src/chip_11u6x.c \
$(MCU_DIR)/src/clock_11u6x.c \
$(MCU_DIR)/src/gpio_11u6x.c \
$(MCU_DIR)/src/iocon_11u6x.c \
$(MCU_DIR)/src/syscon_11u6x.c \
$(MCU_DIR)/src/sysinit_11u6x.c
INC += \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
# For flash-jlink target
JLINK_DEVICE = LPC11U68
# flash using pyocd
flash: $(BUILD)/$(PROJECT).hex
pyocd flash -t lpc11u68 $<