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Merge pull request #2146 from tannewt/host_cache_align 

Fix host buffer alignment setting
This commit is contained in:
Ha Thach 2023-07-18 16:39:48 +07:00 committed by GitHub
parent 6798e7e059 8b6d0a166b
commit 2bab947e38
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 11 additions and 1 deletions
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6
src/portable/chipidea/ci_hs/ci_hs_imxrt.h
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@ -78,6 +78,12 @@ TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, ui
TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
const uintptr_t addr32 = (uintptr_t) addr;
if (imxrt_is_cache_mem(addr32)) {
// Invalidating does not push cached changes back to RAM so we need to be
// *very* careful when we do it. If we're not aligned, then we risk resetting
// values back to their RAM state.
// if (addr32 % 32 != 0) {
// TU_BREAKPOINT();
// }
SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size);
}
}

6
src/tusb_option.h
View File

@ -431,7 +431,11 @@
// Attribute to align memory for host controller
#ifndef CFG_TUH_MEM_ALIGN
#define CFG_TUH_MEM_ALIGN TU_ATTR_ALIGNED(4)
#ifdef CFG_TUSB_MEM_ALIGN
#define CFG_TUH_MEM_ALIGN CFG_TUSB_MEM_ALIGN
#else
#define CFG_TUH_MEM_ALIGN TU_ATTR_ALIGNED(4)
#endif
#endif
//------------- CLASS -------------//