update linker
This commit is contained in:
hathach
parent
99e75e6a8a
commit
22fb66436d
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@ -0,0 +1,180 @@
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/*
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* FreeRTOS Kernel V10.0.0
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software. If you wish to use our Amazon
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* FreeRTOS name, please do so in a fair use way that does not cause confusion.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
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* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
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*
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* See http://www.freertos.org/a00110.html.
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*----------------------------------------------------------*/
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// skip if included from IAR assembler
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#ifndef __IASMARM__
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#ifdef __GNUC__
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wstrict-prototypes"
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#pragma GCC diagnostic ignored "-Wundef"
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// extra push due to https://github.com/renesas/fsp/pull/278
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#pragma GCC diagnostic push
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#endif
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#include "bsp_api.h"
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#ifdef __GNUC__
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#pragma GCC diagnostic pop
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#endif
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#endif
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/* Cortex M23/M33 port configuration. */
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#define configENABLE_MPU 0
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#define configENABLE_FPU 1
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#define configENABLE_TRUSTZONE 0
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#define configMINIMAL_SECURE_STACK_SIZE (1024)
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#define configUSE_PREEMPTION 1
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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#define configCPU_CLOCK_HZ SystemCoreClock
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#define configTICK_RATE_HZ ( 1000 )
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#define configMAX_PRIORITIES ( 5 )
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#define configMINIMAL_STACK_SIZE ( 128 )
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#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
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#define configMAX_TASK_NAME_LEN 16
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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#define configUSE_RECURSIVE_MUTEXES 1
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configQUEUE_REGISTRY_SIZE 2
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#define configUSE_QUEUE_SETS 0
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#define configUSE_TIME_SLICING 0
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#define configUSE_NEWLIB_REENTRANT 0
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#define configENABLE_BACKWARD_COMPATIBILITY 1
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#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
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#define configSUPPORT_STATIC_ALLOCATION 0
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#define configSUPPORT_DYNAMIC_ALLOCATION 1
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/* Hook function related definitions. */
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#define configUSE_IDLE_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configRECORD_STACK_HIGH_ADDRESS 1
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#define configUSE_TRACE_FACILITY 1 // legacy trace
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#define configUSE_STATS_FORMATTING_FUNCTIONS 0
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES 2
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/* Software timer related definitions. */
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#define configUSE_TIMERS 1
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#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
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#define configTIMER_QUEUE_LENGTH 32
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#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
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/* Optional functions - most linkers will remove unused functions anyway. */
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#define INCLUDE_vTaskPrioritySet 0
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#define INCLUDE_uxTaskPriorityGet 0
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#define INCLUDE_vTaskDelete 0
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#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
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#define INCLUDE_xResumeFromISR 0
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_xTaskGetSchedulerState 0
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#define INCLUDE_xTaskGetCurrentTaskHandle 1
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#define INCLUDE_uxTaskGetStackHighWaterMark 0
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#define INCLUDE_xTaskGetIdleTaskHandle 0
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#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
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#define INCLUDE_pcTaskGetTaskName 0
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#define INCLUDE_eTaskGetState 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define vPortSVCHandler SVC_Handler
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//--------------------------------------------------------------------+
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// Interrupt nesting behavior configuration.
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//--------------------------------------------------------------------+
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// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
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#define configPRIO_BITS __NVIC_PRIO_BITS
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/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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#endif
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@ -3,13 +3,8 @@ set(MCU_VARIANT ra4m1)
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set(JLINK_DEVICE R7FA4M1AB)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ra4m1_ek.ld)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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)
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target_sources(${TARGET} PRIVATE
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)
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target_include_directories(${BOARD_TARGET} PUBLIC
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)
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target_compile_definitions(${TARGET} PUBLIC)
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target_sources(${TARGET} PRIVATE)
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target_include_directories(${BOARD_TARGET} PUBLIC)
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endfunction()
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@ -31,19 +31,19 @@
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extern "C" {
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#endif
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#define LED1 (BSP_IO_PORT_01_PIN_06)
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#define LED_STATE_ON 1
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#define LED1 BSP_IO_PORT_01_PIN_06
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#define LED_STATE_ON 1
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#define SW1 (BSP_IO_PORT_01_PIN_05)
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#define SW1 BSP_IO_PORT_01_PIN_05
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#define BUTTON_STATE_ACTIVE 0
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const ioport_pin_cfg_t board_pin_cfg[] = {
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{ .pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW) },
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{ .pin = SW1 , .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT) },
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{ .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
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{ .pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
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{ .pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
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{.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
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{.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
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// USB D+, D-, VBus
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{.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
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{.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
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{.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
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};
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#ifdef __cplusplus
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@ -1,11 +1,6 @@
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CPU_CORE = cortex-m4
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MCU_VARIANT = ra4m1
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FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/ra4m1_ek.ld
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# For flash-jlink target
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JLINK_DEVICE = R7FA4M1AB
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JLINK_IF = SWD
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@ -3,13 +3,8 @@ set(MCU_VARIANT ra4m3)
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set(JLINK_DEVICE R7FA4M3AF)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ra4m3_ek.ld)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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)
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target_sources(${TARGET} PRIVATE
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)
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target_include_directories(${BOARD_TARGET} PUBLIC
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)
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target_compile_definitions(${TARGET} PUBLIC)
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target_sources(${TARGET} PRIVATE)
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target_include_directories(${BOARD_TARGET} PUBLIC)
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endfunction()
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@ -1,11 +1,6 @@
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CPU_CORE = cortex-m33
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MCU_VARIANT = ra4m3
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FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld
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# For flash-jlink target
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JLINK_DEVICE = R7FA4M3AF
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JLINK_IF = SWD
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@ -1,576 +0,0 @@
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/* generated memory regions file - do not edit */
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RAM_START = 0x20000000;
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RAM_LENGTH = 0x20000;
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FLASH_START = 0x00000000;
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FLASH_LENGTH = 0x100000;
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DATA_FLASH_START = 0x08000000;
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DATA_FLASH_LENGTH = 0x2000;
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OPTION_SETTING_START = 0x0100A100;
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OPTION_SETTING_LENGTH = 0x100;
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OPTION_SETTING_S_START = 0x0100A200;
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OPTION_SETTING_S_LENGTH = 0x100;
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ID_CODE_START = 0x00000000;
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ID_CODE_LENGTH = 0x0;
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SDRAM_START = 0x90000000;
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SDRAM_LENGTH = 0x0;
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QSPI_FLASH_START = 0x60000000;
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QSPI_FLASH_LENGTH = 0x4000000;
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OSPI_DEVICE_0_START = 0x68000000;
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OSPI_DEVICE_0_LENGTH = 0x0;
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OSPI_DEVICE_1_START = 0x70000000;
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OSPI_DEVICE_1_LENGTH = 0x0;
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/*
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Linker File for Renesas FSP
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*/
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QSPI_FLASH_PRV_LENGTH = DEFINED(QSPI_FLASH_SIZE) ? ABSOLUTE(QSPI_FLASH_SIZE) : ABSOLUTE(QSPI_FLASH_LENGTH);
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OSPI_DEVICE_0_PRV_LENGTH = DEFINED(OSPI_DEVICE_0_SIZE) ? ABSOLUTE(OSPI_DEVICE_0_SIZE) : ABSOLUTE(OSPI_DEVICE_0_LENGTH);
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OSPI_DEVICE_1_PRV_LENGTH = DEFINED(OSPI_DEVICE_1_SIZE) ? ABSOLUTE(OSPI_DEVICE_1_SIZE) : ABSOLUTE(OSPI_DEVICE_1_LENGTH);
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/* This is a non-secure project if the OPTION_SETTING region is non-zero and it does not start at the base address for
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* secure option settings (meaning the secure option settings were already allocated in the secure project). */
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__TZ_NS_PROJECT = LENGTH(OPTION_SETTING) && DEFINED(OPTION_SETTING_S_START) && (ABSOLUTE(OPTION_SETTING_START_S) != ORIGIN(OPTION_SETTING));
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/* This is a secure project if the option setting base address matches the option setting base address for secure
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* option settings. This is also set for flat projects because the CPU runs in secure mode for flat projects.
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* This is not defined for projects that do not support TrustZone. */
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__TZ_S_PROJECT = LENGTH(OPTION_SETTING) && DEFINED(OPTION_SETTING_S_START) && (ABSOLUTE(OPTION_SETTING_START_S) == ORIGIN(OPTION_SETTING));
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/* If a flat (secure) project has defined RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM. */
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__RESERVE_NS_RAM = __TZ_S_PROJECT && DEFINED(RAM_NS_BUFFER_LENGTH);
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RAM_NS_BUFFER_BLOCK_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? ALIGN(RAM_NS_BUFFER_LENGTH, 8192) : 0;
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RAM_NS_BUFFER_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? RAM_NS_BUFFER_LENGTH : 0;
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RAM_NS_BUFFER_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH;
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RAM_NS_BUFFER_BLOCK_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_BLOCK_LENGTH;
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/* Define memory regions. */
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MEMORY
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{
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FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_LENGTH
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RAM (rwx) : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
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DATA_FLASH (rx) : ORIGIN = DATA_FLASH_START, LENGTH = DATA_FLASH_LENGTH
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QSPI_FLASH (rx) : ORIGIN = QSPI_FLASH_START, LENGTH = QSPI_FLASH_PRV_LENGTH
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OSPI_DEVICE_0 (rx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH
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OSPI_DEVICE_1 (rx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH
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SDRAM (rwx) : ORIGIN = SDRAM_START, LENGTH = SDRAM_LENGTH
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OPTION_SETTING (r): ORIGIN = OPTION_SETTING_START, LENGTH = OPTION_SETTING_LENGTH
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OPTION_SETTING_S (r): ORIGIN = OPTION_SETTING_S_START, LENGTH = OPTION_SETTING_S_LENGTH
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ID_CODE (rx) : ORIGIN = ID_CODE_START, LENGTH = ID_CODE_LENGTH
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}
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OPTION_SETTING_START_NS = 0x0100A180;
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OPTION_SETTING_START_S = 0x0100A100;
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/* Library configurations */
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GROUP(libgcc.a libc.a libm.a libnosys.a)
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __copy_table_start__
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* __copy_table_end__
|
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* __zero_table_start__
|
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* __zero_table_end__
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||||
* __etext
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* __data_start__
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* __preinit_array_start
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||||
* __preinit_array_end
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||||
* __init_array_start
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||||
* __init_array_end
|
||||
* __fini_array_start
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||||
* __fini_array_end
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||||
* __data_end__
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* __bss_start__
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* __bss_end__
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||||
* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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||||
* __Vectors_End
|
||||
* __Vectors_Size
|
||||
* __qspi_flash_start__
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* __qspi_flash_end__
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||||
* __qspi_flash_code_size__
|
||||
* __qspi_region_max_size__
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* __qspi_region_start_address__
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||||
* __qspi_region_end_address__
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||||
* __ospi_device_0_start__
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* __ospi_device_0_end__
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* __ospi_device_0_code_size__
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* __ospi_device_0_region_max_size__
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* __ospi_device_0_region_start_address__
|
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* __ospi_device_0_region_end_address__
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||||
* __ospi_device_1_start__
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* __ospi_device_1_end__
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||||
* __ospi_device_1_code_size__
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||||
* __ospi_device_1_region_max_size__
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||||
* __ospi_device_1_region_start_address__
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* __ospi_device_1_region_end_address__
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*/
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ENTRY(Reset_Handler)
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||||
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SECTIONS
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||||
{
|
||||
.text :
|
||||
{
|
||||
__tz_FLASH_S = ABSOLUTE(FLASH_START);
|
||||
__ROM_Start = .;
|
||||
|
||||
/* Even though the vector table is not 256 entries (1KB) long, we still allocate that much
|
||||
* space because ROM registers are at address 0x400 and there is very little space
|
||||
* in between. */
|
||||
KEEP(*(.fixed_vectors*))
|
||||
KEEP(*(.application_vectors*))
|
||||
__Vectors_End = .;
|
||||
|
||||
/* ROM Registers start at address 0x00000400 */
|
||||
. = __ROM_Start + 0x400;
|
||||
KEEP(*(.rom_registers*))
|
||||
|
||||
/* Reserving 0x100 bytes of space for ROM registers. */
|
||||
. = __ROM_Start + 0x500;
|
||||
|
||||
*(.text*)
|
||||
|
||||
KEEP(*(.version))
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
__usb_dev_descriptor_start_fs = .;
|
||||
KEEP(*(.usb_device_desc_fs*))
|
||||
__usb_cfg_descriptor_start_fs = .;
|
||||
KEEP(*(.usb_config_desc_fs*))
|
||||
__usb_interface_descriptor_start_fs = .;
|
||||
KEEP(*(.usb_interface_desc_fs*))
|
||||
__usb_descriptor_end_fs = .;
|
||||
__usb_dev_descriptor_start_hs = .;
|
||||
KEEP(*(.usb_device_desc_hs*))
|
||||
__usb_cfg_descriptor_start_hs = .;
|
||||
KEEP(*(.usb_config_desc_hs*))
|
||||
__usb_interface_descriptor_start_hs = .;
|
||||
KEEP(*(.usb_interface_desc_hs*))
|
||||
__usb_descriptor_end_hs = .;
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
|
||||
__ROM_End = .;
|
||||
} > FLASH = 0xFF
|
||||
|
||||
__Vectors_Size = __Vectors_End - __Vectors;
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
/* To copy multiple ROM to RAM sections,
|
||||
* uncomment .copy.table section and,
|
||||
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.copy.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__copy_table_start__ = .;
|
||||
LONG (__etext)
|
||||
LONG (__data_start__)
|
||||
LONG (__data_end__ - __data_start__)
|
||||
LONG (__etext2)
|
||||
LONG (__data2_start__)
|
||||
LONG (__data2_end__ - __data2_start__)
|
||||
__copy_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
/* To clear multiple BSS sections,
|
||||
* uncomment .zero.table section and,
|
||||
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.zero.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__zero_table_start__ = .;
|
||||
LONG (__bss_start__)
|
||||
LONG (__bss_end__ - __bss_start__)
|
||||
LONG (__bss2_start__)
|
||||
LONG (__bss2_end__ - __bss2_start__)
|
||||
__zero_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
__etext = .;
|
||||
|
||||
__tz_RAM_S = ORIGIN(RAM);
|
||||
|
||||
/* If DTC is used, put the DTC vector table at the start of SRAM.
|
||||
This avoids memory holes due to 1K alignment required by it. */
|
||||
.fsp_dtc_vector_table (NOLOAD) :
|
||||
{
|
||||
. = ORIGIN(RAM);
|
||||
*(.fsp_dtc_vector_table)
|
||||
} > RAM
|
||||
|
||||
/* Initialized data section. */
|
||||
.data :
|
||||
{
|
||||
__data_start__ = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
__Code_In_RAM_Start = .;
|
||||
|
||||
KEEP(*(.code_in_ram*))
|
||||
__Code_In_RAM_End = .;
|
||||
|
||||
*(vtable)
|
||||
/* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
|
||||
*(.data.*)
|
||||
*(.data)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM AT > FLASH
|
||||
|
||||
|
||||
/* TrustZone Secure Gateway Stubs Section. */
|
||||
.gnu.sgstubs : ALIGN (1024)
|
||||
{
|
||||
. = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : ALIGN(1024);
|
||||
__tz_FLASH_C = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(1024);
|
||||
_start_sg = .;
|
||||
*(.gnu.sgstubs*)
|
||||
. = ALIGN(32);
|
||||
_end_sg = .;
|
||||
} > FLASH
|
||||
|
||||
__tz_FLASH_N = DEFINED(FLASH_NS_START) ? ABSOLUTE(FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(32768);
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */
|
||||
__tz_QSPI_FLASH_S = ORIGIN(QSPI_FLASH);
|
||||
|
||||
/* QSPI_FLASH section to be downloaded via debugger */
|
||||
.qspi_flash :
|
||||
{
|
||||
__qspi_flash_start__ = .;
|
||||
KEEP(*(.qspi_flash*))
|
||||
KEEP(*(.code_in_qspi*))
|
||||
__qspi_flash_end__ = .;
|
||||
} > QSPI_FLASH
|
||||
__qspi_flash_code_size__ = __qspi_flash_end__ - __qspi_flash_start__;
|
||||
|
||||
/* QSPI_FLASH non-retentive section, creates a copy in internal flash that can be copied to QSPI */
|
||||
__qspi_flash_code_addr__ = __etext + (__data_end__ - __data_start__);
|
||||
.qspi_non_retentive : AT (__qspi_flash_code_addr__)
|
||||
{
|
||||
__qspi_non_retentive_start__ = .;
|
||||
KEEP(*(.qspi_non_retentive*))
|
||||
__qspi_non_retentive_end__ = .;
|
||||
} > QSPI_FLASH
|
||||
__qspi_non_retentive_size__ = __qspi_non_retentive_end__ - __qspi_non_retentive_start__;
|
||||
|
||||
__qspi_region_max_size__ = 0x4000000; /* Must be the same as defined in MEMORY above */
|
||||
__qspi_region_start_address__ = __qspi_flash_start__;
|
||||
__qspi_region_end_address__ = __qspi_flash_start__ + __qspi_region_max_size__;
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */
|
||||
__tz_QSPI_FLASH_N = __qspi_non_retentive_end__;
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */
|
||||
__tz_OSPI_DEVICE_0_S = ORIGIN(OSPI_DEVICE_0);
|
||||
|
||||
/* OSPI_DEVICE_0 section to be downloaded via debugger */
|
||||
.OSPI_DEVICE_0 :
|
||||
{
|
||||
__ospi_device_0_start__ = .;
|
||||
KEEP(*(.ospi_device_0*))
|
||||
KEEP(*(.code_in_ospi_device_0*))
|
||||
__ospi_device_0_end__ = .;
|
||||
} > OSPI_DEVICE_0
|
||||
__ospi_device_0_code_size__ = __ospi_device_0_end__ - __ospi_device_0_start__;
|
||||
|
||||
/* OSPI_DEVICE_0 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
|
||||
__ospi_device_0_code_addr__ = __etext + (__data_end__ - __data_start__);
|
||||
.ospi_device_0_non_retentive : AT (__ospi_device_0_code_addr__)
|
||||
{
|
||||
__ospi_device_0_non_retentive_start__ = .;
|
||||
KEEP(*(.ospi_device_0_non_retentive*))
|
||||
__ospi_device_0_non_retentive_end__ = .;
|
||||
} > OSPI_DEVICE_0
|
||||
__ospi_device_0_non_retentive_size__ = __ospi_device_0_non_retentive_end__ - __ospi_device_0_non_retentive_start__;
|
||||
|
||||
__ospi_device_0_region_max_size__ = 0x8000000; /* Must be the same as defined in MEMORY above */
|
||||
__ospi_device_0_region_start_address__ = __ospi_device_0_start__;
|
||||
__ospi_device_0_region_end_address__ = __ospi_device_0_start__ + __ospi_device_0_region_max_size__;
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */
|
||||
__tz_OSPI_DEVICE_0_N = __ospi_device_0_non_retentive_end__;
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */
|
||||
__tz_OSPI_DEVICE_1_S = ORIGIN(OSPI_DEVICE_1);
|
||||
|
||||
/* OSPI_DEVICE_1 section to be downloaded via debugger */
|
||||
.OSPI_DEVICE_1 :
|
||||
{
|
||||
__ospi_device_1_start__ = .;
|
||||
KEEP(*(.ospi_device_1*))
|
||||
KEEP(*(.code_in_ospi_device_1*))
|
||||
__ospi_device_1_end__ = .;
|
||||
} > OSPI_DEVICE_1
|
||||
__ospi_device_1_code_size__ = __ospi_device_1_end__ - __ospi_device_1_start__;
|
||||
|
||||
/* OSPI_DEVICE_1 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
|
||||
__ospi_device_1_code_addr__ = __etext + (__data_end__ - __data_start__);
|
||||
.ospi_device_1_non_retentive : AT (__ospi_device_1_code_addr__)
|
||||
{
|
||||
__ospi_device_1_non_retentive_start__ = .;
|
||||
KEEP(*(.ospi_device_1_non_retentive*))
|
||||
__ospi_device_1_non_retentive_end__ = .;
|
||||
} > OSPI_DEVICE_1
|
||||
__ospi_device_1_non_retentive_size__ = __ospi_device_1_non_retentive_end__ - __ospi_device_1_non_retentive_start__;
|
||||
|
||||
__ospi_device_1_region_max_size__ = 0x10000000; /* Must be the same as defined in MEMORY above */
|
||||
__ospi_device_1_region_start_address__ = __ospi_device_1_start__;
|
||||
__ospi_device_1_region_end_address__ = __ospi_device_1_start__ + __ospi_device_1_region_max_size__;
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */
|
||||
__tz_OSPI_DEVICE_1_N = __ospi_device_1_non_retentive_end__;
|
||||
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__noinit_start = .;
|
||||
KEEP(*(.noinit*))
|
||||
. = ALIGN(8);
|
||||
/* Place the FreeRTOS heap here so that the __HeapLimit calculation does not include the freertos heap. */
|
||||
KEEP(*(.heap.*))
|
||||
__noinit_end = .;
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.heap (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__HeapBase = .;
|
||||
PROVIDE(end = .);
|
||||
/* Place the STD heap here. */
|
||||
KEEP(*(.heap))
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* Stacks are stored in this section. */
|
||||
.stack_dummy (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__StackLimit = .;
|
||||
/* Main stack */
|
||||
KEEP(*(.stack))
|
||||
__StackTop = .;
|
||||
/* Thread stacks */
|
||||
KEEP(*(.stack*))
|
||||
__StackTopAll = .;
|
||||
} > RAM
|
||||
|
||||
PROVIDE(__stack = __StackTopAll);
|
||||
|
||||
/* This symbol represents the end of user allocated RAM. The RAM after this symbol can be used
|
||||
at run time for things such as ThreadX memory pool allocations. */
|
||||
__RAM_segment_used_end__ = ALIGN(__StackTopAll , 4);
|
||||
|
||||
/* RAM_NSC_START can be used to set a fixed address for non-secure callable RAM in secure projects.
|
||||
* If it is not specified, the address for NSC RAM is the end of RAM aligned to a 1K boundary.
|
||||
* In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
|
||||
__tz_RAM_C = DEFINED(RAM_NSC_START) ? ABSOLUTE(RAM_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__RAM_segment_used_end__, 1024);
|
||||
|
||||
/* RAM_NS_START can be used to set a fixed address for non-secure RAM in secure projects or flat projects.
|
||||
* RAM_NS_BUFFER_BLOCK_LENGTH is used to allocate non-secure buffers in a flat project. If it is not
|
||||
* specified, the address for NSC RAM is the end of RAM aligned to an 8K boundary.
|
||||
* In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
|
||||
__tz_RAM_N = DEFINED(RAM_NS_START) ? ABSOLUTE(RAM_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__tz_RAM_C, 8192);
|
||||
|
||||
/* Non-secure buffers must be in non-secure RAM. This is primarily used for the EDMAC in flat projects.
|
||||
* The EDMAC is a non-secure bus master and can only access non-secure RAM. */
|
||||
.ns_buffer (NOLOAD):
|
||||
{
|
||||
/* Allocate RAM on a 32-byte boundary to help with placement of Ethernet buffers. */
|
||||
. = __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_START & 0xFFFFFFE0) : .;
|
||||
|
||||
KEEP(*(.ns_buffer*))
|
||||
} > RAM
|
||||
|
||||
/* Data flash. */
|
||||
.data_flash :
|
||||
{
|
||||
. = ORIGIN(DATA_FLASH);
|
||||
__tz_DATA_FLASH_S = .;
|
||||
__Data_Flash_Start = .;
|
||||
KEEP(*(.data_flash*))
|
||||
__Data_Flash_End = .;
|
||||
|
||||
__tz_DATA_FLASH_N = DEFINED(DATA_FLASH_NS_START) ? ABSOLUTE(DATA_FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(DATA_FLASH_START + DATA_FLASH_LENGTH) : ALIGN(1024);
|
||||
} > DATA_FLASH
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */
|
||||
__tz_SDRAM_S = ORIGIN(SDRAM);
|
||||
|
||||
/* SDRAM */
|
||||
.sdram (NOLOAD):
|
||||
{
|
||||
__SDRAM_Start = .;
|
||||
KEEP(*(.sdram*))
|
||||
KEEP(*(.frame*))
|
||||
__SDRAM_End = .;
|
||||
} > SDRAM
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */
|
||||
__tz_SDRAM_N = __SDRAM_End;
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */
|
||||
__tz_ID_CODE_S = ORIGIN(ID_CODE);
|
||||
|
||||
.id_code :
|
||||
{
|
||||
__ID_Code_Start = .;
|
||||
KEEP(*(.id_code*))
|
||||
__ID_Code_End = .;
|
||||
} > ID_CODE
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */
|
||||
__tz_ID_CODE_N = __ID_Code_End;
|
||||
|
||||
/* Symbol required for RA Configuration tool. */
|
||||
__tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING);
|
||||
|
||||
.option_setting :
|
||||
{
|
||||
__OPTION_SETTING_Start = .;
|
||||
KEEP(*(.option_setting_ofs0))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x10 : __OPTION_SETTING_Start;
|
||||
KEEP(*(.option_setting_dualsel))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x34 : __OPTION_SETTING_Start;
|
||||
KEEP(*(.option_setting_sas))
|
||||
__OPTION_SETTING_End = .;
|
||||
} > OPTION_SETTING = 0xFF
|
||||
|
||||
/* Symbol required for RA Configuration tool. */
|
||||
__tz_OPTION_SETTING_N = OPTION_SETTING_START_NS;
|
||||
|
||||
.option_setting_ns :
|
||||
{
|
||||
__OPTION_SETTING_NS_Start = .;
|
||||
KEEP(*(.option_setting_ofs1))
|
||||
. = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x10 : __OPTION_SETTING_NS_Start;
|
||||
KEEP(*(.option_setting_banksel))
|
||||
. = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x40 : __OPTION_SETTING_NS_Start;
|
||||
KEEP(*(.option_setting_bps0))
|
||||
. = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x44 : __OPTION_SETTING_NS_Start;
|
||||
KEEP(*(.option_setting_bps1))
|
||||
. = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x48 : __OPTION_SETTING_NS_Start;
|
||||
KEEP(*(.option_setting_bps2))
|
||||
. = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x60 : __OPTION_SETTING_NS_Start;
|
||||
KEEP(*(.option_setting_pbps0))
|
||||
. = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x64 : __OPTION_SETTING_NS_Start;
|
||||
KEEP(*(.option_setting_pbps1))
|
||||
. = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x68 : __OPTION_SETTING_NS_Start;
|
||||
KEEP(*(.option_setting_pbps2))
|
||||
__OPTION_SETTING_NS_End = .;
|
||||
} > OPTION_SETTING = 0xFF
|
||||
|
||||
/* Symbol required for RA Configuration tool. */
|
||||
__tz_OPTION_SETTING_S_S = ORIGIN(OPTION_SETTING_S);
|
||||
|
||||
.option_setting_s :
|
||||
{
|
||||
__OPTION_SETTING_S_Start = .;
|
||||
KEEP(*(.option_setting_ofs1_sec))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x10 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_banksel_sec))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x40 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_bps_sec0))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x44 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_bps_sec1))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x48 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_bps_sec2))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x60 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_pbps_sec0))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x64 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_pbps_sec1))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x68 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_pbps_sec2))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x80 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_ofs1_sel))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x90 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_banksel_sel))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC0 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_bps_sel0))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC4 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_bps_sel1))
|
||||
. = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC8 : __OPTION_SETTING_S_Start;
|
||||
KEEP(*(.option_setting_bps_sel2))
|
||||
__OPTION_SETTING_S_End = .;
|
||||
} > OPTION_SETTING_S = 0xFF
|
||||
|
||||
/* Symbol required for RA Configuration tool. */
|
||||
__tz_OPTION_SETTING_S_N = __OPTION_SETTING_S_End;
|
||||
}
|
||||
|
|
@ -49,9 +49,9 @@
|
|||
#include "board.h"
|
||||
|
||||
/* Key code for writing PRCR register. */
|
||||
#define BSP_PRV_PRCR_KEY (0xA500U)
|
||||
#define BSP_PRV_PRCR_KEY (0xA500U)
|
||||
#define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
|
||||
#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U)
|
||||
#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U)
|
||||
|
||||
/* ISR prototypes */
|
||||
void usbfs_interrupt_handler(void);
|
||||
|
|
@ -59,26 +59,87 @@ void usbfs_resume_handler(void);
|
|||
void usbfs_d0fifo_handler(void);
|
||||
void usbfs_d1fifo_handler(void);
|
||||
|
||||
BSP_DONT_REMOVE const
|
||||
fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
|
||||
const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
|
||||
[0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
|
||||
[1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */
|
||||
[2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */
|
||||
[3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */
|
||||
};
|
||||
const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = {
|
||||
[0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */
|
||||
[1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
|
||||
[2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
|
||||
[3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */
|
||||
[0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */
|
||||
[1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
|
||||
[2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
|
||||
[3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */
|
||||
};
|
||||
|
||||
const ioport_cfg_t g_bsp_pin_cfg = {
|
||||
.number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
|
||||
.p_pin_cfg_data = board_pin_cfg,
|
||||
static const ioport_cfg_t family_pin_cfg = {
|
||||
.number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
|
||||
.p_pin_cfg_data = board_pin_cfg,
|
||||
};
|
||||
ioport_instance_ctrl_t g_ioport_ctrl;
|
||||
//const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
|
||||
static ioport_instance_ctrl_t port_ctrl;
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
/* Configure pins. */
|
||||
R_IOPORT_Open(&port_ctrl, &family_pin_cfg);
|
||||
|
||||
board_led_write(false);
|
||||
|
||||
/* Enable USB_BASE */
|
||||
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
|
||||
R_MSTP->MSTPCRB &= ~(1U << 11U);
|
||||
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
#endif
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#endif
|
||||
}
|
||||
|
||||
void board_led_write(bool state) {
|
||||
R_IOPORT_PinWrite(&port_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON);
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void) {
|
||||
bsp_io_level_t lvl;
|
||||
R_IOPORT_PinRead(&port_ctrl, SW1, &lvl);
|
||||
return lvl == BUTTON_STATE_ACTIVE;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t *buf, int len) {
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const *buf, int len) {
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler(void) {
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void) {
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||
|
|
@ -139,93 +200,29 @@ void usbfs_d1fifo_handler(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
/* Configure pins. */
|
||||
R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
|
||||
|
||||
/* Enable USB_BASE */
|
||||
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
|
||||
R_MSTP->MSTPCRB &= ~(1U << 11U);
|
||||
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
#endif
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
/* Init systick */
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#endif
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
// stdlib
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON);
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
bsp_io_level_t lvl;
|
||||
R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
|
||||
return lvl == BUTTON_STATE_ACTIVE;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t *buf, int len)
|
||||
{
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const *buf, int len)
|
||||
{
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
int close(int fd)
|
||||
{
|
||||
int close(int fd) {
|
||||
(void) fd;
|
||||
return -1;
|
||||
}
|
||||
int fstat(int fd, void *pstat)
|
||||
{
|
||||
|
||||
int fstat(int fd, void *pstat) {
|
||||
(void) fd;
|
||||
(void) pstat;
|
||||
return 0;
|
||||
}
|
||||
off_t lseek(int fd, off_t pos, int whence)
|
||||
{
|
||||
|
||||
off_t lseek(int fd, off_t pos, int whence) {
|
||||
(void) fd;
|
||||
(void) pos;
|
||||
(void) whence;
|
||||
return 0;
|
||||
}
|
||||
int isatty(int fd)
|
||||
{
|
||||
|
||||
int isatty(int fd) {
|
||||
(void) fd;
|
||||
return 1;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@ set(FSP_RA ${TOP}/hw/mcu/renesas/fsp/ra/fsp)
|
|||
|
||||
# include board specific
|
||||
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
|
||||
#set(FREERTOS_PORT A_CUSTOM_PORT CACHE INTERNAL "")
|
||||
|
||||
set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
|
||||
|
||||
|
|
@ -58,10 +59,15 @@ function(add_board_target BOARD_TARGET)
|
|||
|
||||
update_board(${BOARD_TARGET})
|
||||
|
||||
if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
|
||||
set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/gcc/${MCU_VARIANT}.ld)
|
||||
endif ()
|
||||
|
||||
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
|
||||
target_link_options(${BOARD_TARGET} PUBLIC
|
||||
# linker file
|
||||
"LINKER:--script=${LD_FILE_GNU}"
|
||||
-L${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/gcc
|
||||
-nostartfiles
|
||||
# nanolib
|
||||
--specs=nano.specs
|
||||
|
|
@ -98,7 +104,16 @@ function(family_configure_example TARGET RTOS)
|
|||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
|
||||
)
|
||||
|
||||
# Add TinyUSB target and port source
|
||||
# # RA has custom freertos port
|
||||
# if (NOT TARGET freertos_kernel_port)
|
||||
# add_library(freertos_kernel_port STATIC)
|
||||
# target_sources(freertos_kernel_port PUBLIC ${FSP_RA}/src/rm_freertos_port/port.c)
|
||||
# target_include_directories(freertos_kernel_port PUBLIC ${FSP_RA}/src/rm_freertos_port)
|
||||
#
|
||||
# target_link_libraries(freertos_kernel_port PUBLIC freertos_kernel)
|
||||
# endif ()
|
||||
|
||||
# Add TinyUSB target and port source
|
||||
family_add_tinyusb(${TARGET} OPT_MCU_RAXXX ${RTOS})
|
||||
target_sources(${TARGET}-tinyusb PUBLIC
|
||||
${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
|
||||
|
|
|
|||
|
|
@ -43,6 +43,11 @@ INC += \
|
|||
$(TOP)/$(FSP_RA)/inc/instances \
|
||||
$(TOP)/$(FSP_RA)/src/bsp/mcu/$(MCU_VARIANT) \
|
||||
|
||||
ifndef LD_FILE
|
||||
LD_FILE = $(FAMILY_PATH)/linker/gcc/$(MCU_VARIANT).ld
|
||||
LDFLAGS += -L$(TOP)/$(FAMILY_PATH)/linker/gcc
|
||||
endif
|
||||
|
||||
# For freeRTOS port source
|
||||
# hack to use the port provided by renesas
|
||||
FREERTOS_PORTABLE_SRC = $(FSP_RA)/src/rm_freertos_port
|
||||
|
|
|
|||
|
|
@ -1,29 +1,3 @@
|
|||
/* generated memory regions file - do not edit */
|
||||
RAM_START = 0x20000000;
|
||||
RAM_LENGTH = 0x8000;
|
||||
FLASH_START = 0x00000000;
|
||||
FLASH_LENGTH = 0x40000;
|
||||
DATA_FLASH_START = 0x40100000;
|
||||
DATA_FLASH_LENGTH = 0x2000;
|
||||
OPTION_SETTING_START = 0x00000000;
|
||||
OPTION_SETTING_LENGTH = 0x0;
|
||||
OPTION_SETTING_S_START = 0x80000000;
|
||||
OPTION_SETTING_S_LENGTH = 0x0;
|
||||
ID_CODE_START = 0x01010018;
|
||||
ID_CODE_LENGTH = 0x20;
|
||||
SDRAM_START = 0x80010000;
|
||||
SDRAM_LENGTH = 0x0;
|
||||
QSPI_FLASH_START = 0x60000000;
|
||||
QSPI_FLASH_LENGTH = 0x0;
|
||||
OSPI_DEVICE_0_START = 0x80020000;
|
||||
OSPI_DEVICE_0_LENGTH = 0x0;
|
||||
OSPI_DEVICE_1_START = 0x80030000;
|
||||
OSPI_DEVICE_1_LENGTH = 0x0;
|
||||
|
||||
/*
|
||||
Linker File for Renesas FSP
|
||||
*/
|
||||
|
||||
/* Uncomment and set XIP_SECONDARY_SLOT_IMAGE to 1 below for the secondary XIP application image.*/
|
||||
/*
|
||||
XIP_SECONDARY_SLOT_IMAGE = 1;
|
||||
|
|
@ -629,6 +603,11 @@ SECTIONS
|
|||
/* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */
|
||||
__tz_ID_CODE_S = ORIGIN(ID_CODE);
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool.
|
||||
* Set this symbol to the same value as __tz_ID_CODE_S so the RA configuration tool does not split the ID_CODE
|
||||
* memory region between TrustZone projects. */
|
||||
__tz_ID_CODE_N = __tz_ID_CODE_S;
|
||||
|
||||
.id_code :
|
||||
{
|
||||
__ID_Code_Start = .;
|
||||
|
|
@ -636,8 +615,6 @@ SECTIONS
|
|||
__ID_Code_End = .;
|
||||
} > ID_CODE
|
||||
|
||||
/* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */
|
||||
__tz_ID_CODE_N = __ID_Code_End;
|
||||
|
||||
/* Symbol required for RA Configuration tool. */
|
||||
__tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING_OFS);
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
RAM_START = 0x20000000;
|
||||
RAM_LENGTH = 0x8000;
|
||||
FLASH_START = 0x00000000;
|
||||
FLASH_LENGTH = 0x40000;
|
||||
DATA_FLASH_START = 0x40100000;
|
||||
DATA_FLASH_LENGTH = 0x2000;
|
||||
OPTION_SETTING_START = 0x00000000;
|
||||
OPTION_SETTING_LENGTH = 0x0;
|
||||
OPTION_SETTING_S_START = 0x80000000;
|
||||
OPTION_SETTING_S_LENGTH = 0x0;
|
||||
ID_CODE_START = 0x01010018;
|
||||
ID_CODE_LENGTH = 0x20;
|
||||
SDRAM_START = 0x80010000;
|
||||
SDRAM_LENGTH = 0x0;
|
||||
QSPI_FLASH_START = 0x60000000;
|
||||
QSPI_FLASH_LENGTH = 0x0;
|
||||
OSPI_DEVICE_0_START = 0x80020000;
|
||||
OSPI_DEVICE_0_LENGTH = 0x0;
|
||||
OSPI_DEVICE_1_START = 0x80030000;
|
||||
OSPI_DEVICE_1_LENGTH = 0x0;
|
||||
|
||||
INCLUDE fsp.ld
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
RAM_START = 0x20000000;
|
||||
RAM_LENGTH = 0x20000;
|
||||
FLASH_START = 0x00000000;
|
||||
FLASH_LENGTH = 0x100000;
|
||||
DATA_FLASH_START = 0x08000000;
|
||||
DATA_FLASH_LENGTH = 0x2000;
|
||||
OPTION_SETTING_START = 0x0100A100;
|
||||
OPTION_SETTING_LENGTH = 0x100;
|
||||
OPTION_SETTING_S_START = 0x0100A200;
|
||||
OPTION_SETTING_S_LENGTH = 0x100;
|
||||
ID_CODE_START = 0x00000000;
|
||||
ID_CODE_LENGTH = 0x0;
|
||||
SDRAM_START = 0x80010000;
|
||||
SDRAM_LENGTH = 0x0;
|
||||
QSPI_FLASH_START = 0x60000000;
|
||||
QSPI_FLASH_LENGTH = 0x4000000;
|
||||
OSPI_DEVICE_0_START = 0x80020000;
|
||||
OSPI_DEVICE_0_LENGTH = 0x0;
|
||||
OSPI_DEVICE_1_START = 0x80030000;
|
||||
OSPI_DEVICE_1_LENGTH = 0x0;
|
||||
|
||||
INCLUDE fsp.ld
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
RAM_START = 0x1FFE0000;
|
||||
RAM_LENGTH = 0x40000;
|
||||
FLASH_START = 0x00000000;
|
||||
FLASH_LENGTH = 0x80000;
|
||||
DATA_FLASH_START = 0x40100000;
|
||||
DATA_FLASH_LENGTH = 0x2000;
|
||||
OPTION_SETTING_START = 0x00000000;
|
||||
OPTION_SETTING_LENGTH = 0x0;
|
||||
OPTION_SETTING_S_START = 0x80000000;
|
||||
OPTION_SETTING_S_LENGTH = 0x0;
|
||||
ID_CODE_START = 0x0100A150;
|
||||
ID_CODE_LENGTH = 0x10;
|
||||
SDRAM_START = 0x80010000;
|
||||
SDRAM_LENGTH = 0x0;
|
||||
QSPI_FLASH_START = 0x60000000;
|
||||
QSPI_FLASH_LENGTH = 0x4000000;
|
||||
OSPI_DEVICE_0_START = 0x80020000;
|
||||
OSPI_DEVICE_0_LENGTH = 0x0;
|
||||
OSPI_DEVICE_1_START = 0x80030000;
|
||||
OSPI_DEVICE_1_LENGTH = 0x0;
|
||||
|
||||
INCLUDE fsp.ld
|
||||
|
|
@ -6,7 +6,9 @@ if (TOOLCHAIN STREQUAL "gcc")
|
|||
-mfpu=fpv4-sp-d16
|
||||
)
|
||||
|
||||
set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
|
||||
if (NOT DEFINED FREERTOS_PORT)
|
||||
set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
|
||||
endif ()
|
||||
|
||||
elseif (TOOLCHAIN STREQUAL "iar")
|
||||
set(TOOLCHAIN_COMMON_FLAGS
|
||||
|
|
@ -14,6 +16,8 @@ elseif (TOOLCHAIN STREQUAL "iar")
|
|||
--fpu VFPv4
|
||||
)
|
||||
|
||||
set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
|
||||
if (NOT DEFINED FREERTOS_PORT)
|
||||
set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
|
||||
endif ()
|
||||
|
||||
endif ()
|
||||
|
|
|
|||
Loading…
Reference in New Issue