615369a6eb
Code suggested that PLL with MSI is used resulting in 80MHz clock. When in fact PLL was not configured and system clock was left at MSI 48MHz. This happens because PLL configuration requires that SysTick interrupt has interrupt priority level configured correctly. As it seems ST code intentionally setups variable uwTickPrio to invalid value and later when it is not setup by user code configuration of oscillator will fail before PLL is configured. This simple changes systick priority to some valid value that allows clock to use PLL. |
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| .. | ||
| STM32L476VGTx_FLASH.ld | ||
| board.mk | ||
| stm32l4xx_hal_conf.h | ||
| stm32l476disco.c | ||