323 lines
12 KiB
C
323 lines
12 KiB
C
/**************************************************************************/
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/*!
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@file dcd_lpc175x_6x.c
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@author hathach (tinyusb.org)
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@section LICENSE
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Software License Agreement (BSD License)
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Copyright (c) 2013, hathach (tinyusb.org)
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holders nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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This file is part of the tinyusb stack.
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*/
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/**************************************************************************/
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#include "tusb_option.h"
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#if MODE_DEVICE_SUPPORTED && (MCU == MCU_LPC175X_6X)
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#define _TINY_USB_SOURCE_FILE_
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//--------------------------------------------------------------------+
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// INCLUDE
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//--------------------------------------------------------------------+
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#include "dcd.h"
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#include "dcd_lpc175x_6x.h"
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#include "usbd_dcd.h"
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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STATIC_ dcd_dma_descriptor_t* dcd_udca[32] ATTR_ALIGNED(128) TUSB_CFG_ATTR_USBRAM;
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STATIC_ dcd_dma_descriptor_t dcd_dd[DCD_MAX_DD];
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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static inline void endpoint_set_max_packet_size(uint8_t endpoint_idx, uint16_t max_packet_size) ATTR_ALWAYS_INLINE;
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static inline void endpoint_set_max_packet_size(uint8_t endpoint_idx, uint16_t max_packet_size)
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{
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LPC_USB->USBReEp |= BIT_(endpoint_idx);
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LPC_USB->USBEpInd = endpoint_idx; // select index before setting packet size
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LPC_USB->USBMaxPSize = max_packet_size;
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#ifndef _TEST_
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if( endpoint_idx > 2) // endpoint control is always realized
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{
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while ((LPC_USB->USBDevIntSt & DEV_INT_ENDPOINT_REALIZED_MASK) == 0) {} // TODO can be omitted, or move to set max packet size
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LPC_USB->USBDevIntClr = DEV_INT_ENDPOINT_REALIZED_MASK;
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}
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#endif
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}
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static inline void sie_commamd_code (uint8_t phase, uint8_t code_data) ATTR_ALWAYS_INLINE;
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static inline void sie_commamd_code (uint8_t phase, uint8_t code_data)
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{
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LPC_USB->USBDevIntClr = (DEV_INT_COMMAND_CODE_EMPTY_MASK | DEV_INT_COMMAND_DATA_FULL_MASK);
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LPC_USB->USBCmdCode = (phase << 8) | (code_data << 16);
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uint32_t const wait_flag = (phase == SIE_CMDPHASE_READ) ? DEV_INT_COMMAND_DATA_FULL_MASK : DEV_INT_COMMAND_CODE_EMPTY_MASK;
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#ifndef _TEST_
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while ((LPC_USB->USBDevIntSt & wait_flag) == 0); // TODO blocking forever potential
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#endif
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LPC_USB->USBDevIntClr = wait_flag;
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}
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static inline void sie_command_write (uint8_t cmd_code, uint8_t data_len, uint8_t data) ATTR_ALWAYS_INLINE;
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static inline void sie_command_write (uint8_t cmd_code, uint8_t data_len, uint8_t data)
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{
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sie_commamd_code(SIE_CMDPHASE_COMMAND, cmd_code);
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if (data_len)
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{
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sie_commamd_code(SIE_CMDPHASE_WRITE, data);
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}
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}
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static inline uint32_t sie_command_read (uint8_t cmd_code, uint8_t data_len) ATTR_ALWAYS_INLINE;
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static inline uint32_t sie_command_read (uint8_t cmd_code, uint8_t data_len)
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{
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// TODO multiple read
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sie_commamd_code(SIE_CMDPHASE_COMMAND , cmd_code);
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sie_commamd_code(SIE_CMDPHASE_READ , cmd_code);
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return LPC_USB->USBCmdData;
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}
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//--------------------------------------------------------------------+
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// IMPLEMENTATION
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//--------------------------------------------------------------------+
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void endpoint_control_isr(uint8_t coreid)
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{
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(void) coreid; // suppress compiler warning
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uint32_t const endpoint_int_status = LPC_USB->USBEpIntSt & LPC_USB->USBEpIntEn;
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//------------- control OUT -------------//
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if (endpoint_int_status & BIT_(0))
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{
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uint32_t const endpoint_status = sie_command_read(SIE_CMDCODE_ENDPOINT_SELECT+0, 1);
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if (endpoint_status & SIE_ENDPOINT_STATUS_SETUP_RECEIVED_MASK)
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{
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(void) sie_command_read(SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT+0, 1); // clear setup bit
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dcd_pipe_control_read(0, &usbd_devices[0].setup_packet, 8);
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usbd_isr(0, TUSB_EVENT_SETUP_RECEIVED);
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}else
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{
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// Current not support any out control with data yet
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// dcd_pipe_control_read(0,..
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}
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sie_command_write(SIE_CMDCODE_ENDPOINT_SELECT+0, 0, 0);
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sie_command_write(SIE_CMDCODE_BUFFER_CLEAR , 0, 0);
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}
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//------------- control IN -------------//
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if (endpoint_int_status & BIT_(1))
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{
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(void) endpoint_int_status;
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}
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LPC_USB->USBEpIntClr = endpoint_int_status; // acknowledge interrupt
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}
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void dcd_isr(uint8_t coreid)
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{
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uint32_t const device_int_status = LPC_USB->USBDevIntSt & LPC_USB->USBDevIntEn & DEV_INT_ALL_MASK;
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LPC_USB->USBDevIntClr = device_int_status;// Acknowledge handled interrupt
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//------------- usb bus event -------------//
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if (device_int_status & DEV_INT_DEVICE_STATUS_MASK)
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{
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uint32_t const dev_status_reg = sie_command_read(SIE_CMDCODE_DEVICE_STATUS, 1);
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if (dev_status_reg & SIE_DEV_STATUS_RESET_MASK)
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{
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usbd_isr(coreid, TUSB_EVENT_BUS_RESET);
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}
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// TODO invoke some callbacks
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if (dev_status_reg & SIE_DEV_STATUS_CONNECT_CHANGE_MASK) { }
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if (dev_status_reg & SIE_DEV_STATUS_SUSPEND_CHANGE_MASK) {
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}
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}
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//------------- slave mode, control endpoint -------------//
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if (device_int_status & DEV_INT_ENDPOINT_SLOW_MASK)
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{
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// only occur on control endpoint, all other use DMA
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endpoint_control_isr(coreid);
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}
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if (device_int_status & DEV_INT_ERROR_MASK)
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{
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uint32_t error_status = sie_command_read(SIE_CMDCODE_READ_ERROR_STATUS, 1);
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(void) error_status;
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// ASSERT(false, (void) 0);
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}
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}
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//--------------------------------------------------------------------+
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// USBD-DCD API
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//--------------------------------------------------------------------+
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tusb_error_t dcd_init(void)
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{
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//------------- user manual 11.13 usb device controller initialization -------------// LPC_USB->USBEpInd = 0;
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// step 6 : set up control endpoint
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endpoint_set_max_packet_size(0, TUSB_CFG_DEVICE_CONTROL_PACKET_SIZE);
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endpoint_set_max_packet_size(1, TUSB_CFG_DEVICE_CONTROL_PACKET_SIZE);
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// step 7 : slave mode set up
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LPC_USB->USBEpIntEn = (uint32_t) BIN8(11); // control endpoint cannot use DMA, non-control all use DMA
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LPC_USB->USBDevIntEn = (DEV_INT_DEVICE_STATUS_MASK | DEV_INT_ENDPOINT_SLOW_MASK | DEV_INT_ERROR_MASK);
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LPC_USB->USBDevIntClr = 0xFFFFFFFF; // clear all pending interrupt
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LPC_USB->USBEpIntClr = 0xFFFFFFFF; // clear all pending interrupt
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LPC_USB->USBEpIntPri = 0; // same priority for all endpoint
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// step 8 : DMA set up
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LPC_USB->USBEpDMADis = 0xFFFFFFFF; // firstly disable all dma
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LPC_USB->USBDMARClr = 0xFFFFFFFF; // clear all pending interrupt
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LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
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LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
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LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
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for (uint8_t index = 0; index < DCD_MAX_DD; index++)
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{
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dcd_udca[index] = dcd_dd + index;
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}
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LPC_USB->USBUDCAH = (uint32_t) dcd_udca;
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LPC_USB->USBDMAIntEn = (DMA_INT_END_OF_XFER_MASK | DMA_INT_NEW_DD_REQUEST_MASK | DMA_INT_ERROR_MASK );
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// clear all stall on control endpoint IN & OUT if any
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sie_command_write(SIE_CMDCODE_ENDPOINT_SET_STATUS , 1, 0);
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sie_command_write(SIE_CMDCODE_ENDPOINT_SET_STATUS + 1, 1, 0);
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return TUSB_ERROR_NONE;
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}
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void dcd_controller_connect(uint8_t coreid)
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{
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sie_command_write(SIE_CMDCODE_DEVICE_STATUS, 1, 1);
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}
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void dcd_device_set_address(uint8_t coreid, uint8_t dev_addr)
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{
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sie_command_write(SIE_CMDCODE_SET_ADDRESS, 1, 0x80 | dev_addr); // 7th bit is : device_enable
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}
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void dcd_device_set_configuration(uint8_t coreid, uint8_t config_num)
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{
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(void) config_num; // supress compiler's warnings
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sie_command_write(SIE_CMDCODE_CONFIGURE_DEVICE, 1, 1);
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}
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//--------------------------------------------------------------------+
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// PIPE API
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//--------------------------------------------------------------------+
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static inline uint16_t length_unit_byte2dword(uint16_t length_in_bytes) ATTR_ALWAYS_INLINE ATTR_CONST;
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static inline uint16_t length_unit_byte2dword(uint16_t length_in_bytes)
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{
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return (length_in_bytes + 3) / 4; // length_in_dword
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}
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tusb_error_t dcd_pipe_control_write(uint8_t coreid, void const * buffer, uint16_t length)
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{
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(void) coreid; // suppress compiler warning
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ASSERT( length !=0 || buffer == NULL, TUSB_ERROR_INVALID_PARA);
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LPC_USB->USBCtrl = SLAVE_CONTROL_WRITE_ENABLE_MASK; // logical endpoint = 0
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LPC_USB->USBTxPLen = length;
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for (uint16_t count = 0; count < length_unit_byte2dword(length); count++)
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{
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LPC_USB->USBTxData = *((uint32_t *)buffer); // NOTE: cortex M3 have no problem with alignment
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buffer += 4;
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}
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LPC_USB->USBCtrl = 0;
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sie_command_write(SIE_CMDCODE_ENDPOINT_SELECT+1, 0, 0); // select control IN endpoint
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sie_command_write(SIE_CMDCODE_BUFFER_VALIDATE , 0, 0);
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return TUSB_ERROR_NONE;
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}
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tusb_error_t dcd_pipe_control_read(uint8_t coreid, void * buffer, uint16_t length)
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{
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LPC_USB->USBCtrl = SLAVE_CONTROL_READ_ENABLE_MASK; // logical endpoint = 0
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while ((LPC_USB->USBRxPLen & SLAVE_RXPLEN_PACKET_READY_MASK) == 0) {}
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uint16_t actual_length = min16_of(length, (uint16_t) (LPC_USB->USBRxPLen & SLAVE_RXPLEN_PACKET_LENGTH_MASK) );
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uint32_t *p_read_data = (uint32_t*) buffer;
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for( uint16_t count=0; count < length_unit_byte2dword(actual_length); count++)
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{
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*p_read_data = LPC_USB->USBRxData;
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p_read_data++; // increase by 4 ( sizeof(uint32_t) )
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}
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LPC_USB->USBCtrl = 0;
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return TUSB_ERROR_NONE;
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}
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// TODO inline function
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void dcd_pipe_control_write_zero_length(uint8_t coreid)
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{
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dcd_pipe_control_write(coreid, NULL, 0);
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}
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static inline uint8_t endpoint_address_to_physical_index(uint8_t ep_address) ATTR_ALWAYS_INLINE ATTR_CONST;
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static inline uint8_t endpoint_address_to_physical_index(uint8_t ep_address)
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{
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return (ep_address << 1) + (ep_address & 0x80 ? 1 : 0 );
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}
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tusb_error_t dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc)
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{
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uint8_t phy_ep = endpoint_address_to_physical_index( p_endpoint_desc->bEndpointAddress );
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//------------- Realize Endpoint with Max Packet Size -------------//
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endpoint_set_max_packet_size(phy_ep, p_endpoint_desc->wMaxPacketSize.size);
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//------------- DMA set up -------------//
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memclr_(dcd_dd + phy_ep, sizeof(dcd_dma_descriptor_t));
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dcd_dd[phy_ep].is_isochronous = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) ? 1 : 0;
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dcd_dd[phy_ep].max_packet_size = p_endpoint_desc->wMaxPacketSize.size;
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dcd_dd[phy_ep].is_retired = 1; // dd is not active at first
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LPC_USB->USBEpDMAEn = BIT_(phy_ep);
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sie_command_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+phy_ep, 1, 0); // clear all endpoint status
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return TUSB_ERROR_NONE;
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}
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//tusb_error_t dcd_pipe_xfer()
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#endif
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