137 lines
5.2 KiB
C
137 lines
5.2 KiB
C
/**********************************************************************
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* $Id$ lpc43xx_scu.h 2011-06-02
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*//**
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* @file lpc43xx_scu.h
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* @brief Contains all macro definitions and function prototypes
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* support for SCU firmware library on lpc43xx
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* @version 1.0
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* @date 02. June. 2011
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* @author NXP MCU SW Application Team
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*
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* Copyright(C) 2011, NXP Semiconductor
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* All rights reserved.
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*
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***********************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors’
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* relevant copyright in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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**********************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @defgroup SCU SCU (System Control Unit)
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* @ingroup LPC4300CMSIS_FwLib_Drivers
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* @{
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*/
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#ifndef __SCU_H
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#define __SCU_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* Private macros ------------------------------------------------------------- */
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/** @defgroup SCT_Private_Macros SCT Private Macros
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* @{
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*/
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/** Port offset definition */
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#define PORT_OFFSET 0x80
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/** Pin offset definition */
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#define PIN_OFFSET 0x04
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/* Pin mode defines, following partly a definition from older chip architectures */
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#define MD_PUP (0x0 << 3)
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#define MD_BUK (0x1 << 3)
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#define MD_PLN (0x2 << 3)
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#define MD_PDN (0x3 << 3)
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#define MD_EHS (0x1 << 5)
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#define MD_EZI (0x1 << 6)
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#define MD_ZI (0x1 << 7)
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#define MD_EHD0 (0x1 << 8)
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#define MD_EHD1 (0x1 << 9)
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#define MD_EHD2 (0x3 << 8)
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#define MD_PLN_FAST (MD_PLN | MD_EZI | MD_ZI | MD_EHS)
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/* Pin mode defines, more in line with the definitions in the LPC1800/4300 user manual */
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/* Defines for SFSPx_y pin configuration registers */
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#define PDN_ENABLE (1 << 3) // Pull-down enable
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#define PDN_DISABLE (0 << 3) // Pull-down disable
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#define PUP_ENABLE (0 << 4) // Pull-up enable
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#define PUP_DISABLE (1 << 4) // Pull-up disable
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#define SLEWRATE_SLOW (0 << 5) // Slew rate for low noise with medium speed
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#define SLEWRATE_FAST (1 << 5) // Slew rate for medium noise with fast speed
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#define INBUF_ENABLE (1 << 6) // Input buffer
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#define INBUF_DISABLE (0 << 6) // Input buffer
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#define FILTER_ENABLE (0 << 7) // Glitch filter (for signals below 30MHz)
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#define FILTER_DISABLE (1 << 7) // No glitch filter (for signals above 30MHz)
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#define DRIVE_8MA (1 << 8) // Drive strength of 8mA
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#define DRIVE_14MA (1 << 9) // Drive strength of 14mA
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#define DRIVE_20MA (3 << 8) // Drive strength of 20mA
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/* Configuration examples for various I/O pins */
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#define EMC_IO (PUP_ENABLE | PDN_ENABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
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#define LCD_PINCONFIG (PUP_DISABLE | PDN_DISABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
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#define CLK_IN (PUP_ENABLE | PDN_ENABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
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#define CLK_OUT (PUP_ENABLE | PDN_ENABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
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#define GPIO_PUP (PUP_ENABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_ENABLE | FILTER_ENABLE )
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#define GPIO_PDN (PUP_DISABLE | PDN_ENABLE | SLEWRATE_SLOW | INBUF_ENABLE | FILTER_ENABLE )
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#define GPIO_NOPULL (PUP_DISABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_ENABLE | FILTER_ENABLE )
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#define UART_RX_TX (PUP_DISABLE | PDN_ENABLE | SLEWRATE_SLOW | INBUF_ENABLE | FILTER_ENABLE )
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#define SSP_IO (PUP_ENABLE | PDN_ENABLE | SLEWRATE_FAST | INBUF_ENABLE | FILTER_DISABLE)
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/* Pin function */
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#define FUNC0 0x0 /** Function 0 */
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#define FUNC1 0x1 /** Function 1 */
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#define FUNC2 0x2 /** Function 2 */
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#define FUNC3 0x3 /** Function 3 */
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#define FUNC4 0x4
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#define FUNC5 0x5
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#define FUNC6 0x6
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#define FUNC7 0x7
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/**
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* @}
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*/
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#define LPC_SCU_PIN(po, pi) (*(volatile int *) (LPC_SCU_BASE + ((po) * 0x80) + ((pi) * 0x4)) )
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#define LPC_SCU_CLK(c) (*(volatile int *) (LPC_SCU_BASE + 0xC00 + ((c) * 0x4)) )
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/* Public Functions ----------------------------------------------------------- */
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/** @defgroup SCU_Public_Functions SCU Public Functions
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* @{
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*/
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void scu_pinmux(uint8_t port, uint8_t pin, uint8_t mode, uint8_t func);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* end __SCU_H */
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/**
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* @}
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*/
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