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msp_exp430f5529lp: Use ti submodule for includes and linker files.

This commit is contained in:
William D. Jones 2019-10-29 11:43:26 -04:00
parent 66faa96f16
commit ffeb61a710
7 changed files with 3 additions and 8468 deletions
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6
hw/bsp/msp_exp430f5529lp/board.mk
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@ -7,10 +7,10 @@ CFLAGS += \
#-mmcu=msp430f5529
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/msp_exp430f5529lp/msp430f5529.ld
LDINC += $(TOP)/hw/bsp/$(BOARD)
LD_FILE = hw/mcu/ti/msp430/msp430-gcc-support-files/include/msp430f5529.ld
LDINC += $(TOP)/hw/mcu/ti/msp430/msp430-gcc-support-files/include
INC += $(TOP)/hw/bsp/$(BOARD)
INC += $(TOP)/hw/mcu/ti/msp430/msp430-gcc-support-files/include
# For TinyUSB port source
VENDOR = ti

345
hw/bsp/msp_exp430f5529lp/in430.h
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@ -1,345 +0,0 @@
/*******************************************************************************
* in430.h -
*
* Copyright (C) 2003-2019 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
/* 1.207 */
#ifndef __IN430_H__
#define __IN430_H__
/* Definitions for projects using the GNU C/C++ compiler */
#if !defined(__ASSEMBLER__)
/* Definitions of things which are intrinsics with IAR and CCS, but which don't
appear to be intrinsics with the GCC compiler */
/* The data type used to hold interrupt state */
typedef unsigned int __istate_t;
#define _no_operation() __asm__ __volatile__ ("nop")
#define _get_interrupt_state() \
({ \
unsigned int __x; \
__asm__ __volatile__( \
"mov SR, %0" \
: "=r" ((unsigned int) __x) \
:); \
__x; \
})
#if defined(__MSP430_HAS_MSP430XV2_CPU__) || defined(__MSP430_HAS_MSP430X_CPU__)
#define _set_interrupt_state(x) \
({ \
__asm__ __volatile__ ("nop { mov %0, SR { nop" \
: : "ri"((unsigned int) x) \
);\
})
#define _enable_interrupts() __asm__ __volatile__ ("nop { eint { nop")
#define _bis_SR_register(x) \
__asm__ __volatile__ ("nop { bis.w %0, SR { nop" \
: : "ri"((unsigned int) x) \
)
#else
#define _set_interrupt_state(x) \
({ \
__asm__ __volatile__ ("mov %0, SR { nop" \
: : "ri"((unsigned int) x) \
);\
})
#define _enable_interrupts() __asm__ __volatile__ ("eint")
#define _bis_SR_register(x) \
__asm__ __volatile__ ("bis.w %0, SR" \
: : "ri"((unsigned int) x) \
)
#endif
#define _disable_interrupts() __asm__ __volatile__ ("dint { nop")
#define _bic_SR_register(x) \
__asm__ __volatile__ ("bic.w %0, SR { nop" \
: : "ri"((unsigned int) x) \
)
#define _get_SR_register() \
({ \
unsigned int __x; \
__asm__ __volatile__( \
"mov SR, %0" \
: "=r" ((unsigned int) __x) \
:); \
__x; \
})
#define _swap_bytes(x) \
({ \
unsigned int __dst = x; \
__asm__ __volatile__( \
"swpb %0" \
: "+r" ((unsigned int) __dst) \
:); \
__dst; \
})
/* Alternative names for GCC built-ins */
#define _bic_SR_register_on_exit(x) __bic_SR_register_on_exit(x)
#define _bis_SR_register_on_exit(x) __bis_SR_register_on_exit(x)
/* Additional intrinsics provided for IAR/CCS compatibility */
#define _bcd_add_short(x,y) \
({ \
unsigned short __z = ((unsigned short) y); \
__asm__ __volatile__( \
"clrc \n\t" \
"dadd.w %1, %0" \
: "+r" ((unsigned short) __z) \
: "ri" ((unsigned short) x) \
); \
__z; \
})
#define __bcd_add_short(x,y) _bcd_add_short(x,y)
#define _bcd_add_long(x,y) \
({ \
unsigned long __z = ((unsigned long) y); \
__asm__ __volatile__( \
"clrc \n\t" \
"dadd.w %L1, %L0 \n\t" \
"dadd.w %H1, %H0" \
: "+r" ((unsigned long) __z) \
: "ri" ((unsigned long) x) \
); \
__z; \
})
#define __bcd_add_long(x,y) _bcd_add_long(x,y)
#define _get_SP_register() \
({ \
unsigned int __x; \
__asm__ __volatile__( \
"mov SP, %0" \
: "=r" ((unsigned int) __x) \
:); \
__x; \
})
#define __get_SP_register() _get_SP_register()
#define _set_SP_register(x) \
({ \
__asm__ __volatile__ ("mov %0, SP" \
: : "ri"((unsigned int) x) \
);\
})
#define __set_SP_register(x) _set_SP_register(x)
#define _data16_write_addr(addr,src) \
({ \
unsigned long __src = src; \
__asm__ __volatile__ ( \
"movx.a %1, 0(%0)" \
: : "r"((unsigned int) addr), "m"((unsigned long) __src) \
); \
})
#define __data16_write_addr(addr,src) _data16_write_addr(addr,src)
#define _data16_read_addr(addr) \
({ \
unsigned long __dst; \
__asm__ __volatile__ ( \
"movx.a @%1, %0" \
: "=m"((unsigned long) __dst) \
: "r"((unsigned int) addr) \
); \
__dst; \
})
#define __data16_read_addr(addr) _data16_read_addr(addr)
#define _data20_write_char(addr,src) \
({ \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %1, %0 \n\t" \
"mov.b %2, 0(%0)" \
: "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr), "ri"((char) src) \
); \
})
#define __data20_write_char(addr,src) _data20_write_char(addr,src)
#define _data20_read_char(addr) \
({ \
char __dst; \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %2, %1 \n\t" \
"mov.b 0(%1), %0" \
: "=r"((char) __dst), "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr) \
); \
__dst ; \
})
#define __data20_read_char(addr) _data20_read_char(addr)
#define _data20_write_short(addr,src) \
({ \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %1, %0 \n\t" \
"mov.w %2, 0(%0)" \
: "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr), "ri"((short) src) \
); \
})
#define __data20_write_short(addr,src) _data20_write_short(addr,src)
#define _data20_read_short(addr) \
({ \
short __dst; \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %2, %1 \n\t" \
"mov.w 0(%1), %0" \
: "=r"((short) __dst), "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr) \
); \
__dst ; \
})
#define __data20_read_short(addr) _data20_read_short(addr)
#define _data20_write_long(addr,src) \
({ \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %1, %0 \n\t" \
"mov.w %L2, 0(%0) \n\t" \
"mov.w %H2, 2(%0)" \
: "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr), "ri"((long) src) \
); \
})
#define __data20_write_long(addr,src) _data20_write_long(addr,src)
#define _data20_read_long(addr) \
({ \
long __dst; \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %2, %1 \n\t" \
"mov.w 0(%1), %L0 \n\t" \
"mov.w 2(%1), %H0" \
: "=r"((long) __dst), "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr) \
); \
__dst ; \
})
#define __data20_read_long(addr) _data20_read_long(addr)
#define _low_power_mode_0() _bis_SR_register(0x18)
#define _low_power_mode_1() _bis_SR_register(0x58)
#define _low_power_mode_2() _bis_SR_register(0x98)
#define _low_power_mode_3() _bis_SR_register(0xD8)
#define _low_power_mode_4() _bis_SR_register(0xF8)
#define _low_power_mode_off_on_exit() _bic_SR_register_on_exit(0xF0)
#define __low_power_mode_0() _low_power_mode_0()
#define __low_power_mode_1() _low_power_mode_1()
#define __low_power_mode_2() _low_power_mode_2()
#define __low_power_mode_3() _low_power_mode_3()
#define __low_power_mode_4() _low_power_mode_4()
#define __low_power_mode_off_on_exit() _low_power_mode_off_on_exit()
#define _even_in_range(x,y) (x)
#define __even_in_range(x,y) _even_in_range(x,y)
/* Define some alternative names for the intrinsics, which have been used
in the various versions of IAR and GCC */
#define __no_operation() _no_operation()
#define __get_interrupt_state() _get_interrupt_state()
#define __set_interrupt_state(x) _set_interrupt_state(x)
#define __enable_interrupt() _enable_interrupts()
#define __disable_interrupt() _disable_interrupts()
#define __bic_SR_register(x) _bic_SR_register(x)
#define __bis_SR_register(x) _bis_SR_register(x)
#define __get_SR_register() _get_SR_register()
#define __swap_bytes(x) _swap_bytes(x)
#define __nop() _no_operation()
#define __eint() _enable_interrupts()
#define __dint() _disable_interrupts()
#define _NOP() _no_operation()
#define _EINT() _enable_interrupts()
#define _DINT() _disable_interrupts()
#define _BIC_SR(x) _bic_SR_register(x)
#define _BIC_SR_IRQ(x) _bic_SR_register_on_exit(x)
#define _BIS_SR(x) _bis_SR_register(x)
#define _BIS_SR_IRQ(x) _bis_SR_register_on_exit(x)
#define _BIS_NMI_IE1(x) _bis_nmi_ie1(x)
#define _SWAP_BYTES(x) _swap_bytes(x)
#define __no_init __attribute__((noinit))
#endif /* !defined _GNU_ASSEMBLER_ */
#endif /* __IN430_H__ */

87
hw/bsp/msp_exp430f5529lp/iomacros.h
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@ -1,87 +0,0 @@
/*******************************************************************************
* iomacros.h -
*
* Copyright (C) 2003-2019 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
/* 1.207 */
#if !defined(_IOMACROS_H_)
#define _IOMACROS_H_
#if defined(__ASSEMBLER__)
/* Definitions for assembly compilation using the GNU assembler */
#define sfrb(x,x_) x=x_
#define sfrw(x,x_) x=x_
#define sfra(x,x_) x=x_
#define sfrl(x,x_) x=x_
#define const_sfrb(x,x_) x=x_
#define const_sfrw(x,x_) x=x_
#define const_sfra(x,x_) x=x_
#define const_sfrl(x,x_) x=x_
#define sfr_b(x)
#define sfr_w(x)
#define sfr_a(x)
#define sfr_l(x)
#else
#define sfr_b(x) extern volatile unsigned char x
#define sfr_w(x) extern volatile unsigned int x
#define sfr_a(x) extern volatile unsigned long int x
#define sfr_l(x) extern volatile unsigned long int x
#define sfrb_(x,x_) extern volatile unsigned char x __asm__(#x_)
#define sfrw_(x,x_) extern volatile unsigned int x __asm__(#x_)
#define sfra_(x,x_) extern volatile unsigned long int x __asm__(#x_)
#define sfrl_(x,x_) extern volatile unsigned long int x __asm__(#x_)
#define sfrb(x,x_) sfrb_(x,x_)
#define sfrw(x,x_) sfrw_(x,x_)
#define sfra(x,x_) sfra_(x,x_)
#define sfrl(x,x_) sfrl_(x,x_)
#define const_sfrb(x,x_) const sfrb_(x,x_)
#define const_sfrw(x,x_) const sfrw_(x,x_)
#define const_sfra(x,x_) const sfra_(x,x_)
#define const_sfrl(x,x_) const sfrl_(x,x_)
#define __interrupt __attribute__((__interrupt__))
#define __interrupt_vec(vec) __attribute__((interrupt(vec)))
#endif /* defined(__ASSEMBLER__) */
#endif /* _IOMACROS_H_ */

1920
hw/bsp/msp_exp430f5529lp/msp430.h
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4789
hw/bsp/msp_exp430f5529lp/msp430f5529.h
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457
hw/bsp/msp_exp430f5529lp/msp430f5529.ld
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@ -1,457 +0,0 @@
/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430F5529 devices. */
/* Version: 1.207 */
/* Default linker script, for normal executables */
OUTPUT_ARCH(msp430)
ENTRY(_start)
MEMORY {
SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
BSL : ORIGIN = 0x1000, LENGTH = 0x0800
RAM : ORIGIN = 0x2400, LENGTH = 0x2000 /* END=0x43FF, size 8192 */
USBRAM : ORIGIN = 0x1C00, LENGTH = 0x0800
INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */
INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */
INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */
INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */
INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */
ROM (rx) : ORIGIN = 0x4400, LENGTH = 0xBB80 /* END=0xFF7F, size 48000 */
HIROM (rx) : ORIGIN = 0x00010000, LENGTH = 0x000143FF
VECT1 : ORIGIN = 0xFF80, LENGTH = 0x0002
VECT2 : ORIGIN = 0xFF82, LENGTH = 0x0002
VECT3 : ORIGIN = 0xFF84, LENGTH = 0x0002
VECT4 : ORIGIN = 0xFF86, LENGTH = 0x0002
VECT5 : ORIGIN = 0xFF88, LENGTH = 0x0002
VECT6 : ORIGIN = 0xFF8A, LENGTH = 0x0002
VECT7 : ORIGIN = 0xFF8C, LENGTH = 0x0002
VECT8 : ORIGIN = 0xFF8E, LENGTH = 0x0002
VECT9 : ORIGIN = 0xFF90, LENGTH = 0x0002
VECT10 : ORIGIN = 0xFF92, LENGTH = 0x0002
VECT11 : ORIGIN = 0xFF94, LENGTH = 0x0002
VECT12 : ORIGIN = 0xFF96, LENGTH = 0x0002
VECT13 : ORIGIN = 0xFF98, LENGTH = 0x0002
VECT14 : ORIGIN = 0xFF9A, LENGTH = 0x0002
VECT15 : ORIGIN = 0xFF9C, LENGTH = 0x0002
VECT16 : ORIGIN = 0xFF9E, LENGTH = 0x0002
VECT17 : ORIGIN = 0xFFA0, LENGTH = 0x0002
VECT18 : ORIGIN = 0xFFA2, LENGTH = 0x0002
VECT19 : ORIGIN = 0xFFA4, LENGTH = 0x0002
VECT20 : ORIGIN = 0xFFA6, LENGTH = 0x0002
VECT21 : ORIGIN = 0xFFA8, LENGTH = 0x0002
VECT22 : ORIGIN = 0xFFAA, LENGTH = 0x0002
VECT23 : ORIGIN = 0xFFAC, LENGTH = 0x0002
VECT24 : ORIGIN = 0xFFAE, LENGTH = 0x0002
VECT25 : ORIGIN = 0xFFB0, LENGTH = 0x0002
VECT26 : ORIGIN = 0xFFB2, LENGTH = 0x0002
VECT27 : ORIGIN = 0xFFB4, LENGTH = 0x0002
VECT28 : ORIGIN = 0xFFB6, LENGTH = 0x0002
VECT29 : ORIGIN = 0xFFB8, LENGTH = 0x0002
VECT30 : ORIGIN = 0xFFBA, LENGTH = 0x0002
VECT31 : ORIGIN = 0xFFBC, LENGTH = 0x0002
VECT32 : ORIGIN = 0xFFBE, LENGTH = 0x0002
VECT33 : ORIGIN = 0xFFC0, LENGTH = 0x0002
VECT34 : ORIGIN = 0xFFC2, LENGTH = 0x0002
VECT35 : ORIGIN = 0xFFC4, LENGTH = 0x0002
VECT36 : ORIGIN = 0xFFC6, LENGTH = 0x0002
VECT37 : ORIGIN = 0xFFC8, LENGTH = 0x0002
VECT38 : ORIGIN = 0xFFCA, LENGTH = 0x0002
VECT39 : ORIGIN = 0xFFCC, LENGTH = 0x0002
VECT40 : ORIGIN = 0xFFCE, LENGTH = 0x0002
VECT41 : ORIGIN = 0xFFD0, LENGTH = 0x0002
VECT42 : ORIGIN = 0xFFD2, LENGTH = 0x0002
VECT43 : ORIGIN = 0xFFD4, LENGTH = 0x0002
VECT44 : ORIGIN = 0xFFD6, LENGTH = 0x0002
VECT45 : ORIGIN = 0xFFD8, LENGTH = 0x0002
VECT46 : ORIGIN = 0xFFDA, LENGTH = 0x0002
VECT47 : ORIGIN = 0xFFDC, LENGTH = 0x0002
VECT48 : ORIGIN = 0xFFDE, LENGTH = 0x0002
VECT49 : ORIGIN = 0xFFE0, LENGTH = 0x0002
VECT50 : ORIGIN = 0xFFE2, LENGTH = 0x0002
VECT51 : ORIGIN = 0xFFE4, LENGTH = 0x0002
VECT52 : ORIGIN = 0xFFE6, LENGTH = 0x0002
VECT53 : ORIGIN = 0xFFE8, LENGTH = 0x0002
VECT54 : ORIGIN = 0xFFEA, LENGTH = 0x0002
VECT55 : ORIGIN = 0xFFEC, LENGTH = 0x0002
VECT56 : ORIGIN = 0xFFEE, LENGTH = 0x0002
VECT57 : ORIGIN = 0xFFF0, LENGTH = 0x0002
VECT58 : ORIGIN = 0xFFF2, LENGTH = 0x0002
VECT59 : ORIGIN = 0xFFF4, LENGTH = 0x0002
VECT60 : ORIGIN = 0xFFF6, LENGTH = 0x0002
VECT61 : ORIGIN = 0xFFF8, LENGTH = 0x0002
VECT62 : ORIGIN = 0xFFFA, LENGTH = 0x0002
VECT63 : ORIGIN = 0xFFFC, LENGTH = 0x0002
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
}
SECTIONS
{
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15
__interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16
__interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17
__interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18
__interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19
__interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) } > VECT20
__interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) } > VECT21
__interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) } > VECT22
__interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) } > VECT23
__interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) } > VECT24
__interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) } > VECT25
__interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) } > VECT26
__interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) } > VECT27
__interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) } > VECT28
__interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) } > VECT29
__interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) } > VECT30
__interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) } > VECT31
__interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) } > VECT32
__interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) } > VECT33
__interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) } > VECT34
__interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) } > VECT35
__interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) } > VECT36
__interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) } > VECT37
__interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) } > VECT38
__interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) } > VECT39
__interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) } > VECT40
__interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) } > VECT41
__interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_rtc)) } > VECT42
__interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_port2)) } > VECT43
__interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT44
__interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT45
__interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_usci_b1)) } > VECT46
__interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_usci_a1)) } > VECT47
__interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_port1)) } > VECT48
__interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT49
__interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT50
__interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_dma)) } > VECT51
__interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_usb_ubm)) } > VECT52
__interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT53
__interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT54
__interrupt_vector_55 : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_adc12)) } > VECT55
__interrupt_vector_56 : { KEEP (*(__interrupt_vector_56)) KEEP (*(__interrupt_vector_usci_b0)) } > VECT56
__interrupt_vector_57 : { KEEP (*(__interrupt_vector_57)) KEEP (*(__interrupt_vector_usci_a0)) } > VECT57
__interrupt_vector_58 : { KEEP (*(__interrupt_vector_58)) KEEP (*(__interrupt_vector_wdt)) } > VECT58
__interrupt_vector_59 : { KEEP (*(__interrupt_vector_59)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT59
__interrupt_vector_60 : { KEEP (*(__interrupt_vector_60)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT60
__interrupt_vector_61 : { KEEP (*(__interrupt_vector_61)) KEEP (*(__interrupt_vector_comp_b)) } > VECT61
__interrupt_vector_62 : { KEEP (*(__interrupt_vector_62)) KEEP (*(__interrupt_vector_unmi)) } > VECT62
__interrupt_vector_63 : { KEEP (*(__interrupt_vector_63)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT63
__reset_vector :
{
KEEP (*(__interrupt_vector_64))
KEEP (*(__interrupt_vector_reset))
KEEP (*(.resetvec))
} > RESETVEC
.lower.rodata :
{
. = ALIGN(2);
*(.lower.rodata.* .lower.rodata)
} > ROM
.rodata :
{
. = ALIGN(2);
*(.plt)
. = ALIGN(2);
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
} > ROM
/* Note: This is a separate .rodata section for sections which are
read only but which older linkers treat as read-write.
This prevents older linkers from marking the entire .rodata
section as read-write. */
.rodata2 :
{
. = ALIGN(2);
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from from the
crtend.o file until after the sorted ctors. The .ctor section
from the crtend file contains the end of ctors marker and it
must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > ROM
.upper.rodata :
{
*(.upper.rodata.* .upper.rodata)
} > HIROM
.data :
{
. = ALIGN(2);
PROVIDE (__datastart = .);
*(.lower.data.* .lower.data)
. = ALIGN(2);
*(.either.data.* .either.data)
. = ALIGN(2);
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
. = ALIGN(2);
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(2);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT> ROM
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
PROVIDE(__romdatastart = LOADADDR(.data));
PROVIDE (__romdatacopysize = SIZEOF(.data));
.bss :
{
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.lower.bss.* .lower.bss)
. = ALIGN(2);
*(.either.bss.* .either.bss)
*(.dynbss)
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.bss));
/* This section contains data that is not initialised during load
or application reset. */
.noinit (NOLOAD) :
{
. = ALIGN(2);
PROVIDE (__noinit_start = .);
*(.noinit)
. = ALIGN(2);
PROVIDE (__noinit_end = .);
} > RAM
/* We create this section so that "end" will always be in the
RAM region (matching .stack below), even if the .bss
section is empty. */
.heap (NOLOAD) :
{
. = ALIGN(2);
__heap_start__ = .;
_end = __heap_start__;
PROVIDE (end = .);
KEEP (*(.heap))
_end = .;
PROVIDE (end = .);
/* This word is here so that the section is not empty, and thus
not discarded by the linker. The actual value does not matter
and is ignored. */
LONG(0);
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > RAM
/* WARNING: Do not place anything in RAM here.
The heap section must be the last section in RAM and the stack
section must be placed at the very end of the RAM region. */
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
/* This is just for crt0.S and interrupt handlers. */
.lowtext :
{
PROVIDE (_start = .);
. = ALIGN(2);
KEEP (*(SORT(.crt_*)))
KEEP (*(.lowtext))
} > ROM
.lower.text :
{
. = ALIGN(2);
*(.lower.text.* .lower.text)
} > ROM
.text :
{
. = ALIGN(2);
*(.text .stub .text.* .gnu.linkonce.t.* .text:*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
} > ROM
.upper.text :
{
. = ALIGN(2);
*(.upper.text.* .upper.text)
} > HIROM
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
.infoB : {} > INFOB
.infoC : {} > INFOC
.infoD : {} > INFOD
/* Make sure that upper data sections are not used. */
.upper :
{
*(.upper.bss.* .upper.bss)
*(.upper.data.* .upper.data)
ASSERT (SIZEOF(.upper) == 0, "This MCU does not support placing read/write data into high memory");
} > HIROM
/* The rest are all not normally part of the runtime image. */
.MSP430.attributes 0 :
{
KEEP (*(.MSP430.attributes))
KEEP (*(.gnu.attributes))
KEEP (*(__TI_build_attributes))
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1. */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions. */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2. */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2. */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions. */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
/* DWARF Extension. */
.debug_macro 0 : { *(.debug_macro) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
INCLUDE msp430f5529_symbols.ld

867
hw/bsp/msp_exp430f5529lp/msp430f5529_symbols.ld
View File

@ -1,867 +0,0 @@
/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430F5529 devices. */
/* Version: 1.207 */
/************************************************************
* STANDARD BITS
************************************************************/
/************************************************************
* STATUS REGISTER BITS
************************************************************/
/************************************************************
* PERIPHERAL FILE MAP
************************************************************/
/************************************************************
* ADC12 PLUS
************************************************************/
PROVIDE(ADC12CTL0 = 0x0700);
PROVIDE(ADC12CTL0_L = 0x0700);
PROVIDE(ADC12CTL0_H = 0x0701);
PROVIDE(ADC12CTL1 = 0x0702);
PROVIDE(ADC12CTL1_L = 0x0702);
PROVIDE(ADC12CTL1_H = 0x0703);
PROVIDE(ADC12CTL2 = 0x0704);
PROVIDE(ADC12CTL2_L = 0x0704);
PROVIDE(ADC12CTL2_H = 0x0705);
PROVIDE(ADC12IFG = 0x070A);
PROVIDE(ADC12IFG_L = 0x070A);
PROVIDE(ADC12IFG_H = 0x070B);
PROVIDE(ADC12IE = 0x070C);
PROVIDE(ADC12IE_L = 0x070C);
PROVIDE(ADC12IE_H = 0x070D);
PROVIDE(ADC12IV = 0x070E);
PROVIDE(ADC12IV_L = 0x070E);
PROVIDE(ADC12IV_H = 0x070F);
PROVIDE(ADC12MEM0 = 0x0720);
PROVIDE(ADC12MEM0_L = 0x0720);
PROVIDE(ADC12MEM0_H = 0x0721);
PROVIDE(ADC12MEM1 = 0x0722);
PROVIDE(ADC12MEM1_L = 0x0722);
PROVIDE(ADC12MEM1_H = 0x0723);
PROVIDE(ADC12MEM2 = 0x0724);
PROVIDE(ADC12MEM2_L = 0x0724);
PROVIDE(ADC12MEM2_H = 0x0725);
PROVIDE(ADC12MEM3 = 0x0726);
PROVIDE(ADC12MEM3_L = 0x0726);
PROVIDE(ADC12MEM3_H = 0x0727);
PROVIDE(ADC12MEM4 = 0x0728);
PROVIDE(ADC12MEM4_L = 0x0728);
PROVIDE(ADC12MEM4_H = 0x0729);
PROVIDE(ADC12MEM5 = 0x072A);
PROVIDE(ADC12MEM5_L = 0x072A);
PROVIDE(ADC12MEM5_H = 0x072B);
PROVIDE(ADC12MEM6 = 0x072C);
PROVIDE(ADC12MEM6_L = 0x072C);
PROVIDE(ADC12MEM6_H = 0x072D);
PROVIDE(ADC12MEM7 = 0x072E);
PROVIDE(ADC12MEM7_L = 0x072E);
PROVIDE(ADC12MEM7_H = 0x072F);
PROVIDE(ADC12MEM8 = 0x0730);
PROVIDE(ADC12MEM8_L = 0x0730);
PROVIDE(ADC12MEM8_H = 0x0731);
PROVIDE(ADC12MEM9 = 0x0732);
PROVIDE(ADC12MEM9_L = 0x0732);
PROVIDE(ADC12MEM9_H = 0x0733);
PROVIDE(ADC12MEM10 = 0x0734);
PROVIDE(ADC12MEM10_L = 0x0734);
PROVIDE(ADC12MEM10_H = 0x0735);
PROVIDE(ADC12MEM11 = 0x0736);
PROVIDE(ADC12MEM11_L = 0x0736);
PROVIDE(ADC12MEM11_H = 0x0737);
PROVIDE(ADC12MEM12 = 0x0738);
PROVIDE(ADC12MEM12_L = 0x0738);
PROVIDE(ADC12MEM12_H = 0x0739);
PROVIDE(ADC12MEM13 = 0x073A);
PROVIDE(ADC12MEM13_L = 0x073A);
PROVIDE(ADC12MEM13_H = 0x073B);
PROVIDE(ADC12MEM14 = 0x073C);
PROVIDE(ADC12MEM14_L = 0x073C);
PROVIDE(ADC12MEM14_H = 0x073D);
PROVIDE(ADC12MEM15 = 0x073E);
PROVIDE(ADC12MEM15_L = 0x073E);
PROVIDE(ADC12MEM15_H = 0x073F);
PROVIDE(ADC12MCTL0 = 0x0710);
PROVIDE(ADC12MCTL1 = 0x0711);
PROVIDE(ADC12MCTL2 = 0x0712);
PROVIDE(ADC12MCTL3 = 0x0713);
PROVIDE(ADC12MCTL4 = 0x0714);
PROVIDE(ADC12MCTL5 = 0x0715);
PROVIDE(ADC12MCTL6 = 0x0716);
PROVIDE(ADC12MCTL7 = 0x0717);
PROVIDE(ADC12MCTL8 = 0x0718);
PROVIDE(ADC12MCTL9 = 0x0719);
PROVIDE(ADC12MCTL10 = 0x071A);
PROVIDE(ADC12MCTL11 = 0x071B);
PROVIDE(ADC12MCTL12 = 0x071C);
PROVIDE(ADC12MCTL13 = 0x071D);
PROVIDE(ADC12MCTL14 = 0x071E);
PROVIDE(ADC12MCTL15 = 0x071F);
/************************************************************
* Comparator B
************************************************************/
PROVIDE(CBCTL0 = 0x08C0);
PROVIDE(CBCTL0_L = 0x08C0);
PROVIDE(CBCTL0_H = 0x08C1);
PROVIDE(CBCTL1 = 0x08C2);
PROVIDE(CBCTL1_L = 0x08C2);
PROVIDE(CBCTL1_H = 0x08C3);
PROVIDE(CBCTL2 = 0x08C4);
PROVIDE(CBCTL2_L = 0x08C4);
PROVIDE(CBCTL2_H = 0x08C5);
PROVIDE(CBCTL3 = 0x08C6);
PROVIDE(CBCTL3_L = 0x08C6);
PROVIDE(CBCTL3_H = 0x08C7);
PROVIDE(CBINT = 0x08CC);
PROVIDE(CBINT_L = 0x08CC);
PROVIDE(CBINT_H = 0x08CD);
PROVIDE(CBIV = 0x08CE);
/*************************************************************
* CRC Module
*************************************************************/
PROVIDE(CRCDI = 0x0150);
PROVIDE(CRCDI_L = 0x0150);
PROVIDE(CRCDI_H = 0x0151);
PROVIDE(CRCDIRB = 0x0152);
PROVIDE(CRCDIRB_L = 0x0152);
PROVIDE(CRCDIRB_H = 0x0153);
PROVIDE(CRCINIRES = 0x0154);
PROVIDE(CRCINIRES_L = 0x0154);
PROVIDE(CRCINIRES_H = 0x0155);
PROVIDE(CRCRESR = 0x0156);
PROVIDE(CRCRESR_L = 0x0156);
PROVIDE(CRCRESR_H = 0x0157);
/************************************************************
* DMA_X
************************************************************/
PROVIDE(DMACTL0 = 0x0500);
PROVIDE(DMACTL1 = 0x0502);
PROVIDE(DMACTL2 = 0x0504);
PROVIDE(DMACTL3 = 0x0506);
PROVIDE(DMACTL4 = 0x0508);
PROVIDE(DMAIV = 0x050E);
PROVIDE(DMA0CTL = 0x0510);
PROVIDE(DMA0SA = 0x0512);
PROVIDE(DMA0SAL = 0x0512);
PROVIDE(DMA0DA = 0x0516);
PROVIDE(DMA0DAL = 0x0516);
PROVIDE(DMA0SZ = 0x051A);
PROVIDE(DMA1CTL = 0x0520);
PROVIDE(DMA1SA = 0x0522);
PROVIDE(DMA1SAL = 0x0522);
PROVIDE(DMA1DA = 0x0526);
PROVIDE(DMA1DAL = 0x0526);
PROVIDE(DMA1SZ = 0x052A);
PROVIDE(DMA2CTL = 0x0530);
PROVIDE(DMA2SA = 0x0532);
PROVIDE(DMA2SAL = 0x0532);
PROVIDE(DMA2DA = 0x0536);
PROVIDE(DMA2DAL = 0x0536);
PROVIDE(DMA2SZ = 0x053A);
/*************************************************************
* Flash Memory
*************************************************************/
PROVIDE(FCTL1 = 0x0140);
PROVIDE(FCTL1_L = 0x0140);
PROVIDE(FCTL1_H = 0x0141);
PROVIDE(FCTL3 = 0x0144);
PROVIDE(FCTL3_L = 0x0144);
PROVIDE(FCTL3_H = 0x0145);
PROVIDE(FCTL4 = 0x0146);
PROVIDE(FCTL4_L = 0x0146);
PROVIDE(FCTL4_H = 0x0147);
/************************************************************
* HARDWARE MULTIPLIER 32Bit
************************************************************/
PROVIDE(MPY = 0x04C0);
PROVIDE(MPY_L = 0x04C0);
PROVIDE(MPY_H = 0x04C1);
PROVIDE(MPYS = 0x04C2);
PROVIDE(MPYS_L = 0x04C2);
PROVIDE(MPYS_H = 0x04C3);
PROVIDE(MAC = 0x04C4);
PROVIDE(MAC_L = 0x04C4);
PROVIDE(MAC_H = 0x04C5);
PROVIDE(MACS = 0x04C6);
PROVIDE(MACS_L = 0x04C6);
PROVIDE(MACS_H = 0x04C7);
PROVIDE(OP2 = 0x04C8);
PROVIDE(OP2_L = 0x04C8);
PROVIDE(OP2_H = 0x04C9);
PROVIDE(RESLO = 0x04CA);
PROVIDE(RESLO_L = 0x04CA);
PROVIDE(RESLO_H = 0x04CB);
PROVIDE(RESHI = 0x04CC);
PROVIDE(RESHI_L = 0x04CC);
PROVIDE(RESHI_H = 0x04CD);
PROVIDE(SUMEXT = 0x04CE);
PROVIDE(SUMEXT_L = 0x04CE);
PROVIDE(SUMEXT_H = 0x04CF);
PROVIDE(MPY32L = 0x04D0);
PROVIDE(MPY32L_L = 0x04D0);
PROVIDE(MPY32L_H = 0x04D1);
PROVIDE(MPY32H = 0x04D2);
PROVIDE(MPY32H_L = 0x04D2);
PROVIDE(MPY32H_H = 0x04D3);
PROVIDE(MPYS32L = 0x04D4);
PROVIDE(MPYS32L_L = 0x04D4);
PROVIDE(MPYS32L_H = 0x04D5);
PROVIDE(MPYS32H = 0x04D6);
PROVIDE(MPYS32H_L = 0x04D6);
PROVIDE(MPYS32H_H = 0x04D7);
PROVIDE(MAC32L = 0x04D8);
PROVIDE(MAC32L_L = 0x04D8);
PROVIDE(MAC32L_H = 0x04D9);
PROVIDE(MAC32H = 0x04DA);
PROVIDE(MAC32H_L = 0x04DA);
PROVIDE(MAC32H_H = 0x04DB);
PROVIDE(MACS32L = 0x04DC);
PROVIDE(MACS32L_L = 0x04DC);
PROVIDE(MACS32L_H = 0x04DD);
PROVIDE(MACS32H = 0x04DE);
PROVIDE(MACS32H_L = 0x04DE);
PROVIDE(MACS32H_H = 0x04DF);
PROVIDE(OP2L = 0x04E0);
PROVIDE(OP2L_L = 0x04E0);
PROVIDE(OP2L_H = 0x04E1);
PROVIDE(OP2H = 0x04E2);
PROVIDE(OP2H_L = 0x04E2);
PROVIDE(OP2H_H = 0x04E3);
PROVIDE(RES0 = 0x04E4);
PROVIDE(RES0_L = 0x04E4);
PROVIDE(RES0_H = 0x04E5);
PROVIDE(RES1 = 0x04E6);
PROVIDE(RES1_L = 0x04E6);
PROVIDE(RES1_H = 0x04E7);
PROVIDE(RES2 = 0x04E8);
PROVIDE(RES2_L = 0x04E8);
PROVIDE(RES2_H = 0x04E9);
PROVIDE(RES3 = 0x04EA);
PROVIDE(RES3_L = 0x04EA);
PROVIDE(RES3_H = 0x04EB);
PROVIDE(MPY32CTL0 = 0x04EC);
PROVIDE(MPY32CTL0_L = 0x04EC);
PROVIDE(MPY32CTL0_H = 0x04ED);
/************************************************************
* DIGITAL I/O Port1/2 Pull up / Pull down Resistors
************************************************************/
PROVIDE(PAIN = 0x0200);
PROVIDE(PAIN_L = 0x0200);
PROVIDE(PAIN_H = 0x0201);
PROVIDE(PAOUT = 0x0202);
PROVIDE(PAOUT_L = 0x0202);
PROVIDE(PAOUT_H = 0x0203);
PROVIDE(PADIR = 0x0204);
PROVIDE(PADIR_L = 0x0204);
PROVIDE(PADIR_H = 0x0205);
PROVIDE(PAREN = 0x0206);
PROVIDE(PAREN_L = 0x0206);
PROVIDE(PAREN_H = 0x0207);
PROVIDE(PADS = 0x0208);
PROVIDE(PADS_L = 0x0208);
PROVIDE(PADS_H = 0x0209);
PROVIDE(PASEL = 0x020A);
PROVIDE(PASEL_L = 0x020A);
PROVIDE(PASEL_H = 0x020B);
PROVIDE(PAIES = 0x0218);
PROVIDE(PAIES_L = 0x0218);
PROVIDE(PAIES_H = 0x0219);
PROVIDE(PAIE = 0x021A);
PROVIDE(PAIE_L = 0x021A);
PROVIDE(PAIE_H = 0x021B);
PROVIDE(PAIFG = 0x021C);
PROVIDE(PAIFG_L = 0x021C);
PROVIDE(PAIFG_H = 0x021D);
PROVIDE(P1IV = 0x020E);
PROVIDE(P2IV = 0x021E);
/************************************************************
* DIGITAL I/O Port3/4 Pull up / Pull down Resistors
************************************************************/
PROVIDE(PBIN = 0x0220);
PROVIDE(PBIN_L = 0x0220);
PROVIDE(PBIN_H = 0x0221);
PROVIDE(PBOUT = 0x0222);
PROVIDE(PBOUT_L = 0x0222);
PROVIDE(PBOUT_H = 0x0223);
PROVIDE(PBDIR = 0x0224);
PROVIDE(PBDIR_L = 0x0224);
PROVIDE(PBDIR_H = 0x0225);
PROVIDE(PBREN = 0x0226);
PROVIDE(PBREN_L = 0x0226);
PROVIDE(PBREN_H = 0x0227);
PROVIDE(PBDS = 0x0228);
PROVIDE(PBDS_L = 0x0228);
PROVIDE(PBDS_H = 0x0229);
PROVIDE(PBSEL = 0x022A);
PROVIDE(PBSEL_L = 0x022A);
PROVIDE(PBSEL_H = 0x022B);
/************************************************************
* DIGITAL I/O Port5/6 Pull up / Pull down Resistors
************************************************************/
PROVIDE(PCIN = 0x0240);
PROVIDE(PCIN_L = 0x0240);
PROVIDE(PCIN_H = 0x0241);
PROVIDE(PCOUT = 0x0242);
PROVIDE(PCOUT_L = 0x0242);
PROVIDE(PCOUT_H = 0x0243);
PROVIDE(PCDIR = 0x0244);
PROVIDE(PCDIR_L = 0x0244);
PROVIDE(PCDIR_H = 0x0245);
PROVIDE(PCREN = 0x0246);
PROVIDE(PCREN_L = 0x0246);
PROVIDE(PCREN_H = 0x0247);
PROVIDE(PCDS = 0x0248);
PROVIDE(PCDS_L = 0x0248);
PROVIDE(PCDS_H = 0x0249);
PROVIDE(PCSEL = 0x024A);
PROVIDE(PCSEL_L = 0x024A);
PROVIDE(PCSEL_H = 0x024B);
/************************************************************
* DIGITAL I/O Port7/8 Pull up / Pull down Resistors
************************************************************/
PROVIDE(PDIN = 0x0260);
PROVIDE(PDIN_L = 0x0260);
PROVIDE(PDIN_H = 0x0261);
PROVIDE(PDOUT = 0x0262);
PROVIDE(PDOUT_L = 0x0262);
PROVIDE(PDOUT_H = 0x0263);
PROVIDE(PDDIR = 0x0264);
PROVIDE(PDDIR_L = 0x0264);
PROVIDE(PDDIR_H = 0x0265);
PROVIDE(PDREN = 0x0266);
PROVIDE(PDREN_L = 0x0266);
PROVIDE(PDREN_H = 0x0267);
PROVIDE(PDDS = 0x0268);
PROVIDE(PDDS_L = 0x0268);
PROVIDE(PDDS_H = 0x0269);
PROVIDE(PDSEL = 0x026A);
PROVIDE(PDSEL_L = 0x026A);
PROVIDE(PDSEL_H = 0x026B);
/************************************************************
* DIGITAL I/O PortJ Pull up / Pull down Resistors
************************************************************/
PROVIDE(PJIN = 0x0320);
PROVIDE(PJIN_L = 0x0320);
PROVIDE(PJIN_H = 0x0321);
PROVIDE(PJOUT = 0x0322);
PROVIDE(PJOUT_L = 0x0322);
PROVIDE(PJOUT_H = 0x0323);
PROVIDE(PJDIR = 0x0324);
PROVIDE(PJDIR_L = 0x0324);
PROVIDE(PJDIR_H = 0x0325);
PROVIDE(PJREN = 0x0326);
PROVIDE(PJREN_L = 0x0326);
PROVIDE(PJREN_H = 0x0327);
PROVIDE(PJDS = 0x0328);
PROVIDE(PJDS_L = 0x0328);
PROVIDE(PJDS_H = 0x0329);
/************************************************************
* PORT MAPPING CONTROLLER
************************************************************/
PROVIDE(PMAPKEYID = 0x01C0);
PROVIDE(PMAPKEYID_L = 0x01C0);
PROVIDE(PMAPKEYID_H = 0x01C1);
PROVIDE(PMAPCTL = 0x01C2);
PROVIDE(PMAPCTL_L = 0x01C2);
PROVIDE(PMAPCTL_H = 0x01C3);
/************************************************************
* PORT 4 MAPPING CONTROLLER
************************************************************/
PROVIDE(P4MAP01 = 0x01E0);
PROVIDE(P4MAP01_L = 0x01E0);
PROVIDE(P4MAP01_H = 0x01E1);
PROVIDE(P4MAP23 = 0x01E2);
PROVIDE(P4MAP23_L = 0x01E2);
PROVIDE(P4MAP23_H = 0x01E3);
PROVIDE(P4MAP45 = 0x01E4);
PROVIDE(P4MAP45_L = 0x01E4);
PROVIDE(P4MAP45_H = 0x01E5);
PROVIDE(P4MAP67 = 0x01E6);
PROVIDE(P4MAP67_L = 0x01E6);
PROVIDE(P4MAP67_H = 0x01E7);
/************************************************************
* PMM - Power Management System
************************************************************/
PROVIDE(PMMCTL0 = 0x0120);
PROVIDE(PMMCTL0_L = 0x0120);
PROVIDE(PMMCTL0_H = 0x0121);
PROVIDE(PMMCTL1 = 0x0122);
PROVIDE(PMMCTL1_L = 0x0122);
PROVIDE(PMMCTL1_H = 0x0123);
PROVIDE(SVSMHCTL = 0x0124);
PROVIDE(SVSMHCTL_L = 0x0124);
PROVIDE(SVSMHCTL_H = 0x0125);
PROVIDE(SVSMLCTL = 0x0126);
PROVIDE(SVSMLCTL_L = 0x0126);
PROVIDE(SVSMLCTL_H = 0x0127);
PROVIDE(SVSMIO = 0x0128);
PROVIDE(SVSMIO_L = 0x0128);
PROVIDE(SVSMIO_H = 0x0129);
PROVIDE(PMMIFG = 0x012C);
PROVIDE(PMMIFG_L = 0x012C);
PROVIDE(PMMIFG_H = 0x012D);
PROVIDE(PMMRIE = 0x012E);
PROVIDE(PMMRIE_L = 0x012E);
PROVIDE(PMMRIE_H = 0x012F);
PROVIDE(PM5CTL0 = 0x0130);
PROVIDE(PM5CTL0_L = 0x0130);
PROVIDE(PM5CTL0_H = 0x0131);
/*************************************************************
* RAM Control Module
*************************************************************/
PROVIDE(RCCTL0 = 0x0158);
PROVIDE(RCCTL0_L = 0x0158);
PROVIDE(RCCTL0_H = 0x0159);
/************************************************************
* Shared Reference
************************************************************/
PROVIDE(REFCTL0 = 0x01B0);
PROVIDE(REFCTL0_L = 0x01B0);
PROVIDE(REFCTL0_H = 0x01B1);
/************************************************************
* Real Time Clock
************************************************************/
PROVIDE(RTCCTL01 = 0x04A0);
PROVIDE(RTCCTL01_L = 0x04A0);
PROVIDE(RTCCTL01_H = 0x04A1);
PROVIDE(RTCCTL23 = 0x04A2);
PROVIDE(RTCCTL23_L = 0x04A2);
PROVIDE(RTCCTL23_H = 0x04A3);
PROVIDE(RTCPS0CTL = 0x04A8);
PROVIDE(RTCPS0CTL_L = 0x04A8);
PROVIDE(RTCPS0CTL_H = 0x04A9);
PROVIDE(RTCPS1CTL = 0x04AA);
PROVIDE(RTCPS1CTL_L = 0x04AA);
PROVIDE(RTCPS1CTL_H = 0x04AB);
PROVIDE(RTCPS = 0x04AC);
PROVIDE(RTCPS_L = 0x04AC);
PROVIDE(RTCPS_H = 0x04AD);
PROVIDE(RTCIV = 0x04AE);
PROVIDE(RTCTIM0 = 0x04B0);
PROVIDE(RTCTIM0_L = 0x04B0);
PROVIDE(RTCTIM0_H = 0x04B1);
PROVIDE(RTCTIM1 = 0x04B2);
PROVIDE(RTCTIM1_L = 0x04B2);
PROVIDE(RTCTIM1_H = 0x04B3);
PROVIDE(RTCDATE = 0x04B4);
PROVIDE(RTCDATE_L = 0x04B4);
PROVIDE(RTCDATE_H = 0x04B5);
PROVIDE(RTCYEAR = 0x04B6);
PROVIDE(RTCYEAR_L = 0x04B6);
PROVIDE(RTCYEAR_H = 0x04B7);
PROVIDE(RTCAMINHR = 0x04B8);
PROVIDE(RTCAMINHR_L = 0x04B8);
PROVIDE(RTCAMINHR_H = 0x04B9);
PROVIDE(RTCADOWDAY = 0x04BA);
PROVIDE(RTCADOWDAY_L = 0x04BA);
PROVIDE(RTCADOWDAY_H = 0x04BB);
/************************************************************
* SFR - Special Function Register Module
************************************************************/
PROVIDE(SFRIE1 = 0x0100);
PROVIDE(SFRIE1_L = 0x0100);
PROVIDE(SFRIE1_H = 0x0101);
PROVIDE(SFRIFG1 = 0x0102);
PROVIDE(SFRIFG1_L = 0x0102);
PROVIDE(SFRIFG1_H = 0x0103);
PROVIDE(SFRRPCR = 0x0104);
PROVIDE(SFRRPCR_L = 0x0104);
PROVIDE(SFRRPCR_H = 0x0105);
/************************************************************
* SYS - System Module
************************************************************/
PROVIDE(SYSCTL = 0x0180);
PROVIDE(SYSCTL_L = 0x0180);
PROVIDE(SYSCTL_H = 0x0181);
PROVIDE(SYSBSLC = 0x0182);
PROVIDE(SYSBSLC_L = 0x0182);
PROVIDE(SYSBSLC_H = 0x0183);
PROVIDE(SYSJMBC = 0x0186);
PROVIDE(SYSJMBC_L = 0x0186);
PROVIDE(SYSJMBC_H = 0x0187);
PROVIDE(SYSJMBI0 = 0x0188);
PROVIDE(SYSJMBI0_L = 0x0188);
PROVIDE(SYSJMBI0_H = 0x0189);
PROVIDE(SYSJMBI1 = 0x018A);
PROVIDE(SYSJMBI1_L = 0x018A);
PROVIDE(SYSJMBI1_H = 0x018B);
PROVIDE(SYSJMBO0 = 0x018C);
PROVIDE(SYSJMBO0_L = 0x018C);
PROVIDE(SYSJMBO0_H = 0x018D);
PROVIDE(SYSJMBO1 = 0x018E);
PROVIDE(SYSJMBO1_L = 0x018E);
PROVIDE(SYSJMBO1_H = 0x018F);
PROVIDE(SYSBERRIV = 0x0198);
PROVIDE(SYSBERRIV_L = 0x0198);
PROVIDE(SYSBERRIV_H = 0x0199);
PROVIDE(SYSUNIV = 0x019A);
PROVIDE(SYSUNIV_L = 0x019A);
PROVIDE(SYSUNIV_H = 0x019B);
PROVIDE(SYSSNIV = 0x019C);
PROVIDE(SYSSNIV_L = 0x019C);
PROVIDE(SYSSNIV_H = 0x019D);
PROVIDE(SYSRSTIV = 0x019E);
PROVIDE(SYSRSTIV_L = 0x019E);
PROVIDE(SYSRSTIV_H = 0x019F);
/************************************************************
* Timer0_A5
************************************************************/
PROVIDE(TA0CTL = 0x0340);
PROVIDE(TA0CCTL0 = 0x0342);
PROVIDE(TA0CCTL1 = 0x0344);
PROVIDE(TA0CCTL2 = 0x0346);
PROVIDE(TA0CCTL3 = 0x0348);
PROVIDE(TA0CCTL4 = 0x034A);
PROVIDE(TA0R = 0x0350);
PROVIDE(TA0CCR0 = 0x0352);
PROVIDE(TA0CCR1 = 0x0354);
PROVIDE(TA0CCR2 = 0x0356);
PROVIDE(TA0CCR3 = 0x0358);
PROVIDE(TA0CCR4 = 0x035A);
PROVIDE(TA0IV = 0x036E);
PROVIDE(TA0EX0 = 0x0360);
/************************************************************
* Timer1_A3
************************************************************/
PROVIDE(TA1CTL = 0x0380);
PROVIDE(TA1CCTL0 = 0x0382);
PROVIDE(TA1CCTL1 = 0x0384);
PROVIDE(TA1CCTL2 = 0x0386);
PROVIDE(TA1R = 0x0390);
PROVIDE(TA1CCR0 = 0x0392);
PROVIDE(TA1CCR1 = 0x0394);
PROVIDE(TA1CCR2 = 0x0396);
PROVIDE(TA1IV = 0x03AE);
PROVIDE(TA1EX0 = 0x03A0);
/************************************************************
* Timer2_A3
************************************************************/
PROVIDE(TA2CTL = 0x0400);
PROVIDE(TA2CCTL0 = 0x0402);
PROVIDE(TA2CCTL1 = 0x0404);
PROVIDE(TA2CCTL2 = 0x0406);
PROVIDE(TA2R = 0x0410);
PROVIDE(TA2CCR0 = 0x0412);
PROVIDE(TA2CCR1 = 0x0414);
PROVIDE(TA2CCR2 = 0x0416);
PROVIDE(TA2IV = 0x042E);
PROVIDE(TA2EX0 = 0x0420);
/************************************************************
* Timer0_B7
************************************************************/
PROVIDE(TB0CTL = 0x03C0);
PROVIDE(TB0CCTL0 = 0x03C2);
PROVIDE(TB0CCTL1 = 0x03C4);
PROVIDE(TB0CCTL2 = 0x03C6);
PROVIDE(TB0CCTL3 = 0x03C8);
PROVIDE(TB0CCTL4 = 0x03CA);
PROVIDE(TB0CCTL5 = 0x03CC);
PROVIDE(TB0CCTL6 = 0x03CE);
PROVIDE(TB0R = 0x03D0);
PROVIDE(TB0CCR0 = 0x03D2);
PROVIDE(TB0CCR1 = 0x03D4);
PROVIDE(TB0CCR2 = 0x03D6);
PROVIDE(TB0CCR3 = 0x03D8);
PROVIDE(TB0CCR4 = 0x03DA);
PROVIDE(TB0CCR5 = 0x03DC);
PROVIDE(TB0CCR6 = 0x03DE);
PROVIDE(TB0EX0 = 0x03E0);
PROVIDE(TB0IV = 0x03EE);
/************************************************************
* USB
************************************************************/
PROVIDE(USBKEYID = 0x0900);
PROVIDE(USBKEYID_L = 0x0900);
PROVIDE(USBKEYID_H = 0x0901);
PROVIDE(USBCNF = 0x0902);
PROVIDE(USBCNF_L = 0x0902);
PROVIDE(USBCNF_H = 0x0903);
PROVIDE(USBPHYCTL = 0x0904);
PROVIDE(USBPHYCTL_L = 0x0904);
PROVIDE(USBPHYCTL_H = 0x0905);
PROVIDE(USBPWRCTL = 0x0908);
PROVIDE(USBPWRCTL_L = 0x0908);
PROVIDE(USBPWRCTL_H = 0x0909);
PROVIDE(USBPLLCTL = 0x0910);
PROVIDE(USBPLLCTL_L = 0x0910);
PROVIDE(USBPLLCTL_H = 0x0911);
PROVIDE(USBPLLDIVB = 0x0912);
PROVIDE(USBPLLDIVB_L = 0x0912);
PROVIDE(USBPLLDIVB_H = 0x0913);
PROVIDE(USBPLLIR = 0x0914);
PROVIDE(USBPLLIR_L = 0x0914);
PROVIDE(USBPLLIR_H = 0x0915);
PROVIDE(USBIEPCNF_0 = 0x0920);
PROVIDE(USBIEPCNT_0 = 0x0921);
PROVIDE(USBOEPCNF_0 = 0x0922);
PROVIDE(USBOEPCNT_0 = 0x0923);
PROVIDE(USBIEPIE = 0x092E);
PROVIDE(USBOEPIE = 0x092F);
PROVIDE(USBIEPIFG = 0x0930);
PROVIDE(USBOEPIFG = 0x0931);
PROVIDE(USBVECINT = 0x0932);
PROVIDE(USBVECINT_L = 0x0932);
PROVIDE(USBVECINT_H = 0x0933);
PROVIDE(USBMAINT = 0x0936);
PROVIDE(USBMAINT_L = 0x0936);
PROVIDE(USBMAINT_H = 0x0937);
PROVIDE(USBTSREG = 0x0938);
PROVIDE(USBTSREG_L = 0x0938);
PROVIDE(USBTSREG_H = 0x0939);
PROVIDE(USBFN = 0x093A);
PROVIDE(USBFN_L = 0x093A);
PROVIDE(USBFN_H = 0x093B);
PROVIDE(USBCTL = 0x093C);
PROVIDE(USBIE = 0x093D);
PROVIDE(USBIFG = 0x093E);
PROVIDE(USBFUNADR = 0x093F);
PROVIDE(USBIEPSIZXY_7 = 0x23FF);
PROVIDE(USBIEPBCTY_7 = 0x23FE);
PROVIDE(USBIEPBBAY_7 = 0x23FD);
PROVIDE(USBIEPBCTX_7 = 0x23FA);
PROVIDE(USBIEPBBAX_7 = 0x23F9);
PROVIDE(USBIEPCNF_7 = 0x23F8);
PROVIDE(USBIEPSIZXY_6 = 0x23F7);
PROVIDE(USBIEPBCTY_6 = 0x23F6);
PROVIDE(USBIEPBBAY_6 = 0x23F5);
PROVIDE(USBIEPBCTX_6 = 0x23F2);
PROVIDE(USBIEPBBAX_6 = 0x23F1);
PROVIDE(USBIEPCNF_6 = 0x23F0);
PROVIDE(USBIEPSIZXY_5 = 0x23EF);
PROVIDE(USBIEPBCTY_5 = 0x23EE);
PROVIDE(USBIEPBBAY_5 = 0x23ED);
PROVIDE(USBIEPBCTX_5 = 0x23EA);
PROVIDE(USBIEPBBAX_5 = 0x23E9);
PROVIDE(USBIEPCNF_5 = 0x23E8);
PROVIDE(USBIEPSIZXY_4 = 0x23E7);
PROVIDE(USBIEPBCTY_4 = 0x23E6);
PROVIDE(USBIEPBBAY_4 = 0x23E5);
PROVIDE(USBIEPBCTX_4 = 0x23E2);
PROVIDE(USBIEPBBAX_4 = 0x23E1);
PROVIDE(USBIEPCNF_4 = 0x23E0);
PROVIDE(USBIEPSIZXY_3 = 0x23DF);
PROVIDE(USBIEPBCTY_3 = 0x23DE);
PROVIDE(USBIEPBBAY_3 = 0x23DD);
PROVIDE(USBIEPBCTX_3 = 0x23DA);
PROVIDE(USBIEPBBAX_3 = 0x23D9);
PROVIDE(USBIEPCNF_3 = 0x23D8);
PROVIDE(USBIEPSIZXY_2 = 0x23D7);
PROVIDE(USBIEPBCTY_2 = 0x23D6);
PROVIDE(USBIEPBBAY_2 = 0x23D5);
PROVIDE(USBIEPBCTX_2 = 0x23D2);
PROVIDE(USBIEPBBAX_2 = 0x23D1);
PROVIDE(USBIEPCNF_2 = 0x23D0);
PROVIDE(USBIEPSIZXY_1 = 0x23CF);
PROVIDE(USBIEPBCTY_1 = 0x23CE);
PROVIDE(USBIEPBBAY_1 = 0x23CD);
PROVIDE(USBIEPBCTX_1 = 0x23CA);
PROVIDE(USBIEPBBAX_1 = 0x23C9);
PROVIDE(USBIEPCNF_1 = 0x23C8);
PROVIDE(USBOEPSIZXY_7 = 0x23BF);
PROVIDE(USBOEPBCTY_7 = 0x23BE);
PROVIDE(USBOEPBBAY_7 = 0x23BD);
PROVIDE(USBOEPBCTX_7 = 0x23BA);
PROVIDE(USBOEPBBAX_7 = 0x23B9);
PROVIDE(USBOEPCNF_7 = 0x23B8);
PROVIDE(USBOEPSIZXY_6 = 0x23B7);
PROVIDE(USBOEPBCTY_6 = 0x23B6);
PROVIDE(USBOEPBBAY_6 = 0x23B5);
PROVIDE(USBOEPBCTX_6 = 0x23B2);
PROVIDE(USBOEPBBAX_6 = 0x23B1);
PROVIDE(USBOEPCNF_6 = 0x23B0);
PROVIDE(USBOEPSIZXY_5 = 0x23AF);
PROVIDE(USBOEPBCTY_5 = 0x23AE);
PROVIDE(USBOEPBBAY_5 = 0x23AD);
PROVIDE(USBOEPBCTX_5 = 0x23AA);
PROVIDE(USBOEPBBAX_5 = 0x23A9);
PROVIDE(USBOEPCNF_5 = 0x23A8);
PROVIDE(USBOEPSIZXY_4 = 0x23A7);
PROVIDE(USBOEPBCTY_4 = 0x23A6);
PROVIDE(USBOEPBBAY_4 = 0x23A5);
PROVIDE(USBOEPBCTX_4 = 0x23A2);
PROVIDE(USBOEPBBAX_4 = 0x23A1);
PROVIDE(USBOEPCNF_4 = 0x23A0);
PROVIDE(USBOEPSIZXY_3 = 0x239F);
PROVIDE(USBOEPBCTY_3 = 0x239E);
PROVIDE(USBOEPBBAY_3 = 0x239D);
PROVIDE(USBOEPBCTX_3 = 0x239A);
PROVIDE(USBOEPBBAX_3 = 0x2399);
PROVIDE(USBOEPCNF_3 = 0x2398);
PROVIDE(USBOEPSIZXY_2 = 0x2397);
PROVIDE(USBOEPBCTY_2 = 0x2396);
PROVIDE(USBOEPBBAY_2 = 0x2395);
PROVIDE(USBOEPBCTX_2 = 0x2392);
PROVIDE(USBOEPBBAX_2 = 0x2391);
PROVIDE(USBOEPCNF_2 = 0x2390);
PROVIDE(USBOEPSIZXY_1 = 0x238F);
PROVIDE(USBOEPBCTY_1 = 0x238E);
PROVIDE(USBOEPBBAY_1 = 0x238D);
PROVIDE(USBOEPBCTX_1 = 0x238A);
PROVIDE(USBOEPBBAX_1 = 0x2389);
PROVIDE(USBOEPCNF_1 = 0x2388);
PROVIDE(USBSUBLK = 0x2380);
PROVIDE(USBIEP0BUF = 0x2378);
PROVIDE(USBOEP0BUF = 0x2370);
PROVIDE(USBTOPBUFF = 0x236F);
PROVIDE(USBSTABUFF = 0x1C00);
/************************************************************
* UNIFIED CLOCK SYSTEM
************************************************************/
PROVIDE(UCSCTL0 = 0x0160);
PROVIDE(UCSCTL0_L = 0x0160);
PROVIDE(UCSCTL0_H = 0x0161);
PROVIDE(UCSCTL1 = 0x0162);
PROVIDE(UCSCTL1_L = 0x0162);
PROVIDE(UCSCTL1_H = 0x0163);
PROVIDE(UCSCTL2 = 0x0164);
PROVIDE(UCSCTL2_L = 0x0164);
PROVIDE(UCSCTL2_H = 0x0165);
PROVIDE(UCSCTL3 = 0x0166);
PROVIDE(UCSCTL3_L = 0x0166);
PROVIDE(UCSCTL3_H = 0x0167);
PROVIDE(UCSCTL4 = 0x0168);
PROVIDE(UCSCTL4_L = 0x0168);
PROVIDE(UCSCTL4_H = 0x0169);
PROVIDE(UCSCTL5 = 0x016A);
PROVIDE(UCSCTL5_L = 0x016A);
PROVIDE(UCSCTL5_H = 0x016B);
PROVIDE(UCSCTL6 = 0x016C);
PROVIDE(UCSCTL6_L = 0x016C);
PROVIDE(UCSCTL6_H = 0x016D);
PROVIDE(UCSCTL7 = 0x016E);
PROVIDE(UCSCTL7_L = 0x016E);
PROVIDE(UCSCTL7_H = 0x016F);
PROVIDE(UCSCTL8 = 0x0170);
PROVIDE(UCSCTL8_L = 0x0170);
PROVIDE(UCSCTL8_H = 0x0171);
/************************************************************
* USCI A0
************************************************************/
PROVIDE(UCA0CTLW0 = 0x05C0);
PROVIDE(UCA0CTLW0_L = 0x05C0);
PROVIDE(UCA0CTLW0_H = 0x05C1);
PROVIDE(UCA0BRW = 0x05C6);
PROVIDE(UCA0BRW_L = 0x05C6);
PROVIDE(UCA0BRW_H = 0x05C7);
PROVIDE(UCA0MCTL = 0x05C8);
PROVIDE(UCA0STAT = 0x05CA);
PROVIDE(UCA0RXBUF = 0x05CC);
PROVIDE(UCA0TXBUF = 0x05CE);
PROVIDE(UCA0ABCTL = 0x05D0);
PROVIDE(UCA0IRCTL = 0x05D2);
PROVIDE(UCA0IRCTL_L = 0x05D2);
PROVIDE(UCA0IRCTL_H = 0x05D3);
PROVIDE(UCA0ICTL = 0x05DC);
PROVIDE(UCA0ICTL_L = 0x05DC);
PROVIDE(UCA0ICTL_H = 0x05DD);
PROVIDE(UCA0IV = 0x05DE);
/************************************************************
* USCI B0
************************************************************/
PROVIDE(UCB0CTLW0 = 0x05E0);
PROVIDE(UCB0CTLW0_L = 0x05E0);
PROVIDE(UCB0CTLW0_H = 0x05E1);
PROVIDE(UCB0BRW = 0x05E6);
PROVIDE(UCB0BRW_L = 0x05E6);
PROVIDE(UCB0BRW_H = 0x05E7);
PROVIDE(UCB0STAT = 0x05EA);
PROVIDE(UCB0RXBUF = 0x05EC);
PROVIDE(UCB0TXBUF = 0x05EE);
PROVIDE(UCB0I2COA = 0x05F0);
PROVIDE(UCB0I2COA_L = 0x05F0);
PROVIDE(UCB0I2COA_H = 0x05F1);
PROVIDE(UCB0I2CSA = 0x05F2);
PROVIDE(UCB0I2CSA_L = 0x05F2);
PROVIDE(UCB0I2CSA_H = 0x05F3);
PROVIDE(UCB0ICTL = 0x05FC);
PROVIDE(UCB0ICTL_L = 0x05FC);
PROVIDE(UCB0ICTL_H = 0x05FD);
PROVIDE(UCB0IV = 0x05FE);
/************************************************************
* USCI A1
************************************************************/
PROVIDE(UCA1CTLW0 = 0x0600);
PROVIDE(UCA1CTLW0_L = 0x0600);
PROVIDE(UCA1CTLW0_H = 0x0601);
PROVIDE(UCA1BRW = 0x0606);
PROVIDE(UCA1BRW_L = 0x0606);
PROVIDE(UCA1BRW_H = 0x0607);
PROVIDE(UCA1MCTL = 0x0608);
PROVIDE(UCA1STAT = 0x060A);
PROVIDE(UCA1RXBUF = 0x060C);
PROVIDE(UCA1TXBUF = 0x060E);
PROVIDE(UCA1ABCTL = 0x0610);
PROVIDE(UCA1IRCTL = 0x0612);
PROVIDE(UCA1IRCTL_L = 0x0612);
PROVIDE(UCA1IRCTL_H = 0x0613);
PROVIDE(UCA1ICTL = 0x061C);
PROVIDE(UCA1ICTL_L = 0x061C);
PROVIDE(UCA1ICTL_H = 0x061D);
PROVIDE(UCA1IV = 0x061E);
/************************************************************
* USCI B1
************************************************************/
PROVIDE(UCB1CTLW0 = 0x0620);
PROVIDE(UCB1CTLW0_L = 0x0620);
PROVIDE(UCB1CTLW0_H = 0x0621);
PROVIDE(UCB1BRW = 0x0626);
PROVIDE(UCB1BRW_L = 0x0626);
PROVIDE(UCB1BRW_H = 0x0627);
PROVIDE(UCB1STAT = 0x062A);
PROVIDE(UCB1RXBUF = 0x062C);
PROVIDE(UCB1TXBUF = 0x062E);
PROVIDE(UCB1I2COA = 0x0630);
PROVIDE(UCB1I2COA_L = 0x0630);
PROVIDE(UCB1I2COA_H = 0x0631);
PROVIDE(UCB1I2CSA = 0x0632);
PROVIDE(UCB1I2CSA_L = 0x0632);
PROVIDE(UCB1I2CSA_H = 0x0633);
PROVIDE(UCB1ICTL = 0x063C);
PROVIDE(UCB1ICTL_L = 0x063C);
PROVIDE(UCB1ICTL_H = 0x063D);
PROVIDE(UCB1IV = 0x063E);
/************************************************************
* WATCHDOG TIMER A
************************************************************/
PROVIDE(WDTCTL = 0x015C);
PROVIDE(WDTCTL_L = 0x015C);
PROVIDE(WDTCTL_H = 0x015D);
/************************************************************
* TLV Descriptors
************************************************************/
/************************************************************
* Interrupt Vectors (offset from 0xFF80)
************************************************************/
/************************************************************
* End of Modules
************************************************************/