rename coreid to port

This commit is contained in:
hathach 2018-03-09 14:29:23 +07:00
parent b608f8895a
commit eaaebc2b88
18 changed files with 265 additions and 265 deletions

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@ -94,16 +94,16 @@ void virtual_com_task(void)
//--------------------------------------------------------------------+
// tinyusb callbacks
//--------------------------------------------------------------------+
void tud_mount_cb(uint8_t coreid)
void tud_mount_cb(uint8_t port)
{
}
void tud_umount_cb(uint8_t coreid)
void tud_umount_cb(uint8_t port)
{
}
void tud_cdc_rx_cb(uint8_t coreid)
void tud_cdc_rx_cb(uint8_t port)
{
}

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@ -41,15 +41,15 @@
#if TUSB_CFG_MCU == MCU_LPC11UXX
void hal_usb_int_enable(uint8_t coreid)
void hal_usb_int_enable(uint8_t port)
{
(void) coreid; // discard compiler's warning
(void) port; // discard compiler's warning
NVIC_EnableIRQ(USB_IRQn);
}
void hal_usb_int_disable(uint8_t coreid)
void hal_usb_int_disable(uint8_t port)
{
(void) coreid; // discard compiler's warning
(void) port; // discard compiler's warning
NVIC_DisableIRQ(USB_IRQn);
}

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@ -41,15 +41,15 @@
#if TUSB_CFG_MCU == MCU_LPC13UXX
void hal_usb_int_enable(uint8_t coreid)
void hal_usb_int_enable(uint8_t port)
{
(void) coreid; // discard compiler's warning
(void) port; // discard compiler's warning
NVIC_EnableIRQ(USB_IRQ_IRQn);
}
void hal_usb_int_disable(uint8_t coreid)
void hal_usb_int_disable(uint8_t port)
{
(void) coreid; // discard compiler's warning
(void) port; // discard compiler's warning
NVIC_DisableIRQ(USB_IRQ_IRQn);
}

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@ -41,15 +41,15 @@
#if TUSB_CFG_MCU == MCU_LPC175X_6X
void hal_usb_int_enable(uint8_t coreid)
void hal_usb_int_enable(uint8_t port)
{
(void) coreid; // discard compiler's warning
(void) port; // discard compiler's warning
NVIC_EnableIRQ(USB_IRQn);
}
void hal_usb_int_disable(uint8_t coreid)
void hal_usb_int_disable(uint8_t port)
{
(void) coreid; // discard compiler's warning
(void) port; // discard compiler's warning
NVIC_DisableIRQ(USB_IRQn);
}

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@ -182,25 +182,25 @@ static dcd_data_t* const dcd_data_ptr[2] = { &dcd_data0, &dcd_data1 };
//--------------------------------------------------------------------+
// CONTROLLER API
//--------------------------------------------------------------------+
void hal_dcd_connect(uint8_t coreid)
void hal_dcd_connect(uint8_t port)
{
LPC_USB[coreid]->USBCMD_D |= BIT_(0);
LPC_USB[port]->USBCMD_D |= BIT_(0);
}
void hal_dcd_set_address(uint8_t coreid, uint8_t dev_addr)
void hal_dcd_set_address(uint8_t port, uint8_t dev_addr)
{
LPC_USB[coreid]->DEVICEADDR = (dev_addr << 25) | BIT_(24);
LPC_USB[port]->DEVICEADDR = (dev_addr << 25) | BIT_(24);
}
void hal_dcd_set_config(uint8_t coreid, uint8_t config_num)
void hal_dcd_set_config(uint8_t port, uint8_t config_num)
{
}
/// follows LPC43xx User Manual 23.10.3
static void bus_reset(uint8_t coreid)
static void bus_reset(uint8_t port)
{
LPC_USB0_Type* const lpc_usb = LPC_USB[coreid];
LPC_USB0_Type* const lpc_usb = LPC_USB[port];
// The reset value for all endpoint types is the control endpoint. If one endpoint
//direction is enabled and the paired endpoint of opposite direction is disabled, then the
@ -211,7 +211,7 @@ static void bus_reset(uint8_t coreid)
(TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
// USB1 only has 3 non-control endpoints
if ( coreid == 0)
if ( port == 0)
{
lpc_usb->ENDPTCTRL4 = lpc_usb->ENDPTCTRL5 = (TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
}
@ -230,7 +230,7 @@ static void bus_reset(uint8_t coreid)
// read reset bit in portsc
//------------- Queue Head & Queue TD -------------//
dcd_data_t* p_dcd = dcd_data_ptr[coreid];
dcd_data_t* p_dcd = dcd_data_ptr[port];
memclr_(p_dcd, sizeof(dcd_data_t));
@ -243,10 +243,10 @@ static void bus_reset(uint8_t coreid)
}
bool hal_dcd_init(uint8_t coreid)
bool hal_dcd_init(uint8_t port)
{
LPC_USB0_Type* const lpc_usb = LPC_USB[coreid];
dcd_data_t* p_dcd = dcd_data_ptr[coreid];
LPC_USB0_Type* const lpc_usb = LPC_USB[port];
dcd_data_t* p_dcd = dcd_data_ptr[port];
memclr_(p_dcd, sizeof(dcd_data_t));
@ -306,11 +306,11 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
}
// retval 0: invalid
static inline uint8_t qtd_find_free(uint8_t coreid)
static inline uint8_t qtd_find_free(uint8_t port)
{
for(uint8_t i=2; i<DCD_QTD_MAX; i++)
{ // exclude control's qtd
if ( dcd_data_ptr[coreid]->qtd[i].used == 0) return i;
if ( dcd_data_ptr[port]->qtd[i].used == 0) return i;
}
return 0;
@ -319,17 +319,17 @@ static inline uint8_t qtd_find_free(uint8_t coreid)
//--------------------------------------------------------------------+
// CONTROL PIPE API
//--------------------------------------------------------------------+
void hal_dcd_control_stall(uint8_t coreid)
void hal_dcd_control_stall(uint8_t port)
{
LPC_USB[coreid]->ENDPTCTRL0 |= (ENDPTCTRL_MASK_STALL << 16); // stall Control IN TODO stall control OUT as well
LPC_USB[port]->ENDPTCTRL0 |= (ENDPTCTRL_MASK_STALL << 16); // stall Control IN TODO stall control OUT as well
}
// control transfer does not need to use qtd find function
// follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
bool hal_dcd_control_xfer(uint8_t coreid, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
{
LPC_USB0_Type* const lpc_usb = LPC_USB[coreid];
dcd_data_t* const p_dcd = dcd_data_ptr[coreid];
LPC_USB0_Type* const lpc_usb = LPC_USB[port];
dcd_data_t* const p_dcd = dcd_data_ptr[port];
// determine Endpoint where Data & Status phase occurred (IN or OUT)
uint8_t const ep_data = (dir == TUSB_DIR_DEV_TO_HOST) ? 1 : 0;
@ -365,28 +365,28 @@ bool hal_dcd_control_xfer(uint8_t coreid, tusb_direction_t dir, uint8_t * p_buff
//--------------------------------------------------------------------+
// BULK/INTERRUPT/ISOCHRONOUS PIPE API
//--------------------------------------------------------------------+
static inline volatile uint32_t * get_reg_control_addr(uint8_t coreid, uint8_t physical_endpoint)
static inline volatile uint32_t * get_reg_control_addr(uint8_t port, uint8_t physical_endpoint)
{
return &(LPC_USB[coreid]->ENDPTCTRL0) + edpt_phy2log(physical_endpoint);
return &(LPC_USB[port]->ENDPTCTRL0) + edpt_phy2log(physical_endpoint);
}
void hal_dcd_pipe_stall(endpoint_handle_t edpt_hdl)
{
volatile uint32_t * reg_control = get_reg_control_addr(edpt_hdl.coreid, edpt_hdl.index);
volatile uint32_t * reg_control = get_reg_control_addr(edpt_hdl.port, edpt_hdl.index);
(*reg_control) |= ENDPTCTRL_MASK_STALL << (edpt_hdl.index & 0x01 ? 16 : 0);
}
void hal_dcd_pipe_clear_stall(uint8_t coreid, uint8_t edpt_addr)
void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
{
volatile uint32_t * reg_control = get_reg_control_addr(coreid, edpt_addr2phy(edpt_addr));
volatile uint32_t * reg_control = get_reg_control_addr(port, edpt_addr2phy(edpt_addr));
// data toggle also need to be reset
(*reg_control) |= ENDPTCTRL_MASK_TOGGLE_RESET << ((edpt_addr & TUSB_DIR_DEV_TO_HOST_MASK) ? 16 : 0);
(*reg_control) &= ~(ENDPTCTRL_MASK_STALL << ((edpt_addr & TUSB_DIR_DEV_TO_HOST_MASK) ? 16 : 0));
}
bool hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc, endpoint_handle_t* eh)
bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, endpoint_handle_t* eh)
{
// TODO USB1 only has 4 non-control enpoint (USB0 has 5)
// TODO not support ISO yet
@ -396,7 +396,7 @@ bool hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endp
//------------- Prepare Queue Head -------------//
uint8_t ep_idx = edpt_addr2phy(p_endpoint_desc->bEndpointAddress);
dcd_qhd_t * p_qhd = &dcd_data_ptr[coreid]->qhd[ep_idx];
dcd_qhd_t * p_qhd = &dcd_data_ptr[port]->qhd[ep_idx];
memclr_(p_qhd, sizeof(dcd_qhd_t));
@ -405,14 +405,14 @@ bool hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endp
p_qhd->qtd_overlay.next = QTD_NEXT_INVALID;
//------------- Endpoint Control Register -------------//
volatile uint32_t * reg_control = get_reg_control_addr(coreid, ep_idx);
volatile uint32_t * reg_control = get_reg_control_addr(port, ep_idx);
// endpoint must not be already enabled
VERIFY( !( (*reg_control) & (ENDPTCTRL_MASK_ENABLE << (dir ? 16 : 0)) ) );
(*reg_control) |= ((p_endpoint_desc->bmAttributes.xfer << 2) | ENDPTCTRL_MASK_ENABLE | ENDPTCTRL_MASK_TOGGLE_RESET) << (dir ? 16 : 0);
eh->coreid = coreid;
eh->port = port;
eh->index = ep_idx;
return true;
@ -420,7 +420,7 @@ bool hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endp
bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl)
{
dcd_qhd_t const * p_qhd = &dcd_data_ptr[edpt_hdl.coreid]->qhd[edpt_hdl.index];
dcd_qhd_t const * p_qhd = &dcd_data_ptr[edpt_hdl.port]->qhd[edpt_hdl.index];
return p_qhd->list_qtd_idx[0] != 0; // qtd list is not empty
// return !p_qhd->qtd_overlay.halted && p_qhd->qtd_overlay.active;
@ -429,10 +429,10 @@ bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl)
// add only, controller virtually cannot know
static tusb_error_t pipe_add_xfer(endpoint_handle_t edpt_hdl, void * buffer, uint16_t total_bytes, bool int_on_complete)
{
uint8_t qtd_idx = qtd_find_free(edpt_hdl.coreid);
uint8_t qtd_idx = qtd_find_free(edpt_hdl.port);
ASSERT(qtd_idx != 0, TUSB_ERROR_DCD_NOT_ENOUGH_QTD);
dcd_data_t* p_dcd = dcd_data_ptr[edpt_hdl.coreid];
dcd_data_t* p_dcd = dcd_data_ptr[edpt_hdl.port];
dcd_qhd_t * p_qhd = &p_dcd->qhd[edpt_hdl.index];
dcd_qtd_t * p_qtd = &p_dcd->qtd[qtd_idx];
@ -464,35 +464,35 @@ tusb_error_t hal_dcd_pipe_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, ui
{
ASSERT_STATUS ( pipe_add_xfer(edpt_hdl, buffer, total_bytes, int_on_complete) );
dcd_qhd_t* p_qhd = &dcd_data_ptr[edpt_hdl.coreid]->qhd[ edpt_hdl.index ];
dcd_qtd_t* p_qtd = &dcd_data_ptr[edpt_hdl.coreid]->qtd[ p_qhd->list_qtd_idx[0] ];
dcd_qhd_t* p_qhd = &dcd_data_ptr[edpt_hdl.port]->qhd[ edpt_hdl.index ];
dcd_qtd_t* p_qtd = &dcd_data_ptr[edpt_hdl.port]->qtd[ p_qhd->list_qtd_idx[0] ];
p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // attach head QTD to QHD start transferring
LPC_USB[edpt_hdl.coreid]->ENDPTPRIME = BIT_( edpt_phy2pos(edpt_hdl.index) ) ;
LPC_USB[edpt_hdl.port]->ENDPTPRIME = BIT_( edpt_phy2pos(edpt_hdl.index) ) ;
return TUSB_ERROR_NONE;
}
//------------- Device Controller Driver's Interrupt Handler -------------//
void xfer_complete_isr(uint8_t coreid, uint32_t reg_complete)
void xfer_complete_isr(uint8_t port, uint32_t reg_complete)
{
for(uint8_t ep_idx = 2; ep_idx < DCD_QHD_MAX; ep_idx++)
{
if ( BIT_TEST_(reg_complete, edpt_phy2pos(ep_idx)) )
{ // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set
dcd_qhd_t * p_qhd = &dcd_data_ptr[coreid]->qhd[ep_idx];
dcd_qhd_t * p_qhd = &dcd_data_ptr[port]->qhd[ep_idx];
endpoint_handle_t edpt_hdl =
{
.coreid = coreid,
.port = port,
.index = ep_idx,
};
// retire all QTDs in array list, up to 1st still-active QTD
while( p_qhd->list_qtd_idx[0] != 0 )
{
dcd_qtd_t * p_qtd = &dcd_data_ptr[coreid]->qtd[ p_qhd->list_qtd_idx[0] ];
dcd_qtd_t * p_qtd = &dcd_data_ptr[port]->qtd[ p_qhd->list_qtd_idx[0] ];
if (p_qtd->active) break; // stop immediately if found still-active QTD and shift array list
@ -511,9 +511,9 @@ void xfer_complete_isr(uint8_t coreid, uint32_t reg_complete)
}
}
void hal_dcd_isr(uint8_t coreid)
void hal_dcd_isr(uint8_t port)
{
LPC_USB0_Type* const lpc_usb = LPC_USB[coreid];
LPC_USB0_Type* const lpc_usb = LPC_USB[port];
uint32_t const int_enable = lpc_usb->USBINTR_D;
uint32_t const int_status = lpc_usb->USBSTS_D & int_enable;
@ -523,8 +523,8 @@ void hal_dcd_isr(uint8_t coreid)
if (int_status & INT_MASK_RESET)
{
bus_reset(coreid);
hal_dcd_bus_event(coreid, USBD_BUS_EVENT_RESET);
bus_reset(port);
hal_dcd_bus_event(port, USBD_BUS_EVENT_RESET);
}
if (int_status & INT_MASK_SUSPEND)
@ -552,14 +552,14 @@ void hal_dcd_isr(uint8_t coreid)
uint32_t const edpt_complete = lpc_usb->ENDPTCOMPLETE;
lpc_usb->ENDPTCOMPLETE = edpt_complete; // acknowledge
dcd_data_t* const p_dcd = dcd_data_ptr[coreid];
dcd_data_t* const p_dcd = dcd_data_ptr[port];
//------------- Set up Received -------------//
if (lpc_usb->ENDPTSETUPSTAT)
{ // 23.10.10.2 Operational model for setup transfers
lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;// acknowledge
hal_dcd_setup_received(coreid, (uint8_t*) &p_dcd->qhd[0].setup_request);
hal_dcd_setup_received(port, (uint8_t*) &p_dcd->qhd[0].setup_request);
}
//------------- Control Request Completed -------------//
else if ( edpt_complete & 0x03 )
@ -575,7 +575,7 @@ void hal_dcd_isr(uint8_t coreid)
{
endpoint_handle_t edpt_hdl =
{
.coreid = coreid,
.port = port,
.index = 0,
};
tusb_event_t event = ( p_qtd->xact_err || p_qtd->halted || p_qtd->buffer_err ) ? TUSB_EVENT_XFER_ERROR : TUSB_EVENT_XFER_COMPLETE;
@ -589,13 +589,13 @@ void hal_dcd_isr(uint8_t coreid)
//------------- Transfer Complete -------------//
if ( edpt_complete & ~(0x03UL) )
{
xfer_complete_isr(coreid, edpt_complete);
xfer_complete_isr(port, edpt_complete);
}
}
if (int_status & INT_MASK_SOF)
{
hal_dcd_bus_event(coreid, USBD_BUS_EVENT_SOF);
hal_dcd_bus_event(port, USBD_BUS_EVENT_SOF);
}
if (int_status & INT_MASK_NAK) {}

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@ -53,22 +53,22 @@ enum {
LPC43XX_USBMODE_VBUS_HIGH = 1
};
void hal_usb_int_enable(uint8_t coreid)
void hal_usb_int_enable(uint8_t port)
{
NVIC_EnableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
NVIC_EnableIRQ(port ? USB1_IRQn : USB0_IRQn);
}
void hal_usb_int_disable(uint8_t coreid)
void hal_usb_int_disable(uint8_t port)
{
NVIC_DisableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
NVIC_DisableIRQ(port ? USB1_IRQn : USB0_IRQn);
}
static void hal_controller_reset(uint8_t coreid)
static void hal_controller_reset(uint8_t port)
{ // TODO timeout expired to prevent trap
volatile uint32_t * p_reg_usbcmd;
p_reg_usbcmd = (coreid ? &LPC_USB1->USBCMD_D : &LPC_USB0->USBCMD_D);
p_reg_usbcmd = (port ? &LPC_USB1->USBCMD_D : &LPC_USB0->USBCMD_D);
// NXP chip powered with non-host mode --> sts bit is not correctly reflected
(*p_reg_usbcmd) |= BIT_(1);
@ -127,7 +127,7 @@ bool hal_usb_init(void)
return true;
}
void hal_dcd_isr(uint8_t coreid);
void hal_dcd_isr(uint8_t port);
#if TUSB_CFG_CONTROLLER_0_MODE
void USB0_IRQHandler(void)

View File

@ -78,33 +78,33 @@ STATIC_VAR cdcd_data_t cdcd_data[CONTROLLER_DEVICE_NUMBER];
//--------------------------------------------------------------------+
// APPLICATION API
//--------------------------------------------------------------------+
bool tud_cdc_connected(uint8_t coreid)
bool tud_cdc_connected(uint8_t port)
{
return cdcd_data[coreid].connected;
return cdcd_data[port].connected;
}
uint32_t tud_cdc_available(uint8_t coreid)
uint32_t tud_cdc_available(uint8_t port)
{
return fifo_count(&_rx_ff);
}
int tud_cdc_read_char(uint8_t coreid)
int tud_cdc_read_char(uint8_t port)
{
uint8_t ch;
return fifo_read(&_rx_ff, &ch) ? ch : (-1);
}
uint32_t tud_cdc_read(uint8_t coreid, void* buffer, uint32_t bufsize)
uint32_t tud_cdc_read(uint8_t port, void* buffer, uint32_t bufsize)
{
return fifo_read_n(&_rx_ff, buffer, bufsize);
}
uint32_t tud_cdc_write_char(uint8_t coreid, char ch)
uint32_t tud_cdc_write_char(uint8_t port, char ch)
{
return fifo_write(&_tx_ff, &ch);
}
uint32_t tud_cdc_write(uint8_t coreid, void const* buffer, uint32_t bufsize)
uint32_t tud_cdc_write(uint8_t port, void const* buffer, uint32_t bufsize)
{
return fifo_write_n(&_tx_ff, buffer, bufsize);
}
@ -128,7 +128,7 @@ void cdcd_init(void)
}
}
tusb_error_t cdcd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
{
if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != p_interface_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS;
@ -139,7 +139,7 @@ tusb_error_t cdcd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_int
}
uint8_t const * p_desc = descriptor_next ( (uint8_t const *) p_interface_desc );
cdcd_data_t * p_cdc = &cdcd_data[coreid];
cdcd_data_t * p_cdc = &cdcd_data[port];
//------------- Communication Interface -------------//
(*p_length) = sizeof(tusb_descriptor_interface_t);
@ -157,7 +157,7 @@ tusb_error_t cdcd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_int
if ( TUSB_DESC_TYPE_ENDPOINT == p_desc[DESCRIPTOR_OFFSET_TYPE])
{ // notification endpoint if any
VERIFY( hal_dcd_pipe_open(coreid, (tusb_descriptor_endpoint_t const *) p_desc, &p_cdc->edpt_hdl[CDC_PIPE_NOTIFICATION]), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
VERIFY( hal_dcd_pipe_open(port, (tusb_descriptor_endpoint_t const *) p_desc, &p_cdc->edpt_hdl[CDC_PIPE_NOTIFICATION]), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
(*p_length) += p_desc[DESCRIPTOR_OFFSET_LENGTH];
p_desc = descriptor_next(p_desc);
@ -180,7 +180,7 @@ tusb_error_t cdcd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_int
endpoint_handle_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
&p_cdc->edpt_hdl[CDC_PIPE_DATA_IN] : &p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT] ;
ASSERT_( hal_dcd_pipe_open(coreid, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
ASSERT_( hal_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
(*p_length) += p_desc[DESCRIPTOR_OFFSET_LENGTH];
p_desc = descriptor_next( p_desc );
@ -196,16 +196,16 @@ tusb_error_t cdcd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_int
return TUSB_ERROR_NONE;
}
void cdcd_close(uint8_t coreid)
void cdcd_close(uint8_t port)
{
// no need to close opened pipe, dcd bus reset will put controller's endpoints to default state
memclr_(&cdcd_data[coreid], sizeof(cdcd_data_t));
memclr_(&cdcd_data[port], sizeof(cdcd_data_t));
fifo_clear(&_rx_ff);
fifo_clear(&_tx_ff);
}
tusb_error_t cdcd_control_request_subtask(uint8_t coreid, tusb_control_request_t const * p_request)
tusb_error_t cdcd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request)
{
//------------- Class Specific Request -------------//
if (p_request->bmRequestType_bit.type != TUSB_REQUEST_TYPE_CLASS) return TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
@ -213,13 +213,13 @@ tusb_error_t cdcd_control_request_subtask(uint8_t coreid, tusb_control_request_t
switch(p_request->bRequest)
{
case CDC_REQUEST_GET_LINE_CODING:
hal_dcd_control_xfer(coreid, (tusb_direction_t) p_request->bmRequestType_bit.direction,
(uint8_t*) &cdcd_line_coding[coreid], min16_of(sizeof(cdc_line_coding_t), p_request->wLength), false );
hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction,
(uint8_t*) &cdcd_line_coding[port], min16_of(sizeof(cdc_line_coding_t), p_request->wLength), false );
break;
case CDC_REQUEST_SET_LINE_CODING:
hal_dcd_control_xfer(coreid, (tusb_direction_t) p_request->bmRequestType_bit.direction,
(uint8_t*) &cdcd_line_coding[coreid], min16_of(sizeof(cdc_line_coding_t), p_request->wLength), false );
hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction,
(uint8_t*) &cdcd_line_coding[port], min16_of(sizeof(cdc_line_coding_t), p_request->wLength), false );
// TODO notify application on xfer completea
break;
@ -230,7 +230,7 @@ tusb_error_t cdcd_control_request_subtask(uint8_t coreid, tusb_control_request_t
ACTIVE_DTE_NOT_PRESENT = 0x0002
};
cdcd_data_t * p_cdc = &cdcd_data[coreid];
cdcd_data_t * p_cdc = &cdcd_data[port];
if (p_request->wValue == ACTIVE_DTE_PRESENT)
{
@ -257,7 +257,7 @@ tusb_error_t cdcd_control_request_subtask(uint8_t coreid, tusb_control_request_t
tusb_error_t cdcd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
{
cdcd_data_t const * p_cdc = &cdcd_data[edpt_hdl.coreid];
cdcd_data_t const * p_cdc = &cdcd_data[edpt_hdl.port];
if ( edpt_equal(edpt_hdl, p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT]) )
{
@ -267,17 +267,17 @@ tusb_error_t cdcd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32
hal_dcd_pipe_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
// fire callback
tud_cdc_rx_cb(edpt_hdl.coreid);
tud_cdc_rx_cb(edpt_hdl.port);
}
return TUSB_ERROR_NONE;
}
void cdcd_sof(uint8_t coreid)
void cdcd_sof(uint8_t port)
{
if ( !tud_cdc_connected(coreid) ) return;
if ( !tud_cdc_connected(port) ) return;
endpoint_handle_t ep = cdcd_data[coreid].edpt_hdl[CDC_PIPE_DATA_IN];
endpoint_handle_t ep = cdcd_data[port].edpt_hdl[CDC_PIPE_DATA_IN];
if ( !dcd_pipe_is_busy( ep ) )
{

View File

@ -55,21 +55,21 @@
//--------------------------------------------------------------------+
// APPLICATION API
//--------------------------------------------------------------------+
bool tud_cdc_connected(uint8_t coreid);
uint32_t tud_cdc_available(uint8_t coreid);
bool tud_cdc_connected(uint8_t port);
uint32_t tud_cdc_available(uint8_t port);
int tud_cdc_read_char(uint8_t coreid);
uint32_t tud_cdc_read(uint8_t coreid, void* buffer, uint32_t bufsize);
int tud_cdc_read_char(uint8_t port);
uint32_t tud_cdc_read(uint8_t port, void* buffer, uint32_t bufsize);
uint32_t tud_cdc_write_char(uint8_t coreid, char ch);
uint32_t tud_cdc_write(uint8_t coreid, void const* buffer, uint32_t bufsize);
uint32_t tud_cdc_write_char(uint8_t port, char ch);
uint32_t tud_cdc_write(uint8_t port, void const* buffer, uint32_t bufsize);
//--------------------------------------------------------------------+
// APPLICATION CALLBACK API
//--------------------------------------------------------------------+
//void tud_cdc_line_coding_changed_cb(uint8_t coreid, cdc_line_coding_t* p_line_coding);
void tud_cdc_rx_cb(uint8_t coreid);
//void tud_cdc_line_coding_changed_cb(uint8_t port, cdc_line_coding_t* p_line_coding);
void tud_cdc_rx_cb(uint8_t port);
//--------------------------------------------------------------------+
// USBD-CLASS DRIVER API
@ -77,12 +77,12 @@ void tud_cdc_rx_cb(uint8_t coreid);
#ifdef _TINY_USB_SOURCE_FILE_
void cdcd_init(void);
tusb_error_t cdcd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
tusb_error_t cdcd_control_request_subtask(uint8_t coreid, tusb_control_request_t const * p_request);
tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
tusb_error_t cdcd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request);
tusb_error_t cdcd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
void cdcd_close(uint8_t coreid);
void cdcd_close(uint8_t port);
void cdcd_sof(uint8_t coreid);
void cdcd_sof(uint8_t port);
#endif

View File

@ -107,16 +107,16 @@ TUSB_CFG_ATTR_USBRAM STATIC_VAR uint8_t m_hid_buffer[ HIDD_BUFFER_SIZE ];
#if TUSB_CFG_DEVICE_HID_KEYBOARD
STATIC_VAR hidd_interface_t keyboardd_data;
bool tud_hid_keyboard_busy(uint8_t coreid)
bool tud_hid_keyboard_busy(uint8_t port)
{
return dcd_pipe_is_busy(keyboardd_data.ept_handle);
}
tusb_error_t tud_hid_keyboard_send(uint8_t coreid, hid_keyboard_report_t const *p_report)
tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_report)
{
ASSERT(tud_mounted(coreid), TUSB_ERROR_USBD_DEVICE_NOT_CONFIGURED);
ASSERT(tud_mounted(port), TUSB_ERROR_USBD_DEVICE_NOT_CONFIGURED);
hidd_interface_t * p_kbd = &keyboardd_data; // TODO &keyboardd_data[coreid];
hidd_interface_t * p_kbd = &keyboardd_data; // TODO &keyboardd_data[port];
ASSERT_STATUS( hal_dcd_pipe_xfer(p_kbd->ept_handle, (void*) p_report, sizeof(hid_keyboard_report_t), true) ) ;
@ -130,16 +130,16 @@ tusb_error_t tud_hid_keyboard_send(uint8_t coreid, hid_keyboard_report_t const *
#if TUSB_CFG_DEVICE_HID_MOUSE
STATIC_VAR hidd_interface_t moused_data;
bool tusbd_hid_mouse_is_busy(uint8_t coreid)
bool tusbd_hid_mouse_is_busy(uint8_t port)
{
return dcd_pipe_is_busy(moused_data.ept_handle);
}
tusb_error_t tusbd_hid_mouse_send(uint8_t coreid, hid_mouse_report_t const *p_report)
tusb_error_t tusbd_hid_mouse_send(uint8_t port, hid_mouse_report_t const *p_report)
{
ASSERT(tud_mounted(coreid), TUSB_ERROR_USBD_DEVICE_NOT_CONFIGURED);
ASSERT(tud_mounted(port), TUSB_ERROR_USBD_DEVICE_NOT_CONFIGURED);
hidd_interface_t * p_mouse = &moused_data; // TODO &keyboardd_data[coreid];
hidd_interface_t * p_mouse = &moused_data; // TODO &keyboardd_data[port];
ASSERT_STATUS( hal_dcd_pipe_xfer(p_mouse->ept_handle, (void*) p_report, sizeof(hid_mouse_report_t), true) ) ;
@ -167,7 +167,7 @@ void hidd_init(void)
}
}
void hidd_close(uint8_t coreid)
void hidd_close(uint8_t port)
{
for(uint8_t i=0; i<HIDD_NUMBER_OF_SUBCLASS; i++)
{
@ -175,7 +175,7 @@ void hidd_close(uint8_t coreid)
}
}
tusb_error_t hidd_control_request_subtask(uint8_t coreid, tusb_control_request_t const * p_request)
tusb_error_t hidd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request)
{
uint8_t subclass_idx;
for(subclass_idx=0; subclass_idx<HIDD_NUMBER_OF_SUBCLASS; subclass_idx++)
@ -202,7 +202,7 @@ tusb_error_t hidd_control_request_subtask(uint8_t coreid, tusb_control_request_t
ASSERT ( p_hid->report_length <= HIDD_BUFFER_SIZE, TUSB_ERROR_NOT_ENOUGH_MEMORY);
memcpy(m_hid_buffer, p_hid->p_report_desc, p_hid->report_length); // to allow report descriptor not to be in USBRAM
hal_dcd_control_xfer(coreid, TUSB_DIR_DEV_TO_HOST, m_hid_buffer, p_hid->report_length, false);
hal_dcd_control_xfer(port, TUSB_DIR_DEV_TO_HOST, m_hid_buffer, p_hid->report_length, false);
}
//------------- Class Specific Request -------------//
else if (p_request->bmRequestType_bit.type == TUSB_REQUEST_TYPE_CLASS)
@ -214,11 +214,11 @@ tusb_error_t hidd_control_request_subtask(uint8_t coreid, tusb_control_request_t
// wValue = Report Type | Report ID
void* p_buffer = NULL;
uint16_t actual_length = p_driver->get_report_cb(coreid, (hid_request_report_type_t) u16_high_u8(p_request->wValue),
uint16_t actual_length = p_driver->get_report_cb(port, (hid_request_report_type_t) u16_high_u8(p_request->wValue),
&p_buffer, p_request->wLength);
SUBTASK_ASSERT( p_buffer != NULL && actual_length > 0 );
hal_dcd_control_xfer(coreid, (tusb_direction_t) p_request->bmRequestType_bit.direction, p_buffer, actual_length, false);
hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, p_buffer, actual_length, false);
}
else if ( (HID_REQUEST_CONTROL_SET_REPORT == p_request->bRequest) && (p_driver->set_report_cb != NULL) )
{
@ -226,12 +226,12 @@ tusb_error_t hidd_control_request_subtask(uint8_t coreid, tusb_control_request_t
// wValue = Report Type | Report ID
tusb_error_t error;
hal_dcd_control_xfer(coreid, (tusb_direction_t) p_request->bmRequestType_bit.direction, m_hid_buffer, p_request->wLength, true);
hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, m_hid_buffer, p_request->wLength, true);
osal_semaphore_wait(usbd_control_xfer_sem_hdl, OSAL_TIMEOUT_NORMAL, &error); // wait for control xfer complete
SUBTASK_ASSERT_STATUS(error);
p_driver->set_report_cb(coreid, (hid_request_report_type_t) u16_high_u8(p_request->wValue),
p_driver->set_report_cb(port, (hid_request_report_type_t) u16_high_u8(p_request->wValue),
m_hid_buffer, p_request->wLength);
}
else if (HID_REQUEST_CONTROL_SET_IDLE == p_request->bRequest)
@ -254,7 +254,7 @@ tusb_error_t hidd_control_request_subtask(uint8_t coreid, tusb_control_request_t
return TUSB_ERROR_NONE;
}
tusb_error_t hidd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
{
uint8_t const *p_desc = (uint8_t const *) p_interface_desc;
@ -280,7 +280,7 @@ tusb_error_t hidd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_int
VERIFY(p_hid, TUSB_ERROR_FAILED);
VERIFY( hal_dcd_pipe_open(coreid, p_desc_endpoint, &p_hid->ept_handle), TUSB_ERROR_DCD_FAILED );
VERIFY( hal_dcd_pipe_open(port, p_desc_endpoint, &p_hid->ept_handle), TUSB_ERROR_DCD_FAILED );
p_hid->interface_number = p_interface_desc->bInterfaceNumber;
p_hid->p_report_desc = (p_interface_desc->bInterfaceProtocol == HID_PROTOCOL_KEYBOARD) ? tusbd_descriptor_pointers.p_hid_keyboard_report : tusbd_descriptor_pointers.p_hid_mouse_report;
@ -310,7 +310,7 @@ tusb_error_t hidd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32
hidd_interface_t * const p_interface = hidd_class_driver[i].p_interface;
if ( (p_interface != NULL) && edpt_equal(edpt_hdl, p_interface->ept_handle) )
{
hidd_class_driver[i].xfer_cb(edpt_hdl.coreid, event, xferred_bytes);
hidd_class_driver[i].xfer_cb(edpt_hdl.port, event, xferred_bytes);
}
}

View File

@ -57,15 +57,15 @@
* @{ */
/** \brief Check if the interface is currently busy or not
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \retval true if the interface is busy meaning the stack is still transferring/waiting data from/to host
* \retval false if the interface is not busy meaning the stack successfully transferred data from/to host
* \note This function is primarily used for polling/waiting result after \ref tusbd_hid_keyboard_send.
*/
bool tud_hid_keyboard_busy(uint8_t coreid);
bool tud_hid_keyboard_busy(uint8_t port);
/** \brief Submit USB transfer
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref TUSB_CFG_ATTR_USBRAM)
* \returns \ref tusb_error_t type to indicate success or error condition.
* \retval TUSB_ERROR_NONE on success
@ -75,7 +75,7 @@ bool tud_hid_keyboard_busy(uint8_t coreid);
* \note This function is non-blocking and returns immediately. Data will be transferred when USB Host work with this interface.
* The result of usb transfer will be reported by the interface's callback function
*/
tusb_error_t tud_hid_keyboard_send(uint8_t coreid, hid_keyboard_report_t const *p_report);
tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_report);
//--------------------------------------------------------------------+
// APPLICATION CALLBACK API
@ -83,18 +83,18 @@ tusb_error_t tud_hid_keyboard_send(uint8_t coreid, hid_keyboard_report_t const *
/** \brief Callback function that is invoked when an transferring event occurred
* after invoking \ref tusbd_hid_keyboard_send
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] event an value from \ref tusb_event_t
* \note event can be one of following
* - TUSB_EVENT_XFER_COMPLETE : previously scheduled transfer completes successfully.
* - TUSB_EVENT_XFER_ERROR : previously scheduled transfer encountered a transaction error.
* - TUSB_EVENT_XFER_STALLED : previously scheduled transfer is stalled by device.
*/
void tud_hid_keyboard_cb(uint8_t coreid, tusb_event_t event, uint32_t xferred_bytes);
void tud_hid_keyboard_cb(uint8_t port, tusb_event_t event, uint32_t xferred_bytes);
/** \brief Callback function that is invoked when USB host request \ref HID_REQUEST_CONTROL_GET_REPORT
* via control endpoint.
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
* \param[out] pp_report pointer to buffer that application need to update, value must be accessible by USB controller (see \ref TUSB_CFG_ATTR_USBRAM)
* \param[in] requested_length number of bytes that host requested
@ -105,18 +105,18 @@ void tud_hid_keyboard_cb(uint8_t coreid, tusb_event_t event, uint32_t xferred_by
* the completion of this control request will not be reported to application.
* For Keyboard, USB host often uses this to turn on/off the LED for CAPLOCKS, NUMLOCK (\ref hid_keyboard_led_bm_t)
*/
uint16_t tud_hid_keyboard_get_report_cb(uint8_t coreid, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length);
uint16_t tud_hid_keyboard_get_report_cb(uint8_t port, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length);
/** \brief Callback function that is invoked when USB host request \ref HID_REQUEST_CONTROL_SET_REPORT
* via control endpoint.
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
* \param[in] p_report_data buffer containing the report's data
* \param[in] length number of bytes in the \a p_report_data
* \note By the time this callback is invoked, the USB control transfer is already completed in the hardware side.
* Application are free to handle data at its own will.
*/
void tud_hid_keyboard_set_report_cb(uint8_t coreid, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length);
void tud_hid_keyboard_set_report_cb(uint8_t port, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length);
/** @} */
/** @} */
@ -130,15 +130,15 @@ void tud_hid_keyboard_set_report_cb(uint8_t coreid, hid_request_report_type_t re
* @{ */
/** \brief Check if the interface is currently busy or not
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \retval true if the interface is busy meaning the stack is still transferring/waiting data from/to host
* \retval false if the interface is not busy meaning the stack successfully transferred data from/to host
* \note This function is primarily used for polling/waiting result after \ref tusbd_hid_mouse_send.
*/
bool tud_hid_mouse_is_busy(uint8_t coreid);
bool tud_hid_mouse_is_busy(uint8_t port);
/** \brief Perform transfer queuing
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in,out] p_report address that is used to store data from device. Must be accessible by usb controller (see \ref TUSB_CFG_ATTR_USBRAM)
* \returns \ref tusb_error_t type to indicate success or error condition.
* \retval TUSB_ERROR_NONE on success
@ -148,7 +148,7 @@ bool tud_hid_mouse_is_busy(uint8_t coreid);
* \note This function is non-blocking and returns immediately. Data will be transferred when USB Host work with this interface.
* The result of usb transfer will be reported by the interface's callback function
*/
tusb_error_t tud_hid_mouse_send(uint8_t coreid, hid_mouse_report_t const *p_report);
tusb_error_t tud_hid_mouse_send(uint8_t port, hid_mouse_report_t const *p_report);
//--------------------------------------------------------------------+
// APPLICATION CALLBACK API
@ -156,18 +156,18 @@ tusb_error_t tud_hid_mouse_send(uint8_t coreid, hid_mouse_report_t const *p_repo
/** \brief Callback function that is invoked when an transferring event occurred
* after invoking \ref tusbd_hid_mouse_send
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] event an value from \ref tusb_event_t
* \note event can be one of following
* - TUSB_EVENT_XFER_COMPLETE : previously scheduled transfer completes successfully.
* - TUSB_EVENT_XFER_ERROR : previously scheduled transfer encountered a transaction error.
* - TUSB_EVENT_XFER_STALLED : previously scheduled transfer is stalled by device.
*/
void tud_hid_mouse_cb(uint8_t coreid, tusb_event_t event, uint32_t xferred_bytes);
void tud_hid_mouse_cb(uint8_t port, tusb_event_t event, uint32_t xferred_bytes);
/** \brief Callback function that is invoked when USB host request \ref HID_REQUEST_CONTROL_GET_REPORT
* via control endpoint.
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
* \param[out] pp_report pointer to buffer that application need to update, value must be accessible by USB controller (see \ref TUSB_CFG_ATTR_USBRAM)
* \param[in] requested_length number of bytes that host requested
@ -177,18 +177,18 @@ void tud_hid_mouse_cb(uint8_t coreid, tusb_event_t event, uint32_t xferred_bytes
* \note After this callback, the request is silently executed by the tinyusb stack, thus
* the completion of this control request will not be reported to application
*/
uint16_t tud_hid_mouse_get_report_cb(uint8_t coreid, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length);
uint16_t tud_hid_mouse_get_report_cb(uint8_t port, hid_request_report_type_t report_type, void** pp_report, uint16_t requested_length);
/** \brief Callback function that is invoked when USB host request \ref HID_REQUEST_CONTROL_SET_REPORT
* via control endpoint.
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] report_type specify which report (INPUT, OUTPUT, FEATURE) that host requests
* \param[in] p_report_data buffer containing the report's data
* \param[in] length number of bytes in the \a p_report_data
* \note By the time this callback is invoked, the USB control transfer is already completed in the hardware side.
* Application are free to handle data at its own will.
*/
void tud_hid_mouse_set_report_cb(uint8_t coreid, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length);
void tud_hid_mouse_set_report_cb(uint8_t port, hid_request_report_type_t report_type, uint8_t p_report_data[], uint16_t length);
/** @} */
/** @} */
@ -201,10 +201,10 @@ void tud_hid_mouse_set_report_cb(uint8_t coreid, hid_request_report_type_t repor
#ifdef _TINY_USB_SOURCE_FILE_
void hidd_init(void);
tusb_error_t hidd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
tusb_error_t hidd_control_request_subtask(uint8_t coreid, tusb_control_request_t const * p_request);
tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
tusb_error_t hidd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request);
tusb_error_t hidd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
void hidd_close(uint8_t coreid);
void hidd_close(uint8_t port);
#endif

View File

@ -79,12 +79,12 @@ void mscd_init(void)
memclr_(&mscd_data, sizeof(mscd_interface_t));
}
void mscd_close(uint8_t coreid)
void mscd_close(uint8_t port)
{
memclr_(&mscd_data, sizeof(mscd_interface_t));
}
tusb_error_t mscd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length)
{
ASSERT( ( MSC_SUBCLASS_SCSI == p_interface_desc->bInterfaceSubClass &&
MSC_PROTOCOL_BOT == p_interface_desc->bInterfaceProtocol ), TUSB_ERROR_MSC_UNSUPPORTED_PROTOCOL );
@ -101,7 +101,7 @@ tusb_error_t mscd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_int
endpoint_handle_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
&p_msc->edpt_in : &p_msc->edpt_out;
VERIFY( hal_dcd_pipe_open(coreid, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_FAILED );
VERIFY( hal_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_FAILED );
p_endpoint = (tusb_descriptor_endpoint_t const *) descriptor_next( (uint8_t const*) p_endpoint );
}
@ -115,7 +115,7 @@ tusb_error_t mscd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_int
return TUSB_ERROR_NONE;
}
tusb_error_t mscd_control_request_subtask(uint8_t coreid, tusb_control_request_t const * p_request)
tusb_error_t mscd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request)
{
ASSERT(p_request->bmRequestType_bit.type == TUSB_REQUEST_TYPE_CLASS, TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT);
@ -124,12 +124,12 @@ tusb_error_t mscd_control_request_subtask(uint8_t coreid, tusb_control_request_t
switch(p_request->bRequest)
{
case MSC_REQUEST_RESET:
hal_dcd_control_xfer(coreid, TUSB_DIR_HOST_TO_DEV, NULL, 0, false);
hal_dcd_control_xfer(port, TUSB_DIR_HOST_TO_DEV, NULL, 0, false);
break;
case MSC_REQUEST_GET_MAX_LUN:
p_msc->scsi_data[0] = p_msc->max_lun; // Note: lpc11/13u need xfer data's address to be aligned 64 -> make use of scsi_data instead of using max_lun directly
hal_dcd_control_xfer(coreid, TUSB_DIR_DEV_TO_HOST, p_msc->scsi_data, 1, false);
hal_dcd_control_xfer(port, TUSB_DIR_DEV_TO_HOST, p_msc->scsi_data, 1, false);
break;
default:
@ -174,7 +174,7 @@ tusb_error_t mscd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32
// TODO SCSI data out transfer is not yet supported
ASSERT_FALSE( p_cbw->xfer_bytes > 0 && !BIT_TEST_(p_cbw->dir, 7), TUSB_ERROR_NOT_SUPPORTED_YET);
p_csw->status = tud_msc_scsi_cb(edpt_hdl.coreid, p_cbw->lun, p_cbw->command, &p_buffer, &actual_length);
p_csw->status = tud_msc_scsi_cb(edpt_hdl.port, p_cbw->lun, p_cbw->command, &p_buffer, &actual_length);
//------------- Data Phase (non READ10, WRITE10) -------------//
if ( p_cbw->xfer_bytes )
@ -230,8 +230,8 @@ static bool read10_write10_data_xfer(mscd_interface_t* p_msc)
uint16_t const block_count = __be2n_16(p_readwrite->block_count);
void *p_buffer = NULL;
uint16_t xferred_block = (SCSI_CMD_READ_10 == p_cbw->command[0]) ? tud_msc_read10_cb (edpt_hdl.coreid, p_cbw->lun, &p_buffer, lba, block_count) :
tud_msc_write10_cb(edpt_hdl.coreid, p_cbw->lun, &p_buffer, lba, block_count);
uint16_t xferred_block = (SCSI_CMD_READ_10 == p_cbw->command[0]) ? tud_msc_read10_cb (edpt_hdl.port, p_cbw->lun, &p_buffer, lba, block_count) :
tud_msc_write10_cb(edpt_hdl.port, p_cbw->lun, &p_buffer, lba, block_count);
xferred_block = min16_of(xferred_block, block_count);
uint16_t const xferred_byte = xferred_block * (p_cbw->xfer_bytes / block_count);

View File

@ -61,7 +61,7 @@
//--------------------------------------------------------------------+
/** \brief Callback that is invoked when tinyusb stack received \ref SCSI_CMD_READ_10 command from host
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] lun Targeted Logical Unit
* \param[out] pp_buffer Pointer to buffer which application need to update with the response data's address.
* Must be accessible by USB controller (see \ref TUSB_CFG_ATTR_USBRAM)
@ -76,10 +76,10 @@
* \n\n Although this callback is called by tinyusb device task (non-isr context), however as all the classes share
* the same task (to save resource), any delay in this callback will cause delay in reponse on other classes.
*/
uint16_t tud_msc_read10_cb (uint8_t coreid, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count);
uint16_t tud_msc_read10_cb (uint8_t port, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count);
/** \brief Callback that is invoked when tinyusb stack received \ref SCSI_CMD_WRITE_10 command from host
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] lun Targeted Logical Unit
* \param[out] pp_buffer Pointer to buffer which application need to update with the address to hold data from host
* Must be accessible by USB controller (see \ref TUSB_CFG_ATTR_USBRAM)
@ -94,12 +94,12 @@ uint16_t tud_msc_read10_cb (uint8_t coreid, uint8_t lun, void** pp_buffer, uint3
* \n\n Although this callback is called by tinyusb device task (non-isr context), however as all the classes share
* the same task (to save resource), any delay in this callback will cause delay in reponse on other classes.
*/
uint16_t tud_msc_write10_cb(uint8_t coreid, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count);
uint16_t tud_msc_write10_cb(uint8_t port, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count);
// p_length [in,out] allocated/maximum length, application update with actual length
/** \brief Callback that is invoked when tinyusb stack received an SCSI command other than \ref SCSI_CMD_WRITE_10 and
* \ref SCSI_CMD_READ_10 command from host
* \param[in] coreid USB Controller ID
* \param[in] port USB Controller ID
* \param[in] lun Targeted Logical Unit
* \param[in] scsi_cmd SCSI command contents, application should examine this command block to know which command host requested
* \param[out] pp_buffer Pointer to buffer which application need to update with the address to transfer data with host.
@ -111,7 +111,7 @@ uint16_t tud_msc_write10_cb(uint8_t coreid, uint8_t lun, void** pp_buffer, uint3
* \note Although this callback is called by tinyusb device task (non-isr context), however as all the classes share
* the same task (to save resource), any delay in this callback will cause delay in reponse on other classes.
*/
msc_csw_status_t tud_msc_scsi_cb (uint8_t coreid, uint8_t lun, uint8_t scsi_cmd[16], void const ** pp_buffer, uint16_t* p_length);
msc_csw_status_t tud_msc_scsi_cb (uint8_t port, uint8_t lun, uint8_t scsi_cmd[16], void const ** pp_buffer, uint16_t* p_length);
/** @} */
/** @} */
@ -122,10 +122,10 @@ msc_csw_status_t tud_msc_scsi_cb (uint8_t coreid, uint8_t lun, uint8_t scsi_cmd[
#ifdef _TINY_USB_SOURCE_FILE_
void mscd_init(void);
tusb_error_t mscd_open(uint8_t coreid, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
tusb_error_t mscd_control_request_subtask(uint8_t coreid, tusb_control_request_t const * p_request);
tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
tusb_error_t mscd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request);
tusb_error_t mscd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
void mscd_close(uint8_t coreid);
void mscd_close(uint8_t port);
#endif

View File

@ -60,31 +60,31 @@ typedef enum
// TODO move Hal
typedef struct {
uint8_t coreid;
uint8_t port;
uint8_t index; // must be zero to indicate control
} endpoint_handle_t;
static inline bool edpt_equal(endpoint_handle_t x, endpoint_handle_t y)
{
return (x.coreid == y.coreid) && (x.index == y.index);
return (x.port == y.port) && (x.index == y.index);
}
//------------- Controller API -------------//
bool hal_dcd_init (uint8_t coreid);
void hal_dcd_connect (uint8_t coreid);
void hal_dcd_disconnect (uint8_t coreid);
void hal_dcd_set_address (uint8_t coreid, uint8_t dev_addr);
void hal_dcd_set_config (uint8_t coreid, uint8_t config_num);
bool hal_dcd_init (uint8_t port);
void hal_dcd_connect (uint8_t port);
void hal_dcd_disconnect (uint8_t port);
void hal_dcd_set_address (uint8_t port, uint8_t dev_addr);
void hal_dcd_set_config (uint8_t port, uint8_t config_num);
/*------------- Event function -------------*/
void hal_dcd_bus_event(uint8_t coreid, usbd_bus_event_type_t bus_event);
void hal_dcd_setup_received(uint8_t coreid, uint8_t const* p_request);
void hal_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event);
void hal_dcd_setup_received(uint8_t port, uint8_t const* p_request);
//------------- PIPE API -------------//
bool hal_dcd_control_xfer(uint8_t coreid, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete);
void hal_dcd_control_stall(uint8_t coreid);
bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete);
void hal_dcd_control_stall(uint8_t port);
bool hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc, endpoint_handle_t* eh);
bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, endpoint_handle_t* eh);
tusb_error_t dcd_pipe_queue_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
@ -92,9 +92,9 @@ tusb_error_t hal_dcd_pipe_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, uin
bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl);
// TODO coreid + endpoint address are part of endpoint handle, not endpoint handle, data toggle also need to be reset
// TODO port + endpoint address are part of endpoint handle, not endpoint handle, data toggle also need to be reset
void hal_dcd_pipe_stall(endpoint_handle_t edpt_hdl);
void hal_dcd_pipe_clear_stall(uint8_t coreid, uint8_t edpt_addr);
void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr);
#ifdef __cplusplus
}

View File

@ -122,9 +122,9 @@ static void bus_reset(void)
memclr_(&dcd_data, sizeof(dcd_data_t));
}
bool hal_dcd_init(uint8_t coreid)
bool hal_dcd_init(uint8_t port)
{
(void) coreid;
(void) port;
//------------- user manual 11.13 usb device controller initialization -------------// LPC_USB->USBEpInd = 0;
// step 6 : set up control endpoint
@ -161,7 +161,7 @@ static void endpoint_non_control_isr(uint32_t eot_int)
{
endpoint_handle_t edpt_hdl =
{
.coreid = 0,
.port = 0,
.index = ep_id,
.class_code = dcd_data.class_code[ep_id]
};
@ -204,7 +204,7 @@ static void endpoint_control_isr(void)
if ( BIT_TEST_(dcd_data.control_dma.int_on_complete, ep_id) )
{
endpoint_handle_t edpt_hdl = { .coreid = 0, .class_code = 0 };
endpoint_handle_t edpt_hdl = { .port = 0, .class_code = 0 };
dcd_data.control_dma.int_on_complete = 0;
// FIXME xferred_byte for control xfer is not needed now !!!
@ -216,9 +216,9 @@ static void endpoint_control_isr(void)
LPC_USB->USBEpIntClr = endpoint_int_status; // acknowledge interrupt TODO cannot immediately acknowledge setup packet
}
void hal_dcd_isr(uint8_t coreid)
void hal_dcd_isr(uint8_t port)
{
(void) coreid;
(void) port;
uint32_t const device_int_enable = LPC_USB->USBDevIntEn;
uint32_t const device_int_status = LPC_USB->USBDevIntSt & device_int_enable;
LPC_USB->USBDevIntClr = device_int_status;// Acknowledge handled interrupt
@ -280,21 +280,21 @@ void hal_dcd_isr(uint8_t coreid)
//--------------------------------------------------------------------+
// USBD API - CONTROLLER
//--------------------------------------------------------------------+
void hal_dcd_connect(uint8_t coreid)
void hal_dcd_connect(uint8_t port)
{
(void) coreid;
(void) port;
sie_write(SIE_CMDCODE_DEVICE_STATUS, 1, 1);
}
void hal_dcd_set_address(uint8_t coreid, uint8_t dev_addr)
void hal_dcd_set_address(uint8_t port, uint8_t dev_addr)
{
(void) coreid;
(void) port;
sie_write(SIE_CMDCODE_SET_ADDRESS, 1, 0x80 | dev_addr); // 7th bit is : device_enable
}
void hal_dcd_set_config(uint8_t coreid, uint8_t config_num)
void hal_dcd_set_config(uint8_t port, uint8_t config_num)
{
(void) coreid;
(void) port;
(void) config_num;
sie_write(SIE_CMDCODE_CONFIGURE_DEVICE, 1, 1);
}
@ -373,14 +373,14 @@ static tusb_error_t pipe_control_read(void * buffer, uint16_t length)
//--------------------------------------------------------------------+
// CONTROL PIPE API
//--------------------------------------------------------------------+
void hal_dcd_control_stall(uint8_t coreid)
void hal_dcd_control_stall(uint8_t port)
{
sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+0, 1, SIE_SET_ENDPOINT_STALLED_MASK | SIE_SET_ENDPOINT_CONDITION_STALLED_MASK);
}
bool hal_dcd_control_xfer(uint8_t coreid, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
{
(void) coreid;
(void) port;
VERIFY( !(length != 0 && p_buffer == NULL) );
@ -412,9 +412,9 @@ bool hal_dcd_control_xfer(uint8_t coreid, tusb_direction_t dir, uint8_t * p_buff
//--------------------------------------------------------------------+
// BULK/INTERRUPT/ISO PIPE API
//--------------------------------------------------------------------+
endpoint_handle_t hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
endpoint_handle_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
{
(void) coreid;
(void) port;
endpoint_handle_t const null_handle = { 0 };
@ -442,7 +442,7 @@ endpoint_handle_t hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t c
return (endpoint_handle_t)
{
.coreid = 0,
.port = 0,
.index = ep_id,
.class_code = class_code
};
@ -458,7 +458,7 @@ void hal_dcd_pipe_stall(endpoint_handle_t edpt_hdl)
sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+edpt_hdl.index, 1, SIE_SET_ENDPOINT_STALLED_MASK);
}
void hal_dcd_pipe_clear_stall(uint8_t coreid, uint8_t edpt_addr)
void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
{
uint8_t ep_id = edpt_addr2phy(edpt_addr);

View File

@ -164,28 +164,28 @@ static void queue_xfer_in_next_td(uint8_t ep_id);
//--------------------------------------------------------------------+
// CONTROLLER API
//--------------------------------------------------------------------+
void hal_dcd_connect(uint8_t coreid)
void hal_dcd_connect(uint8_t port)
{
(void) coreid;
(void) port;
LPC_USB->DEVCMDSTAT |= CMDSTAT_DEVICE_CONNECT_MASK;
}
void hal_dcd_set_config(uint8_t coreid, uint8_t config_num)
void hal_dcd_set_config(uint8_t port, uint8_t config_num)
{
}
void hal_dcd_set_address(uint8_t coreid, uint8_t dev_addr)
void hal_dcd_set_address(uint8_t port, uint8_t dev_addr)
{
(void) coreid;
(void) port;
LPC_USB->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK;
LPC_USB->DEVCMDSTAT |= dev_addr;
}
bool hal_dcd_init(uint8_t coreid)
bool hal_dcd_init(uint8_t port)
{
(void) coreid;
(void) port;
LPC_USB->EPLISTSTART = (uint32_t) dcd_data.qhd;
LPC_USB->DATABUFSTART = 0x20000000; // only SRAM1 & USB RAM can be used for transfer
@ -248,7 +248,7 @@ static void endpoint_non_control_isr(uint32_t int_status)
{
endpoint_handle_t edpt_hdl =
{
.coreid = 0,
.port = 0,
.index = ep_id,
.class_code = dcd_data.class_code[ep_id]
};
@ -286,7 +286,7 @@ static void endpoint_control_isr(uint32_t int_status)
if ( BIT_TEST_(dcd_data.current_ioc, ep_id) )
{
endpoint_handle_t edpt_hdl = { .coreid = 0 };
endpoint_handle_t edpt_hdl = { .port = 0 };
dcd_data.current_ioc = BIT_CLR_(dcd_data.current_ioc, ep_id);
@ -296,9 +296,9 @@ static void endpoint_control_isr(uint32_t int_status)
}
}
void hal_dcd_isr(uint8_t coreid)
void hal_dcd_isr(uint8_t port)
{
(void) coreid;
(void) port;
uint32_t const int_enable = LPC_USB->INTEN;
uint32_t const int_status = LPC_USB->INTSTAT & int_enable;
@ -349,7 +349,7 @@ void hal_dcd_isr(uint8_t coreid)
if ( BIT_TEST_(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
{ // received control request from host
// copy setup request & acknowledge so that the next setup can be received by hw
hal_dcd_setup_received(coreid, (uint8_t*)&dcd_data.setup_request);
hal_dcd_setup_received(port, (uint8_t*)&dcd_data.setup_request);
// NXP control flowchart clear Active & Stall on both Control IN/OUT endpoints
dcd_data.qhd[0][0].stall = dcd_data.qhd[1][0].stall = 0;
@ -373,16 +373,16 @@ void hal_dcd_isr(uint8_t coreid)
//--------------------------------------------------------------------+
// CONTROL PIPE API
//--------------------------------------------------------------------+
void hal_dcd_control_stall(uint8_t coreid)
void hal_dcd_control_stall(uint8_t port)
{
(void) coreid;
(void) port;
// TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around
dcd_data.qhd[0][0].stall = dcd_data.qhd[1][0].stall = 1;
}
bool hal_dcd_control_xfer(uint8_t coreid, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
{
(void) coreid;
(void) port;
// determine Endpoint where Data & Status phase occurred (IN or OUT)
uint8_t const ep_data = (dir == TUSB_DIR_DEV_TO_HOST) ? 1 : 0;
@ -438,7 +438,7 @@ bool dcd_pipe_is_stalled(endpoint_handle_t edpt_hdl)
return dcd_data.qhd[edpt_hdl.index][0].stall || dcd_data.qhd[edpt_hdl.index][1].stall;
}
void hal_dcd_pipe_clear_stall(uint8_t coreid, uint8_t edpt_addr)
void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
{
uint8_t ep_id = edpt_addr2phy(edpt_addr);
// uint8_t active_buffer = BIT_TEST_(LPC_USB->EPINUSE, ep_id) ? 1 : 0;
@ -456,9 +456,9 @@ void hal_dcd_pipe_clear_stall(uint8_t coreid, uint8_t edpt_addr)
}
}
endpoint_handle_t hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
endpoint_handle_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
{
(void) coreid;
(void) port;
endpoint_handle_t const null_handle = { 0 };
if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle; // TODO not support ISO yet
@ -483,7 +483,7 @@ endpoint_handle_t hal_dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t c
return (endpoint_handle_t)
{
.coreid = 0,
.port = 0,
.index = ep_id,
.class_code = class_code
};

View File

@ -102,15 +102,15 @@ enum { USBD_CLASS_DRIVER_COUNT = sizeof(usbd_class_drivers) / sizeof(usbd_class_
//--------------------------------------------------------------------+
// INTERNAL OBJECT & FUNCTION DECLARATION
//--------------------------------------------------------------------+
static tusb_error_t usbd_set_configure_received(uint8_t coreid, uint8_t config_number);
static tusb_error_t get_descriptor(uint8_t coreid, tusb_control_request_t const * const p_request, uint8_t const ** pp_buffer, uint16_t * p_length);
static tusb_error_t usbd_set_configure_received(uint8_t port, uint8_t config_number);
static tusb_error_t get_descriptor(uint8_t port, tusb_control_request_t const * const p_request, uint8_t const ** pp_buffer, uint16_t * p_length);
//--------------------------------------------------------------------+
// APPLICATION INTERFACE
//--------------------------------------------------------------------+
bool tud_mounted(uint8_t coreid)
bool tud_mounted(uint8_t port)
{
return usbd_devices[coreid].state == TUSB_DEVICE_STATE_CONFIGURED;
return usbd_devices[port].state == TUSB_DEVICE_STATE_CONFIGURED;
}
//--------------------------------------------------------------------+
@ -129,7 +129,7 @@ typedef enum
typedef struct ATTR_ALIGNED(4)
{
uint8_t coreid;
uint8_t port;
uint8_t event_id;
uint8_t sub_event_id;
uint8_t reserved;
@ -161,7 +161,7 @@ static osal_queue_t usbd_queue_hdl;
//--------------------------------------------------------------------+
// IMPLEMENTATION
//--------------------------------------------------------------------+
tusb_error_t usbd_control_request_subtask(uint8_t coreid, tusb_control_request_t const * const p_request);
tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t const * const p_request);
static tusb_error_t usbd_body_subtask(void);
tusb_error_t usbd_init (void)
@ -244,7 +244,7 @@ static tusb_error_t usbd_body_subtask(void)
if ( USBD_EVENTID_SETUP_RECEIVED == event.event_id )
{
OSAL_SUBTASK_INVOKED_AND_WAIT( usbd_control_request_subtask(event.coreid, &event.setup_received), error );
OSAL_SUBTASK_INVOKED_AND_WAIT( usbd_control_request_subtask(event.port, &event.setup_received), error );
}else if (USBD_EVENTID_XFER_DONE == event.event_id)
{
// Call class handling function, Class that endpoint not belong to should check and return
@ -261,7 +261,7 @@ static tusb_error_t usbd_body_subtask(void)
{
if ( usbd_class_drivers[class_code].sof )
{
usbd_class_drivers[class_code].sof( event.coreid );
usbd_class_drivers[class_code].sof( event.port );
}
}
}
@ -276,7 +276,7 @@ static tusb_error_t usbd_body_subtask(void)
//--------------------------------------------------------------------+
// CONTROL REQUEST
//--------------------------------------------------------------------+
tusb_error_t usbd_control_request_subtask(uint8_t coreid, tusb_control_request_t const * const p_request)
tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t const * const p_request)
{
OSAL_SUBTASK_BEGIN
@ -292,21 +292,21 @@ tusb_error_t usbd_control_request_subtask(uint8_t coreid, tusb_control_request_t
uint8_t const * p_buffer = NULL;
uint16_t length = 0;
error = get_descriptor(coreid, p_request, &p_buffer, &length);
error = get_descriptor(port, p_request, &p_buffer, &length);
if ( TUSB_ERROR_NONE == error )
{
hal_dcd_control_xfer(coreid, (tusb_direction_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length, false);
hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length, false);
}
}
else if ( TUSB_REQUEST_SET_ADDRESS == p_request->bRequest )
{
hal_dcd_set_address(coreid, (uint8_t) p_request->wValue);
usbd_devices[coreid].state = TUSB_DEVICE_STATE_ADDRESSED;
hal_dcd_set_address(port, (uint8_t) p_request->wValue);
usbd_devices[port].state = TUSB_DEVICE_STATE_ADDRESSED;
}
else if ( TUSB_REQUEST_SET_CONFIGURATION == p_request->bRequest )
{
usbd_set_configure_received(coreid, (uint8_t) p_request->wValue);
usbd_set_configure_received(port, (uint8_t) p_request->wValue);
}else
{
error = TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
@ -317,13 +317,13 @@ tusb_error_t usbd_control_request_subtask(uint8_t coreid, tusb_control_request_t
{
static uint8_t class_code;
class_code = usbd_devices[coreid].interface2class[ u16_low_u8(p_request->wIndex) ];
class_code = usbd_devices[port].interface2class[ u16_low_u8(p_request->wIndex) ];
// TODO [Custom] TUSB_CLASS_DIAGNOSTIC, vendor etc ...
if ( (class_code > 0) && (class_code < USBD_CLASS_DRIVER_COUNT) &&
usbd_class_drivers[class_code].control_request_subtask )
{
OSAL_SUBTASK_INVOKED_AND_WAIT( usbd_class_drivers[class_code].control_request_subtask(coreid, p_request), error );
OSAL_SUBTASK_INVOKED_AND_WAIT( usbd_class_drivers[class_code].control_request_subtask(port, p_request), error );
}else
{
error = TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
@ -335,7 +335,7 @@ tusb_error_t usbd_control_request_subtask(uint8_t coreid, tusb_control_request_t
TUSB_REQUEST_TYPE_STANDARD == p_request->bmRequestType_bit.type &&
TUSB_REQUEST_CLEAR_FEATURE == p_request->bRequest )
{
hal_dcd_pipe_clear_stall(coreid, u16_low_u8(p_request->wIndex) );
hal_dcd_pipe_clear_stall(port, u16_low_u8(p_request->wIndex) );
} else
{
error = TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
@ -343,11 +343,11 @@ tusb_error_t usbd_control_request_subtask(uint8_t coreid, tusb_control_request_t
if(TUSB_ERROR_NONE != error)
{ // Response with Protocol Stall if request is not supported
hal_dcd_control_stall(coreid);
hal_dcd_control_stall(port);
// ASSERT(error == TUSB_ERROR_NONE, VOID_RETURN);
}else if (p_request->wLength == 0)
{
hal_dcd_control_xfer(coreid, (tusb_direction_t) p_request->bmRequestType_bit.direction, NULL, 0, false); // zero length for non-data
hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, NULL, 0, false); // zero length for non-data
}
OSAL_SUBTASK_END
@ -355,10 +355,10 @@ tusb_error_t usbd_control_request_subtask(uint8_t coreid, tusb_control_request_t
// TODO Host (windows) can get HID report descriptor before set configured
// may need to open interface before set configured
static tusb_error_t usbd_set_configure_received(uint8_t coreid, uint8_t config_number)
static tusb_error_t usbd_set_configure_received(uint8_t port, uint8_t config_number)
{
hal_dcd_set_config(coreid, config_number);
usbd_devices[coreid].state = TUSB_DEVICE_STATE_CONFIGURED;
hal_dcd_set_config(port, config_number);
usbd_devices[port].state = TUSB_DEVICE_STATE_CONFIGURED;
//------------- parse configuration & open drivers -------------//
uint8_t const * p_desc_config = tusbd_descriptor_pointers.p_configuration;
@ -381,12 +381,12 @@ static tusb_error_t usbd_set_configure_received(uint8_t coreid, uint8_t config_n
class_index = p_desc_interface->bInterfaceClass;
ASSERT( class_index != 0 && class_index < USBD_CLASS_DRIVER_COUNT && usbd_class_drivers[class_index].open != NULL, TUSB_ERROR_NOT_SUPPORTED_YET );
ASSERT( 0 == usbd_devices[coreid].interface2class[p_desc_interface->bInterfaceNumber], TUSB_ERROR_FAILED); // duplicate interface number TODO alternate setting
ASSERT( 0 == usbd_devices[port].interface2class[p_desc_interface->bInterfaceNumber], TUSB_ERROR_FAILED); // duplicate interface number TODO alternate setting
usbd_devices[coreid].interface2class[p_desc_interface->bInterfaceNumber] = class_index;
usbd_devices[port].interface2class[p_desc_interface->bInterfaceNumber] = class_index;
uint16_t length=0;
ASSERT_STATUS( usbd_class_drivers[class_index].open( coreid, p_desc_interface, &length ) );
ASSERT_STATUS( usbd_class_drivers[class_index].open( port, p_desc_interface, &length ) );
ASSERT( length >= sizeof(tusb_descriptor_interface_t), TUSB_ERROR_FAILED );
p_desc += length;
@ -394,12 +394,12 @@ static tusb_error_t usbd_set_configure_received(uint8_t coreid, uint8_t config_n
}
// invoke callback
tud_mount_cb(coreid);
tud_mount_cb(port);
return TUSB_ERROR_NONE;
}
static tusb_error_t get_descriptor(uint8_t coreid, tusb_control_request_t const * const p_request, uint8_t const ** pp_buffer, uint16_t * p_length)
static tusb_error_t get_descriptor(uint8_t port, tusb_control_request_t const * const p_request, uint8_t const ** pp_buffer, uint16_t * p_length)
{
tusb_std_descriptor_type_t const desc_type = (tusb_std_descriptor_type_t) u16_high_u8(p_request->wValue);
uint8_t const desc_index = u16_low_u8( p_request->wValue );
@ -448,28 +448,28 @@ static tusb_error_t get_descriptor(uint8_t coreid, tusb_control_request_t const
//--------------------------------------------------------------------+
// USBD-DCD Callback API
//--------------------------------------------------------------------+
void hal_dcd_bus_event(uint8_t coreid, usbd_bus_event_type_t bus_event)
void hal_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event)
{
switch(bus_event)
{
case USBD_BUS_EVENT_RESET :
memclr_(&usbd_devices[coreid], sizeof(usbd_device_info_t));
memclr_(&usbd_devices[port], sizeof(usbd_device_info_t));
osal_queue_flush(usbd_queue_hdl);
osal_semaphore_reset(usbd_control_xfer_sem_hdl);
for (uint8_t class_code = TUSB_CLASS_AUDIO; class_code < USBD_CLASS_DRIVER_COUNT; class_code++)
{
if ( usbd_class_drivers[class_code].close ) usbd_class_drivers[class_code].close( coreid );
if ( usbd_class_drivers[class_code].close ) usbd_class_drivers[class_code].close( port );
}
// invoke callback
tud_umount_cb(coreid);
tud_umount_cb(port);
break;
case USBD_BUS_EVENT_SOF:
{
usbd_task_event_t task_event =
{
.coreid = coreid,
.port = port,
.event_id = USBD_EVENTID_SOF,
};
osal_queue_send(usbd_queue_hdl, &task_event);
@ -479,18 +479,18 @@ void hal_dcd_bus_event(uint8_t coreid, usbd_bus_event_type_t bus_event)
case USBD_BUS_EVENT_UNPLUGGED : break;
case USBD_BUS_EVENT_SUSPENDED:
usbd_devices[coreid].state = TUSB_DEVICE_STATE_SUSPENDED;
usbd_devices[port].state = TUSB_DEVICE_STATE_SUSPENDED;
break;
default: break;
}
}
void hal_dcd_setup_received(uint8_t coreid, uint8_t const* p_request)
void hal_dcd_setup_received(uint8_t port, uint8_t const* p_request)
{
usbd_task_event_t task_event =
{
.coreid = coreid,
.port = port,
.event_id = USBD_EVENTID_SETUP_RECEIVED,
};
@ -508,7 +508,7 @@ void usbd_xfer_isr(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xfer
{
usbd_task_event_t task_event =
{
.coreid = edpt_hdl.coreid,
.port = edpt_hdl.port,
.event_id = USBD_EVENTID_XFER_DONE,
.sub_event_id = event
};

View File

@ -79,32 +79,32 @@ extern tusbd_descriptor_pointer_t tusbd_descriptor_pointers;
typedef struct {
void (* init) (void);
tusb_error_t (* open)(uint8_t, tusb_descriptor_interface_t const *, uint16_t*);
tusb_error_t (* control_request_subtask) (uint8_t coreid, tusb_control_request_t const *);
tusb_error_t (* control_request_subtask) (uint8_t port, tusb_control_request_t const *);
tusb_error_t (* xfer_cb) (endpoint_handle_t, tusb_event_t, uint32_t);
// void (* routine)(void);
void (* sof)(uint8_t coreid);
void (* sof)(uint8_t port);
void (* close) (uint8_t);
} usbd_class_driver_t;
//--------------------------------------------------------------------+
// APPLICATION API
//--------------------------------------------------------------------+
bool tud_mounted(uint8_t coreid);
bool tud_mounted(uint8_t port);
/*------------- Callback -------------*/
/** \brief Callback function that will be invoked device is mounted (configured) by USB host
* \param[in] coreid USB Controller ID of the interface
* \param[in] port USB Controller ID of the interface
* \note This callback should be used by Application to \b set-up application data
*/
void tud_mount_cb(uint8_t coreid);
void tud_mount_cb(uint8_t port);
/** \brief Callback function that will be invoked when device is unmounted (bus reset/unplugged)
* \param[in] coreid USB Controller ID of the interface
* \param[in] port USB Controller ID of the interface
* \note This callback should be used by Application to \b tear-down application data
*/
void tud_umount_cb(uint8_t coreid);
void tud_umount_cb(uint8_t port);
//void tud_device_suspended_cb(uint8_t coreid);
//void tud_device_suspended_cb(uint8_t port);
//--------------------------------------------------------------------+
// CLASS-USBD & INTERNAL API

View File

@ -74,18 +74,18 @@ extern "C" {
bool hal_usb_init(void);
/** \brief Enable USB Interrupt on a specific USB Controller
* \param[in] coreid is a zero-based index to identify USB controller's ID
* \param[in] port is a zero-based index to identify USB controller's ID
* \note Some MCUs such as NXP LPC43xx has multiple USB controllers. It is necessary to know which USB controller for
* those MCUs.
*/
void hal_usb_int_enable(uint8_t coreid);
void hal_usb_int_enable(uint8_t port);
/** \brief Disable USB Interrupt on a specific USB Controller
* \param[in] coreid is a zero-based index to identify USB controller's ID
* \param[in] port is a zero-based index to identify USB controller's ID
* \note Some MCUs such as NXP LPC43xx has multiple USB controllers. It is necessary to know which USB controller for
* those MCUs.
*/
void hal_usb_int_disable(uint8_t coreid);
void hal_usb_int_disable(uint8_t port);