RP2040 support
This commit is contained in:
graham sanderson
parent
589dfdb0e5
commit
e0aa405d19
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@ -0,0 +1,59 @@
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#ifndef KEYBOARD_HELPER_H
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#define KEYBAORD_HELPER_H
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#include <stdbool.h>
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#include <stdint.h>
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#include "tusb.h"
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// look up new key in previous keys
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inline bool find_key_in_report(hid_keyboard_report_t const *p_report, uint8_t keycode)
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{
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for(uint8_t i = 0; i < 6; i++)
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{
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if (p_report->keycode[i] == keycode) return true;
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}
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return false;
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}
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inline uint8_t keycode_to_ascii(uint8_t modifier, uint8_t keycode)
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{
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return keycode > 128 ? 0 :
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hid_keycode_to_ascii_tbl [keycode][modifier & (KEYBOARD_MODIFIER_LEFTSHIFT | KEYBOARD_MODIFIER_RIGHTSHIFT) ? 1 : 0];
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}
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void print_kbd_report(hid_keyboard_report_t *prev_report, hid_keyboard_report_t const *new_report)
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{
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printf("Report: ");
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uint8_t c;
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// I assume it's possible to have up to 6 keypress events per report?
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for (uint8_t i = 0; i < 6; i++)
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{
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// Check for key presses
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if (new_report->keycode[i])
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{
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// If not in prev report then it is newly pressed
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if ( !find_key_in_report(prev_report, new_report->keycode[i]) )
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c = keycode_to_ascii(new_report->modifier, new_report->keycode[i]);
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printf("press %c ", c);
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}
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// Check for key depresses (i.e. was present in prev report but not here)
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if (prev_report->keycode[i])
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{
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// If not present in the current report then depressed
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if (!find_key_in_report(new_report, prev_report->keycode[i]))
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{
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c = keycode_to_ascii(prev_report->modifier, prev_report->keycode[i]);
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printf("depress %c ", c);
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}
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}
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}
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printf("\n");
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}
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#endif
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@ -80,6 +80,13 @@ int board_uart_write(void const * buf, int len);
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return os_time_ticks_to_ms32( os_time_get() );
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}
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#elif CFG_TUSB_OS == OPT_OS_PICO
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#include "pico/time.h"
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static inline uint32_t board_millis(void)
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{
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return to_ms_since_boot(get_absolute_time());
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}
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#else
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#error "board_millis() is not implemented for this OS"
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#endif
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@ -117,6 +117,9 @@
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#elif CFG_TUSB_MCU == OPT_MCU_DA1469X
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#include "DA1469xAB.h"
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#elif CFG_TUSB_MCU == OPT_MCU_RP2040
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#include "pico.h"
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#else
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#error "Missing MCU header"
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#endif
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@ -0,0 +1,99 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "pico/stdlib.h"
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#include "../board.h"
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#ifndef LED_PIN
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#define LED_PIN PICO_DEFAULT_LED_PIN
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#endif
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void board_init(void)
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{
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setup_default_uart();
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gpio_init(LED_PIN);
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gpio_set_dir(LED_PIN, 1);
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// Button
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// todo probably set up device mode?
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#if TUSB_OPT_HOST_ENABLED
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// set portfunc to host !!!
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#endif
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}
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////--------------------------------------------------------------------+
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//// USB Interrupt Handler
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////--------------------------------------------------------------------+
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//void USB_IRQHandler(void)
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//{
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//#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
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// tuh_isr(0);
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//#endif
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//
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//#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
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// tud_int_handler(0);
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//#endif
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//}
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
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void board_led_write(bool state)
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{
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gpio_put(LED_PIN, state);
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}
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uint32_t board_button_read(void)
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{
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return 0;
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}
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int board_uart_read(uint8_t* buf, int len)
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{
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for(int i=0;i<len;i++) {
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buf[i] = uart_getc(uart_default);
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}
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return 0;
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}
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int board_uart_write(void const * buf, int len)
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{
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// UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
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for(int i=0;i<len;i++) {
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uart_putc(uart_default, ((char *)buf)[i]);
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}
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return 0;
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}
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#if CFG_TUSB_OS == OPT_OS_NONE
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uint32_t board_millis(void)
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{
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return to_ms_since_boot(get_absolute_time());
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}
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#endif
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@ -1 +1 @@
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Subproject commit 6fd71727de19733a96766fb93990d7d3ab24ce8a
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Subproject commit 66b5a11995025426224e0ba6f377322e6e8893b6
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2
lib/lwip
2
lib/lwip
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@ -1 +1 @@
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Subproject commit 159e31b689577dbf69cf0683bbaffbd71fa5ee10
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Subproject commit 0192fe773ec28e11f66ec76f4e827fbb58b7e257
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@ -39,6 +39,7 @@ typedef struct {
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uint8_t itf_num;
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uint8_t ep_in;
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uint8_t ep_out;
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bool valid;
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uint16_t report_size;
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}hidh_interface_t;
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@ -53,6 +54,7 @@ static inline bool hidh_interface_open(uint8_t rhport, uint8_t dev_addr, uint8_t
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p_hid->ep_in = p_endpoint_desc->bEndpointAddress;
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p_hid->report_size = p_endpoint_desc->wMaxPacketSize.size; // TODO get size from report descriptor
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p_hid->itf_num = interface_number;
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p_hid->valid = true;
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return true;
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}
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@ -246,14 +248,14 @@ bool hidh_set_config(uint8_t dev_addr, uint8_t itf_num)
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usbh_driver_set_config_complete(dev_addr, itf_num);
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#if CFG_TUH_HID_KEYBOARD
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if ( keyboardh_data[dev_addr-1].itf_num == itf_num)
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if (( keyboardh_data[dev_addr-1].itf_num == itf_num) && keyboardh_data[dev_addr-1].valid)
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{
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tuh_hid_keyboard_mounted_cb(dev_addr);
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}
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#endif
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#if CFG_TUH_HID_MOUSE
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if ( mouseh_data[dev_addr-1].ep_in == itf_num )
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if (( mouseh_data[dev_addr-1].ep_in == itf_num ) && mouseh_data[dev_addr-1].valid)
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{
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tuh_hid_mouse_mounted_cb(dev_addr);
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}
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@ -151,6 +151,12 @@ tusb_device_state_t tuh_device_get_state (uint8_t const dev_addr)
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return (tusb_device_state_t) _usbh_devices[dev_addr].state;
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}
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tusb_speed_t tuh_device_get_speed (uint8_t const dev_addr)
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{
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TU_ASSERT( dev_addr <= CFG_TUSB_HOST_DEVICE_MAX, TUSB_DEVICE_STATE_UNPLUG);
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return _usbh_devices[dev_addr].speed;
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}
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void osal_task_delay(uint32_t msec)
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{
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(void) msec;
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@ -86,6 +86,7 @@ extern void hcd_int_handler(uint8_t rhport);
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#define tuh_int_handler hcd_int_handler
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tusb_device_state_t tuh_device_get_state (uint8_t dev_addr);
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tusb_speed_t tuh_device_get_speed (uint8_t dev_addr);
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static inline bool tuh_device_is_configured(uint8_t dev_addr)
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{
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return tuh_device_get_state(dev_addr) == TUSB_DEVICE_STATE_CONFIGURED;
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@ -53,6 +53,8 @@ typedef void (*osal_task_func_t)( void * );
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#include "osal_freertos.h"
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#elif CFG_TUSB_OS == OPT_OS_MYNEWT
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#include "osal_mynewt.h"
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#elif CFG_TUSB_OS == OPT_OS_PICO
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#include "osal_pico.h"
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#elif CFG_TUSB_OS == OPT_OS_CUSTOM
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#include "tusb_os_custom.h" // implemented by application
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#else
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@ -0,0 +1,192 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef _TUSB_OSAL_PICO_H_
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#define _TUSB_OSAL_PICO_H_
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#include "pico/time.h"
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#include "pico/sem.h"
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#include "pico/mutex.h"
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#include "pico/critical_section.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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//--------------------------------------------------------------------+
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// TASK API
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//--------------------------------------------------------------------+
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#ifndef RP2040_USB_HOST_MODE
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static inline void osal_task_delay(uint32_t msec)
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{
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sleep_ms(msec);
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}
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#endif
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//--------------------------------------------------------------------+
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// Binary Semaphore API
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//--------------------------------------------------------------------+
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typedef struct semaphore osal_semaphore_def_t, *osal_semaphore_t;
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static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef)
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{
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sem_init(semdef, 0, 255);
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return semdef;
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}
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static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
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{
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sem_release(sem_hdl);
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return true;
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}
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static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec)
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{
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return sem_acquire_timeout_ms(sem_hdl, msec);
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}
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static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl)
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{
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sem_reset(sem_hdl, 0);
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}
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//--------------------------------------------------------------------+
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// MUTEX API
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// Within tinyusb, mutex is never used in ISR context
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//--------------------------------------------------------------------+
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typedef struct mutex osal_mutex_def_t, *osal_mutex_t;
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static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
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{
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mutex_init(mdef);
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return mdef;
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}
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static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec)
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{
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return mutex_enter_timeout_ms(mutex_hdl, msec);
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}
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static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
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{
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mutex_exit(mutex_hdl);
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return true;
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}
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//--------------------------------------------------------------------+
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// QUEUE API
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//--------------------------------------------------------------------+
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#include "common/tusb_fifo.h"
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#if TUSB_OPT_HOST_ENABLED
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extern void hcd_int_disable(uint8_t rhport);
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extern void hcd_int_enable(uint8_t rhport);
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#endif
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typedef struct
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{
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tu_fifo_t ff;
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struct critical_section critsec; // osal_queue may be used in IRQs, so need critical section
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} osal_queue_def_t;
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typedef osal_queue_def_t* osal_queue_t;
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// role device/host is used by OS NONE for mutex (disable usb isr) only
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#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \
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uint8_t _name##_buf[_depth*sizeof(_type)]; \
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osal_queue_def_t _name = { \
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.ff = { \
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.buffer = _name##_buf, \
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.depth = _depth, \
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.item_size = sizeof(_type), \
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.overwritable = false, \
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}\
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}
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// lock queue by disable USB interrupt
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static inline void _osal_q_lock(osal_queue_t qhdl)
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{
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critical_section_enter_blocking(&qhdl->critsec);
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}
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// unlock queue
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static inline void _osal_q_unlock(osal_queue_t qhdl)
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{
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critical_section_exit(&qhdl->critsec);
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}
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static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
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{
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critical_section_init(&qdef->critsec);
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tu_fifo_clear(&qdef->ff);
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return (osal_queue_t) qdef;
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}
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static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
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{
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// TODO: revisit... docs say that mutexes are never used from IRQ context,
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// however osal_queue_recieve may be. therefore my assumption is that
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// the fifo mutex is not populated for queues used from an IRQ context
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assert(!qhdl->ff.mutex);
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_osal_q_lock(qhdl);
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bool success = tu_fifo_read(&qhdl->ff, data);
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_osal_q_unlock(qhdl);
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return success;
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}
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static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
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{
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// TODO: revisit... docs say that mutexes are never used from IRQ context,
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// however osal_queue_recieve may be. therefore my assumption is that
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// the fifo mutex is not populated for queues used from an IRQ context
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assert(!qhdl->ff.mutex);
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_osal_q_lock(qhdl);
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bool success = tu_fifo_write(&qhdl->ff, data);
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_osal_q_unlock(qhdl);
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TU_ASSERT(success);
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return success;
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}
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static inline bool osal_queue_empty(osal_queue_t qhdl)
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{
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// TODO: revisit; whether this is true or not currently, tu_fifo_empty is a single
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// volatile read.
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// Skip queue lock/unlock since this function is primarily called
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// with interrupt disabled before going into low power mode
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return tu_fifo_empty(&qhdl->ff);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _TUSB_OSAL_PICO_H_ */
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@ -0,0 +1,482 @@
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/*
|
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* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_RP2040
|
||||
|
||||
#include "pico.h"
|
||||
#include "rp2040_usb.h"
|
||||
|
||||
#if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
|
||||
#include "pico/fix/rp2040_usb_device_enumeration.h"
|
||||
#endif
|
||||
|
||||
|
||||
#include "device/dcd.h"
|
||||
|
||||
#include "pico/stdlib.h"
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* Low level controller
|
||||
*------------------------------------------------------------------*/
|
||||
|
||||
#define usb_hw_set hw_set_alias(usb_hw)
|
||||
#define usb_hw_clear hw_clear_alias(usb_hw)
|
||||
|
||||
// Init these in dcd_init
|
||||
static uint8_t assigned_address;
|
||||
static uint8_t *next_buffer_ptr;
|
||||
|
||||
// Endpoints 0-15, direction 0 for out and 1 for in.
|
||||
static struct hw_endpoint hw_endpoints[16][2] = {0};
|
||||
|
||||
static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, uint8_t in)
|
||||
{
|
||||
return &hw_endpoints[num][in];
|
||||
}
|
||||
|
||||
static struct hw_endpoint *hw_endpoint_get_by_addr(uint8_t ep_addr)
|
||||
{
|
||||
uint8_t num = tu_edpt_number(ep_addr);
|
||||
uint8_t in = (ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0;
|
||||
return hw_endpoint_get_by_num(num, in);
|
||||
}
|
||||
static void _hw_endpoint_alloc(struct hw_endpoint *ep)
|
||||
{
|
||||
uint size = 64;
|
||||
if (ep->wMaxPacketSize > 64)
|
||||
{
|
||||
size = ep->wMaxPacketSize;
|
||||
}
|
||||
|
||||
// Assumes single buffered for now
|
||||
ep->hw_data_buf = next_buffer_ptr;
|
||||
next_buffer_ptr += size;
|
||||
// Bits 0-5 are ignored by the controller so make sure these are 0
|
||||
if ((uintptr_t)next_buffer_ptr & 0b111111u)
|
||||
{
|
||||
// Round up to the next 64
|
||||
uint32_t fixptr = (uintptr_t)next_buffer_ptr;
|
||||
fixptr &= ~0b111111u;
|
||||
fixptr += 64;
|
||||
pico_info("Rounding non 64 byte boundary buffer up from %x to %x\n", (uintptr_t)next_buffer_ptr, fixptr);
|
||||
next_buffer_ptr = (uint8_t*)fixptr;
|
||||
}
|
||||
assert(((uintptr_t)next_buffer_ptr & 0b111111u) == 0);
|
||||
uint dpram_offset = hw_data_offset(ep->hw_data_buf);
|
||||
assert(hw_data_offset(next_buffer_ptr) <= USB_DPRAM_MAX);
|
||||
|
||||
pico_info("Alloced %d bytes at offset 0x%x (0x%p) for ep %d %s\n",
|
||||
size,
|
||||
dpram_offset,
|
||||
ep->hw_data_buf,
|
||||
ep->num,
|
||||
ep_dir_string[ep->in]);
|
||||
|
||||
// Fill in endpoint control register with buffer offset
|
||||
uint32_t reg = EP_CTRL_ENABLE_BITS
|
||||
| EP_CTRL_INTERRUPT_PER_BUFFER
|
||||
| (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB)
|
||||
| dpram_offset;
|
||||
|
||||
*ep->endpoint_control = reg;
|
||||
}
|
||||
|
||||
static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint wMaxPacketSize, uint8_t transfer_type)
|
||||
{
|
||||
uint8_t num = tu_edpt_number(ep_addr);
|
||||
bool in = ep_addr & TUSB_DIR_IN_MASK;
|
||||
ep->ep_addr = ep_addr;
|
||||
ep->in = in;
|
||||
// For device, IN is a tx transfer and OUT is an rx transfer
|
||||
ep->rx = in == false;
|
||||
ep->num = num;
|
||||
// Response to a setup packet on EP0 starts with pid of 1
|
||||
ep->next_pid = num == 0 ? 1u : 0u;
|
||||
|
||||
// Add some checks around the max packet size
|
||||
if (transfer_type == TUSB_XFER_ISOCHRONOUS)
|
||||
{
|
||||
if (wMaxPacketSize > USB_MAX_ISO_PACKET_SIZE)
|
||||
{
|
||||
panic("Isochronous wMaxPacketSize %d too large", wMaxPacketSize);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (wMaxPacketSize > USB_MAX_PACKET_SIZE)
|
||||
{
|
||||
panic("Isochronous wMaxPacketSize %d too large", wMaxPacketSize);
|
||||
}
|
||||
}
|
||||
|
||||
ep->wMaxPacketSize = wMaxPacketSize;
|
||||
ep->transfer_type = transfer_type;
|
||||
|
||||
// Every endpoint has a buffer control register in dpram
|
||||
if (ep->in)
|
||||
{
|
||||
ep->buffer_control = &usb_dpram->ep_buf_ctrl[num].in;
|
||||
}
|
||||
else
|
||||
{
|
||||
ep->buffer_control = &usb_dpram->ep_buf_ctrl[num].out;
|
||||
}
|
||||
|
||||
// Clear existing buffer control state
|
||||
*ep->buffer_control = 0;
|
||||
|
||||
if (ep->num == 0)
|
||||
{
|
||||
// EP0 has no endpoint control register because
|
||||
// the buffer offsets are fixed
|
||||
ep->endpoint_control = NULL;
|
||||
|
||||
// Buffer offset is fixed
|
||||
ep->hw_data_buf = (uint8_t*)&usb_dpram->ep0_buf_a[0];
|
||||
}
|
||||
else
|
||||
{
|
||||
// Set the endpoint control register (starts at EP1, hence num-1)
|
||||
if (in)
|
||||
{
|
||||
ep->endpoint_control = &usb_dpram->ep_ctrl[num-1].in;
|
||||
}
|
||||
else
|
||||
{
|
||||
ep->endpoint_control = &usb_dpram->ep_ctrl[num-1].out;
|
||||
}
|
||||
|
||||
// Now alloc a buffer and fill in endpoint control register
|
||||
_hw_endpoint_alloc(ep);
|
||||
}
|
||||
|
||||
ep->configured = true;
|
||||
}
|
||||
|
||||
#if 0 // todo unused
|
||||
static void _hw_endpoint_close(struct hw_endpoint *ep)
|
||||
{
|
||||
// Clear hardware registers and then zero the struct
|
||||
// Clears endpoint enable
|
||||
*ep->endpoint_control = 0;
|
||||
// Clears buffer available, etc
|
||||
*ep->buffer_control = 0;
|
||||
// Clear any endpoint state
|
||||
memset(ep, 0, sizeof(struct hw_endpoint));
|
||||
}
|
||||
|
||||
static void hw_endpoint_close(uint8_t ep_addr)
|
||||
{
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr);
|
||||
_hw_endpoint_close(ep);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void hw_endpoint_init(uint8_t ep_addr, uint wMaxPacketSize, uint8_t bmAttributes)
|
||||
{
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr);
|
||||
_hw_endpoint_init(ep, ep_addr, wMaxPacketSize, bmAttributes);
|
||||
}
|
||||
|
||||
static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes, bool start)
|
||||
{
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr);
|
||||
_hw_endpoint_xfer(ep, buffer, total_bytes, start);
|
||||
}
|
||||
|
||||
static void hw_handle_buff_status(void)
|
||||
{
|
||||
uint32_t remaining_buffers = usb_hw->buf_status;
|
||||
pico_trace("buf_status 0x%08x\n", remaining_buffers);
|
||||
uint bit = 1u;
|
||||
for (uint i = 0; remaining_buffers && i < USB_MAX_ENDPOINTS * 2; i++)
|
||||
{
|
||||
if (remaining_buffers & bit)
|
||||
{
|
||||
uint __unused which = (usb_hw->buf_cpu_should_handle & bit) ? 1 : 0;
|
||||
// Should be single buffered
|
||||
assert(which == 0);
|
||||
// clear this in advance
|
||||
usb_hw_clear->buf_status = bit;
|
||||
// IN transfer for even i, OUT transfer for odd i
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_num(i >> 1u, !(i & 1u));
|
||||
// Continue xfer
|
||||
bool done = _hw_endpoint_xfer_continue(ep);
|
||||
if (done)
|
||||
{
|
||||
// Notify
|
||||
dcd_event_xfer_complete(0, ep->ep_addr, ep->len, XFER_RESULT_SUCCESS, true);
|
||||
hw_endpoint_reset_transfer(ep);
|
||||
}
|
||||
remaining_buffers &= ~bit;
|
||||
}
|
||||
bit <<= 1u;
|
||||
}
|
||||
}
|
||||
|
||||
static void reset_ep0(void)
|
||||
{
|
||||
// If we have finished this transfer on EP0 set pid back to 1 for next
|
||||
// setup transfer. Also clear a stall in case
|
||||
uint8_t addrs[] = {0x0, 0x80};
|
||||
for (uint i = 0 ; i < count_of(addrs); i++)
|
||||
{
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_addr(addrs[i]);
|
||||
ep->next_pid = 1u;
|
||||
ep->stalled = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void ep0_0len_status(void)
|
||||
{
|
||||
// Send 0len complete response on EP0 IN
|
||||
reset_ep0();
|
||||
hw_endpoint_xfer(0x80, NULL, 0, true);
|
||||
}
|
||||
|
||||
static void _hw_endpoint_stall(struct hw_endpoint *ep)
|
||||
{
|
||||
assert(!ep->stalled);
|
||||
if (ep->num == 0)
|
||||
{
|
||||
// A stall on EP0 has to be armed so it can be cleared on the next setup packet
|
||||
usb_hw_set->ep_stall_arm = ep->in ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
|
||||
}
|
||||
_hw_endpoint_buffer_control_set_mask32(ep, USB_BUF_CTRL_STALL);
|
||||
ep->stalled = true;
|
||||
}
|
||||
|
||||
static void hw_endpoint_stall(uint8_t ep_addr)
|
||||
{
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr);
|
||||
_hw_endpoint_stall(ep);
|
||||
}
|
||||
|
||||
static void _hw_endpoint_clear_stall(struct hw_endpoint *ep)
|
||||
{
|
||||
if (ep->num == 0)
|
||||
{
|
||||
// Probably already been cleared but no harm
|
||||
usb_hw_clear->ep_stall_arm = ep->in ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
|
||||
}
|
||||
_hw_endpoint_buffer_control_clear_mask32(ep, USB_BUF_CTRL_STALL);
|
||||
ep->stalled = false;
|
||||
}
|
||||
|
||||
static void hw_endpoint_clear_stall(uint8_t ep_addr)
|
||||
{
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr);
|
||||
_hw_endpoint_clear_stall(ep);
|
||||
}
|
||||
|
||||
static void dcd_rp2040_irq(void)
|
||||
{
|
||||
uint32_t status = usb_hw->ints;
|
||||
uint32_t handled = 0;
|
||||
|
||||
if (status & USB_INTS_SETUP_REQ_BITS)
|
||||
{
|
||||
handled |= USB_INTS_SETUP_REQ_BITS;
|
||||
uint8_t const *setup = (uint8_t const *)&usb_dpram->setup_packet;
|
||||
// Clear stall bits and reset pid
|
||||
reset_ep0();
|
||||
// Pass setup packet to tiny usb
|
||||
dcd_event_setup_received(0, setup, true);
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_SETUP_REC_BITS;
|
||||
}
|
||||
|
||||
if (status & USB_INTS_BUFF_STATUS_BITS)
|
||||
{
|
||||
handled |= USB_INTS_BUFF_STATUS_BITS;
|
||||
hw_handle_buff_status();
|
||||
}
|
||||
|
||||
if (status & USB_INTS_BUS_RESET_BITS)
|
||||
{
|
||||
pico_trace("BUS RESET (addr %d -> %d)\n", assigned_address, 0);
|
||||
assigned_address = 0;
|
||||
usb_hw->dev_addr_ctrl = assigned_address;
|
||||
handled |= USB_INTS_BUS_RESET_BITS;
|
||||
dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_BUS_RESET_BITS;
|
||||
#if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
|
||||
rp2040_usb_device_enumeration_fix();
|
||||
#endif
|
||||
}
|
||||
|
||||
if (status ^ handled)
|
||||
{
|
||||
panic("Unhandled IRQ 0x%x\n", (uint) (status ^ handled));
|
||||
}
|
||||
}
|
||||
|
||||
#define USB_INTS_ERROR_BITS ( \
|
||||
USB_INTS_ERROR_DATA_SEQ_BITS | \
|
||||
USB_INTS_ERROR_BIT_STUFF_BITS | \
|
||||
USB_INTS_ERROR_CRC_BITS | \
|
||||
USB_INTS_ERROR_RX_OVERFLOW_BITS | \
|
||||
USB_INTS_ERROR_RX_TIMEOUT_BITS)
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* Controller API
|
||||
*------------------------------------------------------------------*/
|
||||
void dcd_init (uint8_t rhport)
|
||||
{
|
||||
pico_trace("dcd_init %d\n", rhport);
|
||||
assert(rhport == 0);
|
||||
|
||||
// Reset hardware to default state
|
||||
rp2040_usb_init();
|
||||
|
||||
irq_set_exclusive_handler(USBCTRL_IRQ, dcd_rp2040_irq);
|
||||
memset(hw_endpoints, 0, sizeof(hw_endpoints));
|
||||
assigned_address = 0;
|
||||
next_buffer_ptr = &usb_dpram->epx_data[0];
|
||||
|
||||
// EP0 always exists so init it now
|
||||
// EP0 OUT
|
||||
hw_endpoint_init(0x0, 64, 0);
|
||||
// EP0 IN
|
||||
hw_endpoint_init(0x80, 64, 0);
|
||||
|
||||
// Initializes the USB peripheral for device mode and enables it.
|
||||
// Don't need to enable the pull up here. Force VBUS
|
||||
usb_hw->main_ctrl = USB_MAIN_CTRL_CONTROLLER_EN_BITS;
|
||||
|
||||
// Enable individual controller IRQS here. Processor interrupt enable will be used
|
||||
// for the global interrupt enable...
|
||||
usb_hw->sie_ctrl = USB_SIE_CTRL_EP0_INT_1BUF_BITS;
|
||||
usb_hw->inte = USB_INTS_BUFF_STATUS_BITS | USB_INTS_BUS_RESET_BITS | USB_INTS_SETUP_REQ_BITS;
|
||||
|
||||
dcd_connect(rhport);
|
||||
}
|
||||
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
assert(rhport == 0);
|
||||
irq_set_enabled(USBCTRL_IRQ, true);
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
assert(rhport == 0);
|
||||
irq_set_enabled(USBCTRL_IRQ, false);
|
||||
}
|
||||
|
||||
void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
pico_trace("dcd_set_address %d %d\n", rhport, dev_addr);
|
||||
assert(rhport == 0);
|
||||
|
||||
// Can't set device address in hardware until status xfer has complete
|
||||
assigned_address = dev_addr;
|
||||
|
||||
ep0_0len_status();
|
||||
}
|
||||
|
||||
void dcd_remote_wakeup(uint8_t rhport)
|
||||
{
|
||||
panic("dcd_remote_wakeup %d\n", rhport);
|
||||
assert(rhport == 0);
|
||||
}
|
||||
|
||||
// disconnect by disabling internal pull-up resistor on D+/D-
|
||||
void dcd_disconnect(uint8_t rhport)
|
||||
{
|
||||
pico_info("dcd_disconnect %d\n", rhport);
|
||||
assert(rhport == 0);
|
||||
usb_hw_clear->sie_ctrl = USB_SIE_CTRL_PULLUP_EN_BITS;
|
||||
}
|
||||
|
||||
// connect by enabling internal pull-up resistor on D+/D-
|
||||
void dcd_connect(uint8_t rhport)
|
||||
{
|
||||
pico_info("dcd_connect %d\n", rhport);
|
||||
assert(rhport == 0);
|
||||
usb_hw_set->sie_ctrl = USB_SIE_CTRL_PULLUP_EN_BITS;
|
||||
}
|
||||
|
||||
/*------------------------------------------------------------------*/
|
||||
/* DCD Endpoint port
|
||||
*------------------------------------------------------------------*/
|
||||
|
||||
void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request)
|
||||
{
|
||||
pico_trace("dcd_edpt0_status_complete %d\n", rhport);
|
||||
assert(rhport == 0);
|
||||
|
||||
if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
|
||||
request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
|
||||
request->bRequest == TUSB_REQ_SET_ADDRESS)
|
||||
{
|
||||
pico_trace("Set HW address %d\n", assigned_address);
|
||||
usb_hw->dev_addr_ctrl = assigned_address;
|
||||
}
|
||||
|
||||
reset_ep0();
|
||||
}
|
||||
|
||||
bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
|
||||
{
|
||||
pico_info("dcd_edpt_open %d %02x\n", rhport, desc_edpt->bEndpointAddress);
|
||||
assert(rhport == 0);
|
||||
hw_endpoint_init(desc_edpt->bEndpointAddress, desc_edpt->wMaxPacketSize.size, desc_edpt->bmAttributes.xfer);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
assert(rhport == 0);
|
||||
// True means start new xfer
|
||||
hw_endpoint_xfer(ep_addr, buffer, total_bytes, true);
|
||||
return true;
|
||||
}
|
||||
|
||||
void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
pico_trace("dcd_edpt_stall %d %02x\n", rhport, ep_addr);
|
||||
assert(rhport == 0);
|
||||
hw_endpoint_stall(ep_addr);
|
||||
}
|
||||
|
||||
void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
pico_trace("dcd_edpt_clear_stall %d %02x\n", rhport, ep_addr);
|
||||
assert(rhport == 0);
|
||||
hw_endpoint_clear_stall(ep_addr);
|
||||
}
|
||||
|
||||
|
||||
void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
// usbd.c says: In progress transfers on this EP may be delivered after this call
|
||||
pico_trace("dcd_edpt_close %d %02x\n", rhport, ep_addr);
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,549 @@
|
|||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED && CFG_TUSB_MCU == OPT_MCU_RP2040
|
||||
|
||||
#include "pico.h"
|
||||
#include "rp2040_usb.h"
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INCLUDE
|
||||
//--------------------------------------------------------------------+
|
||||
#include "osal/osal.h"
|
||||
|
||||
#include "host/hcd.h"
|
||||
#include "host/usbh.h"
|
||||
#include "host/usbh_hcd.h"
|
||||
|
||||
#define ROOT_PORT 0
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Low level rp2040 controller functions
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
#ifndef PICO_USB_HOST_INTERRUPT_ENDPOINTS
|
||||
#define PICO_USB_HOST_INTERRUPT_ENDPOINTS (USB_MAX_ENDPOINTS - 1)
|
||||
#endif
|
||||
static_assert(PICO_USB_HOST_INTERRUPT_ENDPOINTS <= USB_MAX_ENDPOINTS, "");
|
||||
|
||||
// Host mode uses one shared endpoint register for non-interrupt endpoint
|
||||
struct hw_endpoint eps[1 + PICO_USB_HOST_INTERRUPT_ENDPOINTS];
|
||||
#define epx (eps[0])
|
||||
|
||||
#define usb_hw_set hw_set_alias(usb_hw)
|
||||
#define usb_hw_clear hw_clear_alias(usb_hw)
|
||||
|
||||
// Used for hcd pipe busy.
|
||||
// todo still a bit wasteful
|
||||
// top bit set if valid
|
||||
uint8_t dev_ep_map[CFG_TUSB_HOST_DEVICE_MAX][1 + PICO_USB_HOST_INTERRUPT_ENDPOINTS][2];
|
||||
|
||||
// Flags we set by default in sie_ctrl (we add other bits on top)
|
||||
static uint32_t sie_ctrl_base = USB_SIE_CTRL_SOF_EN_BITS |
|
||||
USB_SIE_CTRL_KEEP_ALIVE_EN_BITS |
|
||||
USB_SIE_CTRL_PULLDOWN_EN_BITS |
|
||||
USB_SIE_CTRL_EP0_INT_1BUF_BITS;
|
||||
|
||||
static struct hw_endpoint *get_dev_ep(uint8_t dev_addr, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t num = tu_edpt_number(ep_addr);
|
||||
if (num == 0) {
|
||||
return &epx;
|
||||
}
|
||||
uint8_t in = (ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0;
|
||||
uint mapping = dev_ep_map[dev_addr-1][num][in];
|
||||
pico_trace("Get dev addr %d ep %d = %d\n", dev_addr, ep_addr, mapping);
|
||||
return mapping >= 128 ? eps + (mapping & 0x7fu) : NULL;
|
||||
}
|
||||
|
||||
static void set_dev_ep(uint8_t dev_addr, uint8_t ep_addr, struct hw_endpoint *ep)
|
||||
{
|
||||
uint8_t num = tu_edpt_number(ep_addr);
|
||||
uint8_t in = (ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0;
|
||||
uint32_t index = ep - eps;
|
||||
hard_assert(index < count_of(eps));
|
||||
// todo revisit why dev_addr can be 0 here
|
||||
if (dev_addr) {
|
||||
dev_ep_map[dev_addr-1][num][in] = 128u | index;
|
||||
}
|
||||
pico_trace("Set dev addr %d ep %d = %d\n", dev_addr, ep_addr, index);
|
||||
}
|
||||
|
||||
static inline uint8_t dev_speed(void)
|
||||
{
|
||||
return (usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS) >> USB_SIE_STATUS_SPEED_LSB;
|
||||
}
|
||||
|
||||
static bool need_pre(uint8_t dev_addr)
|
||||
{
|
||||
// If this device is different to the speed of the root device
|
||||
// (i.e. is a low speed device on a full speed hub) then need pre
|
||||
return hcd_port_speed_get(0) != tuh_device_get_speed(dev_addr);
|
||||
}
|
||||
|
||||
static void hw_xfer_complete(struct hw_endpoint *ep, xfer_result_t xfer_result)
|
||||
{
|
||||
// Mark transfer as done before we tell the tinyusb stack
|
||||
uint8_t dev_addr = ep->dev_addr;
|
||||
uint8_t ep_addr = ep->ep_addr;
|
||||
uint total_len = ep->total_len;
|
||||
hw_endpoint_reset_transfer(ep);
|
||||
hcd_event_xfer_complete(dev_addr, ep_addr, total_len, xfer_result, true);
|
||||
}
|
||||
|
||||
static void _handle_buff_status_bit(uint bit, struct hw_endpoint *ep)
|
||||
{
|
||||
usb_hw_clear->buf_status = bit;
|
||||
bool done = _hw_endpoint_xfer_continue(ep);
|
||||
if (done)
|
||||
{
|
||||
hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
|
||||
}
|
||||
}
|
||||
|
||||
static void hw_handle_buff_status(void)
|
||||
{
|
||||
uint32_t remaining_buffers = usb_hw->buf_status;
|
||||
pico_trace("buf_status 0x%08x\n", remaining_buffers);
|
||||
|
||||
// Check EPX first
|
||||
uint bit = 0b1;
|
||||
if (remaining_buffers & bit)
|
||||
{
|
||||
remaining_buffers &= ~bit;
|
||||
struct hw_endpoint *ep = &epx;
|
||||
_handle_buff_status_bit(bit, ep);
|
||||
}
|
||||
|
||||
// Check interrupt endpoints
|
||||
for (uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers; i++)
|
||||
{
|
||||
// EPX is bit 0
|
||||
// IEP1 is bit 2
|
||||
// IEP2 is bit 4
|
||||
// IEP3 is bit 6
|
||||
// etc
|
||||
bit = 1 << (i*2);
|
||||
|
||||
if (remaining_buffers & bit)
|
||||
{
|
||||
remaining_buffers &= ~bit;
|
||||
_handle_buff_status_bit(bit, &eps[i]);
|
||||
}
|
||||
}
|
||||
|
||||
if (remaining_buffers)
|
||||
{
|
||||
panic("Unhandled buffer %d\n", remaining_buffers);
|
||||
}
|
||||
}
|
||||
|
||||
static void hw_trans_complete(void)
|
||||
{
|
||||
struct hw_endpoint *ep = &epx;
|
||||
assert(ep->active);
|
||||
|
||||
if (ep->sent_setup)
|
||||
{
|
||||
pico_trace("Sent setup packet\n");
|
||||
hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
|
||||
}
|
||||
else
|
||||
{
|
||||
// Don't care. Will handle this in buff status
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static void hcd_rp2040_irq(void)
|
||||
{
|
||||
uint32_t status = usb_hw->ints;
|
||||
uint32_t handled = 0;
|
||||
|
||||
if (status & USB_INTS_HOST_CONN_DIS_BITS)
|
||||
{
|
||||
handled |= USB_INTS_HOST_CONN_DIS_BITS;
|
||||
|
||||
if (dev_speed())
|
||||
{
|
||||
hcd_event_device_attach(ROOT_PORT, true);
|
||||
}
|
||||
else
|
||||
{
|
||||
hcd_event_device_remove(ROOT_PORT, true);
|
||||
}
|
||||
|
||||
// Clear speed change interrupt
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_SPEED_BITS;
|
||||
}
|
||||
|
||||
if (status & USB_INTS_TRANS_COMPLETE_BITS)
|
||||
{
|
||||
handled |= USB_INTS_TRANS_COMPLETE_BITS;
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_TRANS_COMPLETE_BITS;
|
||||
hw_trans_complete();
|
||||
}
|
||||
|
||||
if (status & USB_INTS_BUFF_STATUS_BITS)
|
||||
{
|
||||
handled |= USB_INTS_BUFF_STATUS_BITS;
|
||||
hw_handle_buff_status();
|
||||
}
|
||||
|
||||
if (status & USB_INTS_STALL_BITS)
|
||||
{
|
||||
// We have rx'd a stall from the device
|
||||
pico_trace("Stall REC\n");
|
||||
handled |= USB_INTS_STALL_BITS;
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_STALL_REC_BITS;
|
||||
hw_xfer_complete(&epx, XFER_RESULT_STALLED);
|
||||
}
|
||||
|
||||
if (status & USB_INTS_ERROR_RX_TIMEOUT_BITS)
|
||||
{
|
||||
handled |= USB_INTS_ERROR_RX_TIMEOUT_BITS;
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_RX_TIMEOUT_BITS;
|
||||
}
|
||||
|
||||
if (status & USB_INTS_ERROR_DATA_SEQ_BITS)
|
||||
{
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_DATA_SEQ_ERROR_BITS;
|
||||
panic("Data Seq Error \n");
|
||||
}
|
||||
|
||||
if (status ^ handled)
|
||||
{
|
||||
panic("Unhandled IRQ 0x%x\n", (uint) (status ^ handled));
|
||||
}
|
||||
}
|
||||
|
||||
static struct hw_endpoint *_next_free_interrupt_ep(void)
|
||||
{
|
||||
struct hw_endpoint *ep = NULL;
|
||||
for (uint i = 1; i < count_of(eps); i++)
|
||||
{
|
||||
ep = &eps[i];
|
||||
if (!ep->configured)
|
||||
{
|
||||
// Will be configured by _hw_endpoint_init / _hw_endpoint_allocate
|
||||
ep->interrupt_num = i - 1;
|
||||
return ep;
|
||||
}
|
||||
}
|
||||
return ep;
|
||||
}
|
||||
|
||||
static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
|
||||
{
|
||||
struct hw_endpoint *ep = NULL;
|
||||
if (transfer_type == TUSB_XFER_INTERRUPT)
|
||||
{
|
||||
ep = _next_free_interrupt_ep();
|
||||
pico_info("Allocate interrupt ep %d\n", ep->interrupt_num);
|
||||
assert(ep);
|
||||
ep->buffer_control = &usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num].ctrl;
|
||||
ep->endpoint_control = &usbh_dpram->int_ep_ctrl[ep->interrupt_num].ctrl;
|
||||
// 0x180 for epx
|
||||
// 0x1c0 for intep0
|
||||
// 0x200 for intep1
|
||||
// etc
|
||||
ep->hw_data_buf = &usbh_dpram->epx_data[64 * (ep->interrupt_num + 1)];
|
||||
}
|
||||
else
|
||||
{
|
||||
ep = &epx;
|
||||
ep->buffer_control = &usbh_dpram->epx_buf_ctrl;
|
||||
ep->endpoint_control = &usbh_dpram->epx_ctrl;
|
||||
ep->hw_data_buf = &usbh_dpram->epx_data[0];
|
||||
}
|
||||
return ep;
|
||||
}
|
||||
|
||||
static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t ep_addr, uint wMaxPacketSize, uint8_t transfer_type, uint8_t bmInterval)
|
||||
{
|
||||
// Already has data buffer, endpoint control, and buffer control allocated at this point
|
||||
assert(ep->endpoint_control);
|
||||
assert(ep->buffer_control);
|
||||
assert(ep->hw_data_buf);
|
||||
|
||||
uint8_t num = tu_edpt_number(ep_addr);
|
||||
bool in = ep_addr & TUSB_DIR_IN_MASK;
|
||||
ep->ep_addr = ep_addr;
|
||||
ep->dev_addr = dev_addr;
|
||||
ep->in = in;
|
||||
// For host, IN to host == RX, anything else rx == false
|
||||
ep->rx = in == true;
|
||||
ep->num = num;
|
||||
// Response to a setup packet on EP0 starts with pid of 1
|
||||
ep->next_pid = num == 0 ? 1u : 0u;
|
||||
ep->wMaxPacketSize = wMaxPacketSize;
|
||||
ep->transfer_type = transfer_type;
|
||||
|
||||
pico_trace("hw_endpoint_init dev %d ep %d %s xfer %d\n", ep->dev_addr, ep->num, ep_dir_string[ep->in], ep->transfer_type);
|
||||
pico_trace("dev %d ep %d %s setup buffer @ 0x%p\n", ep->dev_addr, ep->num, ep_dir_string[ep->in], ep->hw_data_buf);
|
||||
uint dpram_offset = hw_data_offset(ep->hw_data_buf);
|
||||
// Bits 0-5 should be 0
|
||||
assert(!(dpram_offset & 0b111111));
|
||||
|
||||
// Fill in endpoint control register with buffer offset
|
||||
uint32_t ep_reg = EP_CTRL_ENABLE_BITS
|
||||
| EP_CTRL_INTERRUPT_PER_BUFFER
|
||||
| (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB)
|
||||
| dpram_offset;
|
||||
ep_reg |= bmInterval ? (bmInterval - 1) << EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB : 0;
|
||||
*ep->endpoint_control = ep_reg;
|
||||
pico_trace("endpoint control (0x%p) <- 0x%x\n", ep->endpoint_control, ep_reg);
|
||||
ep->configured = true;
|
||||
|
||||
if (bmInterval)
|
||||
{
|
||||
// This is an interrupt endpoint
|
||||
// so need to set up interrupt endpoint address control register with:
|
||||
// device address
|
||||
// endpoint number / direction
|
||||
// preamble
|
||||
uint32_t reg = dev_addr | (ep->num << USB_ADDR_ENDP1_ENDPOINT_LSB);
|
||||
// Assert the interrupt endpoint is IN_TO_HOST
|
||||
assert(ep->in);
|
||||
|
||||
if (need_pre(dev_addr))
|
||||
{
|
||||
reg |= USB_ADDR_ENDP1_INTEP_PREAMBLE_BITS;
|
||||
}
|
||||
usb_hw->int_ep_addr_ctrl[ep->interrupt_num] = reg;
|
||||
|
||||
// Finally, enable interrupt that endpoint
|
||||
usb_hw_set->int_ep_ctrl = 1 << (ep->interrupt_num + 1);
|
||||
|
||||
// If it's an interrupt endpoint we need to set up the buffer control
|
||||
// register
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
static void hw_endpoint_init(uint8_t dev_addr, const tusb_desc_endpoint_t *ep_desc)
|
||||
{
|
||||
// Allocated differently based on if it's an interrupt endpoint or not
|
||||
struct hw_endpoint *ep = _hw_endpoint_allocate(ep_desc->bmAttributes.xfer);
|
||||
_hw_endpoint_init(ep,
|
||||
dev_addr,
|
||||
ep_desc->bEndpointAddress,
|
||||
ep_desc->wMaxPacketSize.size,
|
||||
ep_desc->bmAttributes.xfer,
|
||||
ep_desc->bInterval);
|
||||
// Map this struct to ep@device address
|
||||
set_dev_ep(dev_addr, ep_desc->bEndpointAddress, ep);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// HCD API
|
||||
//--------------------------------------------------------------------+
|
||||
bool hcd_init(void)
|
||||
{
|
||||
pico_trace("hcd_init\n");
|
||||
|
||||
// Reset any previous state
|
||||
rp2040_usb_init();
|
||||
|
||||
irq_set_exclusive_handler(USBCTRL_IRQ, hcd_rp2040_irq);
|
||||
|
||||
// clear epx and interrupt eps
|
||||
memset(&eps, 0, sizeof(eps));
|
||||
|
||||
// Enable in host mode with SOF / Keep alive on
|
||||
usb_hw->main_ctrl = USB_MAIN_CTRL_CONTROLLER_EN_BITS | USB_MAIN_CTRL_HOST_NDEVICE_BITS;
|
||||
usb_hw->sie_ctrl = sie_ctrl_base;
|
||||
usb_hw->inte = USB_INTE_BUFF_STATUS_BITS |
|
||||
USB_INTE_HOST_CONN_DIS_BITS |
|
||||
USB_INTE_HOST_RESUME_BITS |
|
||||
USB_INTE_STALL_BITS |
|
||||
USB_INTE_TRANS_COMPLETE_BITS |
|
||||
USB_INTE_ERROR_RX_TIMEOUT_BITS |
|
||||
USB_INTE_ERROR_DATA_SEQ_BITS ;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void hcd_port_reset(uint8_t rhport)
|
||||
{
|
||||
pico_trace("hcd_port_reset\n");
|
||||
assert(rhport == 0);
|
||||
// TODO: Nothing to do here yet. Perhaps need to reset some state?
|
||||
}
|
||||
|
||||
bool hcd_port_connect_status(uint8_t rhport)
|
||||
{
|
||||
pico_trace("hcd_port_connect_status\n");
|
||||
assert(rhport == 0);
|
||||
return usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS;
|
||||
}
|
||||
|
||||
tusb_speed_t hcd_port_speed_get(uint8_t rhport)
|
||||
{
|
||||
pico_trace("hcd_port_speed_get\n");
|
||||
assert(rhport == 0);
|
||||
// TODO: Should enumval this register
|
||||
switch (dev_speed())
|
||||
{
|
||||
case 1:
|
||||
return TUSB_SPEED_LOW;
|
||||
case 2:
|
||||
return TUSB_SPEED_FULL;
|
||||
default:
|
||||
panic("Invalid speed\n");
|
||||
}
|
||||
}
|
||||
|
||||
// Close all opened endpoint belong to this device
|
||||
void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
pico_trace("hcd_device_close %d\n", dev_addr);
|
||||
}
|
||||
|
||||
void hcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
assert(rhport == 0);
|
||||
irq_set_enabled(USBCTRL_IRQ, true);
|
||||
}
|
||||
|
||||
void hcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
// todo we should check this is disabling from the correct core; note currently this is never called
|
||||
assert(rhport == 0);
|
||||
irq_set_enabled(USBCTRL_IRQ, false);
|
||||
}
|
||||
|
||||
bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
|
||||
{
|
||||
pico_info("hcd_edpt_xfer dev_addr %d, ep_addr 0x%x, len %d\n", dev_addr, ep_addr, buflen);
|
||||
|
||||
// Get appropriate ep. Either EPX or interrupt endpoint
|
||||
struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr);
|
||||
|
||||
if (ep_addr != ep->ep_addr)
|
||||
{
|
||||
// Direction has flipped so re init it but with same properties
|
||||
_hw_endpoint_init(ep, dev_addr, ep_addr, ep->wMaxPacketSize, ep->transfer_type, 0);
|
||||
}
|
||||
|
||||
// True indicates this is the start of the transfer
|
||||
_hw_endpoint_xfer(ep, buffer, buflen, true);
|
||||
|
||||
// If a normal transfer (non-interrupt) then initiate using
|
||||
// sie ctrl registers. Otherwise interrupt ep registers should
|
||||
// already be configured
|
||||
if (ep == &epx) {
|
||||
// That has set up buffer control, endpoint control etc
|
||||
// for host we have to initiate the transfer
|
||||
usb_hw->dev_addr_ctrl = dev_addr | ep->num << USB_ADDR_ENDP_ENDPOINT_LSB;
|
||||
uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | sie_ctrl_base;
|
||||
flags |= ep->rx ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS;
|
||||
// Set pre if we are a low speed device on full speed hub
|
||||
flags |= need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0;
|
||||
usb_hw->sie_ctrl = flags;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
|
||||
{
|
||||
pico_info("hcd_setup_send dev_addr %d\n", dev_addr);
|
||||
|
||||
// Copy data into setup packet buffer
|
||||
memcpy((void*)&usbh_dpram->setup_packet[0], setup_packet, 8);
|
||||
|
||||
// Configure EP0 struct with setup info for the trans complete
|
||||
struct hw_endpoint *ep = _hw_endpoint_allocate(0);
|
||||
// EP0 out
|
||||
_hw_endpoint_init(ep, dev_addr, 0x00, ep->wMaxPacketSize, 0, 0);
|
||||
assert(ep->configured);
|
||||
assert(ep->num == 0 && !ep->in);
|
||||
ep->total_len = 8;
|
||||
ep->transfer_size = 8;
|
||||
ep->active = true;
|
||||
ep->sent_setup = true;
|
||||
|
||||
// Set device address
|
||||
usb_hw->dev_addr_ctrl = dev_addr;
|
||||
// Set pre if we are a low speed device on full speed hub
|
||||
uint32_t flags = sie_ctrl_base | USB_SIE_CTRL_SEND_SETUP_BITS | USB_SIE_CTRL_START_TRANS_BITS;
|
||||
flags |= need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0;
|
||||
usb_hw->sie_ctrl = flags;
|
||||
return true;
|
||||
}
|
||||
|
||||
uint32_t hcd_uframe_number(uint8_t rhport)
|
||||
{
|
||||
// Microframe number is (125us) but we are max full speed so return miliseconds * 8
|
||||
return usb_hw->sof_rd * 8;
|
||||
}
|
||||
|
||||
bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
|
||||
{
|
||||
pico_trace("hcd_edpt_open dev_addr %d, ep_addr %d\n", dev_addr, ep_desc->bEndpointAddress);
|
||||
hw_endpoint_init(dev_addr, ep_desc);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr)
|
||||
{
|
||||
// EPX is shared, so multiple device addresses and endpoint addresses share that
|
||||
// so if any transfer is active on epx, we are busy. Interrupt endpoints have their own
|
||||
// EPX so ep->active will only be busy if there is a pending transfer on that interrupt endpoint
|
||||
// on that device
|
||||
pico_trace("hcd_edpt_busy dev addr %d ep_addr 0x%x\n", dev_addr, ep_addr);
|
||||
struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr);
|
||||
assert(ep);
|
||||
bool busy = ep->active;
|
||||
pico_trace("busy == %d\n", busy);
|
||||
return busy;
|
||||
}
|
||||
|
||||
bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr)
|
||||
{
|
||||
panic("hcd_pipe_stalled");
|
||||
}
|
||||
|
||||
bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
|
||||
{
|
||||
panic("hcd_clear_stall");
|
||||
return true;
|
||||
}
|
||||
|
||||
bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
|
||||
{
|
||||
pico_trace("hcd_pipe_xfer dev_addr %d, ep_addr 0x%x, total_bytes %d, int_on_complete %d\n",
|
||||
dev_addr, ep_addr, total_bytes, int_on_complete);
|
||||
|
||||
// Same logic as hcd_edpt_xfer as far as I am concerned
|
||||
hcd_edpt_xfer(0, dev_addr, ep_addr, buffer, total_bytes);
|
||||
|
||||
return true;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,279 @@
|
|||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
#include "rp2040_usb.h"
|
||||
#include "hardware/clocks.h"
|
||||
#include "tusb_option.h"
|
||||
|
||||
// Direction strings for debug
|
||||
const char *ep_dir_string[] = {
|
||||
"out",
|
||||
"in",
|
||||
};
|
||||
|
||||
static inline void _hw_endpoint_lock_update(struct hw_endpoint *ep, int delta) {
|
||||
// todo add critsec as necessary to prevent issues between worker and IRQ...
|
||||
// note that this is perhaps as simple as disabling IRQs because it would make
|
||||
// sense to have worker and IRQ on same core, however I think using critsec is about equivalent.
|
||||
}
|
||||
|
||||
static inline void _hw_endpoint_update_last_buf(struct hw_endpoint *ep)
|
||||
{
|
||||
ep->last_buf = ep->len + ep->transfer_size == ep->total_len;
|
||||
}
|
||||
|
||||
void rp2040_usb_init(void)
|
||||
{
|
||||
// Reset usb controller
|
||||
reset_block(RESETS_RESET_USBCTRL_BITS);
|
||||
unreset_block_wait(RESETS_RESET_USBCTRL_BITS);
|
||||
|
||||
// Clear any previous state just in case
|
||||
memset(usb_hw, 0, sizeof(*usb_hw));
|
||||
memset(usb_dpram, 0, sizeof(*usb_dpram));
|
||||
|
||||
// Mux to phy
|
||||
usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
|
||||
usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS;
|
||||
}
|
||||
|
||||
void hw_endpoint_reset_transfer(struct hw_endpoint *ep)
|
||||
{
|
||||
ep->stalled = false;
|
||||
ep->active = false;
|
||||
ep->sent_setup = false;
|
||||
ep->total_len = 0;
|
||||
ep->len = 0;
|
||||
ep->transfer_size = 0;
|
||||
ep->user_buf = 0;
|
||||
}
|
||||
|
||||
void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) {
|
||||
uint32_t value = 0;
|
||||
if (and_mask) {
|
||||
value = *ep->buffer_control & and_mask;
|
||||
}
|
||||
if (or_mask) {
|
||||
value |= or_mask;
|
||||
if (or_mask & USB_BUF_CTRL_AVAIL) {
|
||||
if (*ep->buffer_control & USB_BUF_CTRL_AVAIL) {
|
||||
panic("ep %d %s was already available", ep->num, ep_dir_string[ep->in]);
|
||||
}
|
||||
*ep->buffer_control = value & ~USB_BUF_CTRL_AVAIL;
|
||||
// 12 cycle delay.. (should be good for 48*12Mhz = 576Mhz)
|
||||
// Don't need delay in host mode as host is in charge
|
||||
#ifndef RP2040_USB_HOST_MODE
|
||||
__asm volatile (
|
||||
"b 1f\n"
|
||||
"1: b 1f\n"
|
||||
"1: b 1f\n"
|
||||
"1: b 1f\n"
|
||||
"1: b 1f\n"
|
||||
"1: b 1f\n"
|
||||
"1:\n"
|
||||
: : : "memory");
|
||||
#endif
|
||||
}
|
||||
}
|
||||
*ep->buffer_control = value;
|
||||
}
|
||||
|
||||
void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep)
|
||||
{
|
||||
// Prepare buffer control register value
|
||||
uint32_t val = ep->transfer_size | USB_BUF_CTRL_AVAIL;
|
||||
|
||||
if (!ep->rx)
|
||||
{
|
||||
// Copy data from user buffer to hw buffer
|
||||
memcpy(ep->hw_data_buf, &ep->user_buf[ep->len], ep->transfer_size);
|
||||
// Mark as full
|
||||
val |= USB_BUF_CTRL_FULL;
|
||||
}
|
||||
|
||||
// PID
|
||||
val |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
|
||||
ep->next_pid ^= 1u;
|
||||
|
||||
// Is this the last buffer? Only really matters for host mode. Will trigger
|
||||
// the trans complete irq but also stop it polling. We only really care about
|
||||
// trans complete for setup packets being sent
|
||||
if (ep->last_buf)
|
||||
{
|
||||
pico_trace("Last buf (%d bytes left)\n", ep->transfer_size);
|
||||
val |= USB_BUF_CTRL_LAST;
|
||||
}
|
||||
|
||||
// Finally, write to buffer_control which will trigger the transfer
|
||||
// the next time the controller polls this dpram address
|
||||
_hw_endpoint_buffer_control_set_value32(ep, val);
|
||||
pico_trace("buffer control (0x%p) <- 0x%x\n", ep->buffer_control, val);
|
||||
}
|
||||
|
||||
|
||||
void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len)
|
||||
{
|
||||
_hw_endpoint_lock_update(ep, 1);
|
||||
pico_trace("Start transfer of total len %d on ep %d %s\n", total_len, ep->num, ep_dir_string[ep->in]);
|
||||
if (ep->active)
|
||||
{
|
||||
// TODO: Is this acceptable for interrupt packets?
|
||||
pico_warn("WARN: starting new transfer on already active ep %d %s\n", ep->num, ep_dir_string[ep->in]);
|
||||
|
||||
hw_endpoint_reset_transfer(ep);
|
||||
}
|
||||
|
||||
// Fill in info now that we're kicking off the hw
|
||||
ep->total_len = total_len;
|
||||
ep->len = 0;
|
||||
// FIXME: What if low speed
|
||||
ep->transfer_size = total_len > 64 ? 64 : total_len;
|
||||
ep->active = true;
|
||||
ep->user_buf = buffer;
|
||||
// Recalculate if this is the last buffer
|
||||
_hw_endpoint_update_last_buf(ep);
|
||||
ep->buf_sel = 0;
|
||||
|
||||
_hw_endpoint_start_next_buffer(ep);
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
}
|
||||
|
||||
void _hw_endpoint_xfer_sync(struct hw_endpoint *ep)
|
||||
{
|
||||
// Update hw endpoint struct with info from hardware
|
||||
// after a buff status interrupt
|
||||
|
||||
// Get the buffer state and amount of bytes we have
|
||||
// transferred
|
||||
uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep);
|
||||
uint transferred_bytes = buf_ctrl & USB_BUF_CTRL_LEN_MASK;
|
||||
|
||||
#ifdef RP2040_USB_HOST_MODE
|
||||
// tag::host_buf_sel_fix[]
|
||||
if (ep->buf_sel == 1)
|
||||
{
|
||||
// Host can erroneously write status to top half of buf_ctrl register
|
||||
buf_ctrl = buf_ctrl >> 16;
|
||||
}
|
||||
// Flip buf sel for host
|
||||
ep->buf_sel ^= 1u;
|
||||
// end::host_buf_sel_fix[]
|
||||
#endif
|
||||
|
||||
// We are continuing a transfer here. If we are TX, we have successfullly
|
||||
// sent some data can increase the length we have sent
|
||||
if (!ep->rx)
|
||||
{
|
||||
assert(!(buf_ctrl & USB_BUF_CTRL_FULL));
|
||||
pico_trace("tx %d bytes (buf_ctrl 0x%08x)\n", transferred_bytes, buf_ctrl);
|
||||
ep->len += transferred_bytes;
|
||||
}
|
||||
else
|
||||
{
|
||||
// If we are OUT we have recieved some data, so can increase the length
|
||||
// we have recieved AFTER we have copied it to the user buffer at the appropriate
|
||||
// offset
|
||||
pico_trace("rx %d bytes (buf_ctrl 0x%08x)\n", transferred_bytes, buf_ctrl);
|
||||
assert(buf_ctrl & USB_BUF_CTRL_FULL);
|
||||
memcpy(&ep->user_buf[ep->len], ep->hw_data_buf, transferred_bytes);
|
||||
ep->len += transferred_bytes;
|
||||
}
|
||||
|
||||
// Sometimes the host will send less data than we expect...
|
||||
// If this is a short out transfer update the total length of the transfer
|
||||
// to be the current length
|
||||
if ((ep->rx) && (transferred_bytes < ep->transfer_size))
|
||||
{
|
||||
pico_trace("Short rx transfer\n");
|
||||
// Reduce total length as this is last packet
|
||||
ep->total_len = ep->len;
|
||||
}
|
||||
}
|
||||
|
||||
// Returns true if transfer is complete
|
||||
bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep)
|
||||
{
|
||||
_hw_endpoint_lock_update(ep, 1);
|
||||
// Part way through a transfer
|
||||
if (!ep->active)
|
||||
{
|
||||
panic("Can't continue xfer on inactive ep %d %s", ep->num, ep_dir_string);
|
||||
}
|
||||
|
||||
// Update EP struct from hardware state
|
||||
_hw_endpoint_xfer_sync(ep);
|
||||
|
||||
// Now we have synced our state with the hardware. Is there more data to transfer?
|
||||
uint remaining_bytes = ep->total_len - ep->len;
|
||||
ep->transfer_size = remaining_bytes > 64 ? 64 : remaining_bytes;
|
||||
_hw_endpoint_update_last_buf(ep);
|
||||
|
||||
// Can happen because of programmer error so check for it
|
||||
if (ep->len > ep->total_len)
|
||||
{
|
||||
panic("Transferred more data than expected");
|
||||
}
|
||||
|
||||
// If we are done then notify tinyusb
|
||||
if (ep->len == ep->total_len)
|
||||
{
|
||||
pico_trace("Completed transfer of %d bytes on ep %d %s\n",
|
||||
ep->len, ep->num, ep_dir_string[ep->in]);
|
||||
// Notify caller we are done so it can notify the tinyusb
|
||||
// stack
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
return true;
|
||||
}
|
||||
else
|
||||
{
|
||||
_hw_endpoint_start_next_buffer(ep);
|
||||
}
|
||||
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
// More work to do
|
||||
return false;
|
||||
}
|
||||
|
||||
void _hw_endpoint_xfer(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len, bool start)
|
||||
{
|
||||
// Trace
|
||||
pico_trace("hw_endpoint_xfer ep %d %s", ep->num, ep_dir_string[ep->in]);
|
||||
pico_trace(" total_len %d, start=%d\n", total_len, start);
|
||||
|
||||
assert(ep->configured);
|
||||
|
||||
|
||||
if (start)
|
||||
{
|
||||
_hw_endpoint_xfer_start(ep, buffer, total_len);
|
||||
}
|
||||
else
|
||||
{
|
||||
_hw_endpoint_xfer_continue(ep);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,124 @@
|
|||
#ifndef RP2040_COMMON_H_
|
||||
#define RP2040_COMMON_H_
|
||||
|
||||
#if defined(RP2040_USB_HOST_MODE) && defined(RP2040_USB_DEVICE_MODE)
|
||||
#error TinyUSB device and host mode not supported at the same time
|
||||
#endif
|
||||
|
||||
#include "common/tusb_common.h"
|
||||
|
||||
#include "pico.h"
|
||||
#include "hardware/structs/usb.h"
|
||||
#include "hardware/irq.h"
|
||||
#include "hardware/resets.h"
|
||||
|
||||
#if defined(PICO_RP2040_USB_DEVICE_ENUMERATION_FIX) && !defined(TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX)
|
||||
#define TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX PICO_RP2040_USB_DEVICE_ENUMERATION_FIX
|
||||
#endif
|
||||
|
||||
// For memset
|
||||
#include <string.h>
|
||||
|
||||
#if false && !defined(NDEBUG)
|
||||
#define pico_trace(format,args...) printf(format, ## args)
|
||||
#else
|
||||
#define pico_trace(format,...) ((void)0)
|
||||
#endif
|
||||
|
||||
#if false && !defined(NDEBUG)
|
||||
#define pico_info(format,args...) printf(format, ## args)
|
||||
#else
|
||||
#define pico_info(format,...) ((void)0)
|
||||
#endif
|
||||
|
||||
#if false && !defined(NDEBUG)
|
||||
#define pico_warn(format,args...) printf(format, ## args)
|
||||
#else
|
||||
#define pico_warn(format,...) ((void)0)
|
||||
#endif
|
||||
|
||||
// Hardware information per endpoint
|
||||
struct hw_endpoint
|
||||
{
|
||||
// Is this a valid struct
|
||||
bool configured;
|
||||
// EP direction
|
||||
bool in;
|
||||
// EP num (not including direction)
|
||||
uint8_t num;
|
||||
|
||||
// Transfer direction (i.e. IN is rx for host but tx for device)
|
||||
// allows us to common up transfer functions
|
||||
bool rx;
|
||||
|
||||
uint8_t ep_addr;
|
||||
uint8_t next_pid;
|
||||
|
||||
// Endpoint control register
|
||||
io_rw_32 *endpoint_control;
|
||||
// Buffer control register
|
||||
io_rw_32 *buffer_control;
|
||||
|
||||
// Buffer pointer in usb dpram
|
||||
uint8_t *hw_data_buf;
|
||||
|
||||
// Have we been stalled
|
||||
bool stalled;
|
||||
|
||||
// Current transfer information
|
||||
bool active;
|
||||
uint total_len;
|
||||
uint len;
|
||||
// Amount of data with the hardware
|
||||
uint transfer_size;
|
||||
// Only needed for host mode
|
||||
bool last_buf;
|
||||
// HOST BUG. Host will incorrect write status to top half of buffer
|
||||
// control register when doing transfers > 1 packet
|
||||
uint8_t buf_sel;
|
||||
// User buffer in main memory
|
||||
uint8_t *user_buf;
|
||||
|
||||
// Data needed from EP descriptor
|
||||
uint wMaxPacketSize;
|
||||
// Interrupt, bulk, etc
|
||||
uint8_t transfer_type;
|
||||
|
||||
// Only needed for host
|
||||
uint8_t dev_addr;
|
||||
bool sent_setup;
|
||||
// If interrupt endpoint
|
||||
uint8_t interrupt_num;
|
||||
};
|
||||
|
||||
void rp2040_usb_init(void);
|
||||
|
||||
void hw_endpoint_reset_transfer(struct hw_endpoint *ep);
|
||||
void _hw_endpoint_xfer(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len, bool start);
|
||||
void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep);
|
||||
void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len);
|
||||
void _hw_endpoint_xfer_sync(struct hw_endpoint *ep);
|
||||
bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep);
|
||||
void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask);
|
||||
static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) {
|
||||
return *ep->buffer_control;
|
||||
}
|
||||
static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) {
|
||||
return _hw_endpoint_buffer_control_update32(ep, 0, value);
|
||||
}
|
||||
static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) {
|
||||
return _hw_endpoint_buffer_control_update32(ep, ~value, value);
|
||||
}
|
||||
static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) {
|
||||
return _hw_endpoint_buffer_control_update32(ep, ~value, 0);
|
||||
}
|
||||
|
||||
static inline uintptr_t hw_data_offset(uint8_t *buf)
|
||||
{
|
||||
// Remove usb base from buffer pointer
|
||||
return (uintptr_t)buf ^ (uintptr_t)usb_dpram;
|
||||
}
|
||||
|
||||
extern const char *ep_dir_string[];
|
||||
|
||||
#endif
|
||||
|
|
@ -97,6 +97,9 @@
|
|||
// Dialog
|
||||
#define OPT_MCU_DA1469X 1000 ///< Dialog Semiconductor DA1469x
|
||||
|
||||
// Raspberry Pi
|
||||
#define OPT_MCU_RP2040 1100 ///< Raspberry Pi RP2040
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \defgroup group_supported_os Supported RTOS
|
||||
|
|
@ -106,6 +109,7 @@
|
|||
#define OPT_OS_FREERTOS 2 ///< FreeRTOS
|
||||
#define OPT_OS_MYNEWT 3 ///< Mynewt OS
|
||||
#define OPT_OS_CUSTOM 4 ///< Custom OS is implemented by application
|
||||
#define OPT_OS_PICO 5 ///< Raspberry Pi Pico SDK
|
||||
/** @} */
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue