added host set_config driver
to resolve control conflict with SET_CONFIGURE for class driver - open will be called to open endpoint only - set_config called later to initialized class driver
This commit is contained in:
hathach
parent
3623f578a4
commit
e029d6d726
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@ -173,6 +173,56 @@ bool hidh_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t c
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tusb_desc_endpoint_t const * p_endpoint_desc = (tusb_desc_endpoint_t const *) p_desc;
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TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint_desc->bDescriptorType, TUSB_ERROR_INVALID_PARA);
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if ( HID_SUBCLASS_BOOT == p_interface_desc->bInterfaceSubClass )
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{
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#if CFG_TUH_HID_KEYBOARD
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if ( HID_PROTOCOL_KEYBOARD == p_interface_desc->bInterfaceProtocol)
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{
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TU_ASSERT( hidh_interface_open(rhport, dev_addr, p_interface_desc->bInterfaceNumber, p_endpoint_desc, &keyboardh_data[dev_addr-1]) );
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TU_LOG2_HEX(keyboardh_data[dev_addr-1].ep_in);
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} else
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#endif
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#if CFG_TUH_HID_MOUSE
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if ( HID_PROTOCOL_MOUSE == p_interface_desc->bInterfaceProtocol)
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{
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TU_ASSERT ( hidh_interface_open(rhport, dev_addr, p_interface_desc->bInterfaceNumber, p_endpoint_desc, &mouseh_data[dev_addr-1]) );
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TU_LOG2_HEX(mouseh_data[dev_addr-1].ep_in);
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} else
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#endif
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{
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// Not supported protocol
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return false;
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}
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}else
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{
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// Not supported subclass
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return false;
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}
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*p_length = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + sizeof(tusb_desc_endpoint_t);
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return true;
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}
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bool hidh_set_config(uint8_t dev_addr, uint8_t itf_num)
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{
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#if 0
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//------------- Get Report Descriptor TODO HID parser -------------//
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if ( p_desc_hid->bNumDescriptors )
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{
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STASK_INVOKE(
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usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_INTERFACE),
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TUSB_REQ_GET_DESCRIPTOR, (p_desc_hid->bReportType << 8), 0,
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p_desc_hid->wReportLength, report_descriptor ),
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error
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);
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(void) error; // if error in getting report descriptor --> treating like there is none
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}
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#endif
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#if 0
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// SET IDLE = 0 request
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// Device can stall if not support this request
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tusb_control_request_t const request =
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@ -191,52 +241,23 @@ bool hidh_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t c
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// stall is a valid response for SET_IDLE, therefore we could ignore result of this request
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tuh_control_xfer(dev_addr, &request, NULL, NULL);
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#endif
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#if 0
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//------------- Get Report Descriptor TODO HID parser -------------//
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if ( p_desc_hid->bNumDescriptors )
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usbh_driver_set_config_complete(dev_addr, itf_num);
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#if CFG_TUH_HID_KEYBOARD
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if ( keyboardh_data[dev_addr-1].itf_num == itf_num)
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{
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STASK_INVOKE(
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usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_INTERFACE),
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TUSB_REQ_GET_DESCRIPTOR, (p_desc_hid->bReportType << 8), 0,
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p_desc_hid->wReportLength, report_descriptor ),
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error
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);
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(void) error; // if error in getting report descriptor --> treating like there is none
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tuh_hid_keyboard_mounted_cb(dev_addr);
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}
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#endif
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if ( HID_SUBCLASS_BOOT == p_interface_desc->bInterfaceSubClass )
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#if CFG_TUH_HID_MOUSE
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if ( mouseh_data[dev_addr-1].ep_in == itf_num )
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{
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#if CFG_TUH_HID_KEYBOARD
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if ( HID_PROTOCOL_KEYBOARD == p_interface_desc->bInterfaceProtocol)
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{
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TU_ASSERT( hidh_interface_open(rhport, dev_addr, p_interface_desc->bInterfaceNumber, p_endpoint_desc, &keyboardh_data[dev_addr-1]) );
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TU_LOG2_HEX(keyboardh_data[dev_addr-1].ep_in);
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tuh_hid_keyboard_mounted_cb(dev_addr);
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} else
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#endif
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#if CFG_TUH_HID_MOUSE
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if ( HID_PROTOCOL_MOUSE == p_interface_desc->bInterfaceProtocol)
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{
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TU_ASSERT ( hidh_interface_open(rhport, dev_addr, p_interface_desc->bInterfaceNumber, p_endpoint_desc, &mouseh_data[dev_addr-1]) );
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TU_LOG2_HEX(mouseh_data[dev_addr-1].ep_in);
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tuh_hid_mouse_mounted_cb(dev_addr);
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} else
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#endif
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{
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// Not supported protocol
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return false;
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}
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}else
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{
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// Not supported subclass
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return false;
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tuh_hid_mouse_mounted_cb(dev_addr);
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}
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*p_length = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + sizeof(tusb_desc_endpoint_t);
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#endif
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return true;
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}
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@ -197,6 +197,7 @@ void tuh_hid_generic_isr(uint8_t dev_addr, xfer_result_t event);
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//--------------------------------------------------------------------+
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void hidh_init(void);
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bool hidh_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length);
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bool hidh_set_config(uint8_t dev_addr, uint8_t itf_num);
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bool hidh_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
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void hidh_close(uint8_t dev_addr);
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@ -334,9 +334,9 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
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// MSC Enumeration
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//--------------------------------------------------------------------+
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static bool open_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result);
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static bool open_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
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static bool open_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
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static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result);
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static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
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static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
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bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length)
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{
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@ -367,6 +367,14 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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p_msc->itf_num = itf_desc->bInterfaceNumber;
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(*p_length) += sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t);
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return true;
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}
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bool msch_set_config(uint8_t dev_addr, uint8_t itf_num)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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TU_ASSERT(p_msc->itf_num == itf_num);
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//------------- Get Max Lun -------------//
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TU_LOG2("MSC Get Max Lun\r\n");
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tusb_control_request_t request =
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@ -379,15 +387,15 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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},
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.bRequest = MSC_REQ_GET_MAX_LUN,
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.wValue = 0,
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.wIndex = p_msc->itf_num,
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.wIndex = itf_num,
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.wLength = 1
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};
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TU_ASSERT(tuh_control_xfer(dev_addr, &request, &p_msc->max_lun, open_get_maxlun_complete));
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TU_ASSERT(tuh_control_xfer(dev_addr, &request, &p_msc->max_lun, config_get_maxlun_complete));
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return true;
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}
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static bool open_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result)
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static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result)
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{
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(void) request;
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@ -399,17 +407,19 @@ static bool open_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t c
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// TODO multiple LUN support
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TU_LOG2("SCSI Test Unit Ready\r\n");
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tuh_msc_test_unit_ready(dev_addr, 0, open_test_unit_ready_complete);
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tuh_msc_test_unit_ready(dev_addr, 0, config_test_unit_ready_complete);
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return true;
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}
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static bool open_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
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static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
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{
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if (csw->status == 0)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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usbh_driver_set_config_complete(dev_addr, p_msc->itf_num);
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// Unit is ready, Enumeration is complete
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p_msc->mounted = true;
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tuh_msc_mounted_cb(dev_addr);
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@ -418,16 +428,16 @@ static bool open_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw
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// Note: During enumeration, some device fails Test Unit Ready and require a few retries
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// with Request Sense to start working !!
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// TODO limit number of retries
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TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, msch_buffer, open_request_sense_complete));
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TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, msch_buffer, config_request_sense_complete));
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}
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return true;
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}
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static bool open_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
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static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
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{
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TU_ASSERT(csw->status == 0);
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TU_ASSERT(tuh_msc_test_unit_ready(dev_addr, cbw->lun, open_test_unit_ready_complete));
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TU_ASSERT(tuh_msc_test_unit_ready(dev_addr, cbw->lun, config_test_unit_ready_complete));
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return true;
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}
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@ -125,6 +125,7 @@ void tuh_msc_unmounted_cb(uint8_t dev_addr);
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void msch_init(void);
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bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length);
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bool msch_set_config(uint8_t dev_addr, uint8_t itf_num);
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bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
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void msch_close(uint8_t dev_addr);
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@ -67,6 +67,7 @@ static usbh_class_driver_t const usbh_class_drivers[] =
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.class_code = TUSB_CLASS_MSC,
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.init = msch_init,
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.open = msch_open,
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.set_config = msch_set_config,
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.xfer_cb = msch_xfer_cb,
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.close = msch_close
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},
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@ -78,6 +79,7 @@ static usbh_class_driver_t const usbh_class_drivers[] =
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.class_code = TUSB_CLASS_HID,
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.init = hidh_init,
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.open = hidh_open_subtask,
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.set_config = hidh_set_config,
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.xfer_cb = hidh_xfer_cb,
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.close = hidh_close
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},
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@ -308,6 +310,7 @@ bool usbh_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
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usbh_device_t* dev = &_usbh_devices[dev_addr];
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// new endpoints belongs to latest interface (last valid value)
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// TODO FIXME not true with ISO
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uint8_t drvid = 0xff;
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for(uint8_t i=0; i < sizeof(dev->itf2drv); i++)
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{
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@ -525,6 +528,31 @@ static uint8_t get_new_address(void)
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return CFG_TUSB_HOST_DEVICE_MAX+1;
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}
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void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
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{
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usbh_device_t* dev = &_usbh_devices[dev_addr];
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for(itf_num++; itf_num < sizeof(dev->itf2drv); itf_num++)
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{
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// continue with next valid interface
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uint8_t const drv_id = dev->itf2drv[itf_num];
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if (drv_id != 0xff)
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{
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usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id];
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TU_LOG2("%s set config itf = %u\r\n", driver->name, itf_num);
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driver->set_config(dev_addr, itf_num);
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break;
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}
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}
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// all interface are configured
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if (itf_num == sizeof(dev->itf2drv))
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{
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// Invoke callback if available
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if (tuh_mount_cb) tuh_mount_cb(dev_addr);
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}
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}
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//--------------------------------------------------------------------+
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// Enumeration Process
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// is a lengthy process with a seires of control transfer to configure
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@ -783,6 +811,7 @@ static bool enum_get_9byte_config_desc_complete(uint8_t dev_addr, tusb_control_r
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.wValue = (TUSB_DESC_CONFIGURATION << 8) | (CONFIG_NUM - 1),
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.wIndex = 0,
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.wLength = total_len
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};
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TU_ASSERT( tuh_control_xfer(dev_addr, &new_request, _usbh_ctrl_buf, enum_get_config_desc_complete) );
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@ -795,6 +824,10 @@ static bool enum_get_config_desc_complete(uint8_t dev_addr, tusb_control_request
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(void) request;
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TU_ASSERT(XFER_RESULT_SUCCESS == result);
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// Parse configuration & set up drivers
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// Driver open aren't allowed to make any usb transfer yet
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parse_configuration_descriptor(dev_addr, (tusb_desc_configuration_t*) _usbh_ctrl_buf);
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TU_LOG2("Set Configuration Descriptor\r\n");
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tusb_control_request_t const new_request =
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{
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@ -825,12 +858,10 @@ static bool enum_set_config_complete(uint8_t dev_addr, tusb_control_request_t co
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dev->configured = 1;
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dev->state = TUSB_DEVICE_STATE_CONFIGURED;
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// Parse configuration & set up drivers
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// TODO driver open still use usbh_control_xfer
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parse_configuration_descriptor(dev_addr, (tusb_desc_configuration_t*) _usbh_ctrl_buf);
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// Invoke callback if available
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if (tuh_mount_cb) tuh_mount_cb(dev_addr);
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// Start the Set Configuration process for interfaces (itf = 0xff)
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// Since driver can perform control transfer within its set_config, this is done asynchronously.
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// The process continue with next interface when class driver complete its sequence with usbh_driver_set_config_complete()
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usbh_driver_set_config_complete(dev_addr, 0xff);
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return true;
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}
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@ -883,9 +914,6 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura
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TU_LOG2("%s open\r\n", driver->name);
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uint16_t itf_len = 0;
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// TODO class driver can perform control transfer when opening which is
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// non-blocking --> need a way to coordinate composite device
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TU_ASSERT( driver->open(dev->rhport, dev_addr, desc_itf, &itf_len) );
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TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) );
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p_desc += itf_len;
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@ -58,10 +58,11 @@ typedef struct {
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uint8_t class_code;
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void (* const init) (void);
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bool (* const open)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const * itf_desc, uint16_t* outlen);
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bool (* const xfer_cb) (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
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void (* const close) (uint8_t);
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void (* const init )(void);
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bool (* const open )(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const * itf_desc, uint16_t* outlen);
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bool (* const set_config )(uint8_t dev_addr, uint8_t itf_num);
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bool (* const xfer_cb )(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
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void (* const close )(uint8_t dev_addr);
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} usbh_class_driver_t;
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typedef bool (*tuh_control_complete_cb_t)(uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result);
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@ -105,6 +106,7 @@ TU_ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr);
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//--------------------------------------------------------------------+
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// CLASS-USBH & INTERNAL API
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// TODO move to usbh_pvt.h
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//--------------------------------------------------------------------+
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bool usbh_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
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@ -116,6 +118,8 @@ bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr);
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bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data); // TODO remove later
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void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -47,6 +47,8 @@
|
|||
//--------------------------------------------------------------------+
|
||||
// USBH-HCD common data structure
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
// TODO move to usbh.c
|
||||
typedef struct {
|
||||
//------------- port -------------//
|
||||
uint8_t rhport;
|
||||
|
|
@ -95,7 +97,6 @@ typedef struct {
|
|||
// TODO merge ep2drv here, 4-bit should be sufficient
|
||||
}ep_status[CFG_TUH_EP_MAX][2];
|
||||
|
||||
|
||||
// Mutex for claiming endpoint, only needed when using with preempted RTOS
|
||||
#if CFG_TUSB_OS != OPT_OS_NONE
|
||||
osal_mutex_def_t mutexdef;
|
||||
|
|
|
|||
Loading…
Reference in New Issue