adding segger project for stm32f4
This commit is contained in:
hathach
parent
0ff7d609f0
commit
ddfc32f5ec
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@ -0,0 +1,6 @@
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<!DOCTYPE Board_Memory_Definition_File>
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<root name="STM32F407VG">
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<MemorySegment name="FLASH" start="0x08000000" size="0x00100000" access="ReadOnly" />
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<MemorySegment name="RAM" start="0x10000000" size="0x00010000" access="Read/Write" />
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<MemorySegment name="RAM2" start="0x20000000" size="0x00020000" access="Read/Write" />
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</root>
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,817 @@
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/*****************************************************************************
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* SEGGER Microcontroller GmbH & Co. KG *
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* Solutions for real time microcontroller applications *
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*****************************************************************************
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* *
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* (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
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* *
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* Internet: www.segger.com Support: support@segger.com *
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* *
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*****************************************************************************/
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/*****************************************************************************
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* Preprocessor Definitions *
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* ------------------------ *
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* VECTORS_IN_RAM *
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* *
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* If defined, an area of RAM will large enough to store the vector table *
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* will be reserved. *
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* *
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*****************************************************************************/
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.syntax unified
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.code 16
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.section .init, "ax"
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.align 0
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/*****************************************************************************
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* Default Exception Handlers *
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*****************************************************************************/
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.thumb_func
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.weak NMI_Handler
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NMI_Handler:
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b .
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.thumb_func
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.weak HardFault_Handler
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HardFault_Handler:
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b .
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.thumb_func
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.weak SVC_Handler
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SVC_Handler:
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b .
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.thumb_func
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.weak PendSV_Handler
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PendSV_Handler:
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b .
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.thumb_func
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.weak SysTick_Handler
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SysTick_Handler:
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b .
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.thumb_func
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Dummy_Handler:
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b .
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#if defined(__OPTIMIZATION_SMALL)
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.weak WWDG_IRQHandler
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.thumb_set WWDG_IRQHandler,Dummy_Handler
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.weak PVD_IRQHandler
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.thumb_set PVD_IRQHandler,Dummy_Handler
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.weak TAMP_STAMP_IRQHandler
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.thumb_set TAMP_STAMP_IRQHandler,Dummy_Handler
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.weak RTC_WKUP_IRQHandler
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.thumb_set RTC_WKUP_IRQHandler,Dummy_Handler
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.weak RCC_IRQHandler
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.thumb_set RCC_IRQHandler,Dummy_Handler
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.weak EXTI0_IRQHandler
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.thumb_set EXTI0_IRQHandler,Dummy_Handler
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.weak EXTI1_IRQHandler
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.thumb_set EXTI1_IRQHandler,Dummy_Handler
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.weak EXTI2_IRQHandler
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.thumb_set EXTI2_IRQHandler,Dummy_Handler
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.weak EXTI3_IRQHandler
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.thumb_set EXTI3_IRQHandler,Dummy_Handler
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.weak EXTI4_IRQHandler
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.thumb_set EXTI4_IRQHandler,Dummy_Handler
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.weak DMA1_Stream0_IRQHandler
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.thumb_set DMA1_Stream0_IRQHandler,Dummy_Handler
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.weak DMA1_Stream1_IRQHandler
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.thumb_set DMA1_Stream1_IRQHandler,Dummy_Handler
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.weak DMA1_Stream2_IRQHandler
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.thumb_set DMA1_Stream2_IRQHandler,Dummy_Handler
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.weak DMA1_Stream3_IRQHandler
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.thumb_set DMA1_Stream3_IRQHandler,Dummy_Handler
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.weak DMA1_Stream4_IRQHandler
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.thumb_set DMA1_Stream4_IRQHandler,Dummy_Handler
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.weak DMA1_Stream5_IRQHandler
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.thumb_set DMA1_Stream5_IRQHandler,Dummy_Handler
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.weak DMA1_Stream6_IRQHandler
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.thumb_set DMA1_Stream6_IRQHandler,Dummy_Handler
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.weak ADC_IRQHandler
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.thumb_set ADC_IRQHandler,Dummy_Handler
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.weak CAN1_TX_IRQHandler
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.thumb_set CAN1_TX_IRQHandler,Dummy_Handler
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.weak CAN1_RX0_IRQHandler
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.thumb_set CAN1_RX0_IRQHandler,Dummy_Handler
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.weak CAN1_RX1_IRQHandler
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.thumb_set CAN1_RX1_IRQHandler,Dummy_Handler
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.weak CAN1_SCE_IRQHandler
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.thumb_set CAN1_SCE_IRQHandler,Dummy_Handler
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.weak EXTI9_5_IRQHandler
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.thumb_set EXTI9_5_IRQHandler,Dummy_Handler
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.weak TIM1_BRK_TIM9_IRQHandler
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.thumb_set TIM1_BRK_TIM9_IRQHandler,Dummy_Handler
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.weak TIM1_UP_TIM10_IRQHandler
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.thumb_set TIM1_UP_TIM10_IRQHandler,Dummy_Handler
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.weak TIM1_TRG_COM_TIM11_IRQHandler
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.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Dummy_Handler
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.weak TIM1_CC_IRQHandler
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.thumb_set TIM1_CC_IRQHandler,Dummy_Handler
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.weak TIM2_IRQHandler
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.thumb_set TIM2_IRQHandler,Dummy_Handler
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.weak TIM3_IRQHandler
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.thumb_set TIM3_IRQHandler,Dummy_Handler
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.weak TIM4_IRQHandler
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.thumb_set TIM4_IRQHandler,Dummy_Handler
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.weak I2C1_EV_IRQHandler
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.thumb_set I2C1_EV_IRQHandler,Dummy_Handler
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.weak I2C1_ER_IRQHandler
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.thumb_set I2C1_ER_IRQHandler,Dummy_Handler
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.weak I2C2_EV_IRQHandler
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.thumb_set I2C2_EV_IRQHandler,Dummy_Handler
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.weak I2C2_ER_IRQHandler
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.thumb_set I2C2_ER_IRQHandler,Dummy_Handler
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.weak SPI1_IRQHandler
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.thumb_set SPI1_IRQHandler,Dummy_Handler
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.weak SPI2_IRQHandler
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.thumb_set SPI2_IRQHandler,Dummy_Handler
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.weak USART1_IRQHandler
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.thumb_set USART1_IRQHandler,Dummy_Handler
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.weak USART2_IRQHandler
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.thumb_set USART2_IRQHandler,Dummy_Handler
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.weak USART3_IRQHandler
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.thumb_set USART3_IRQHandler,Dummy_Handler
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.weak EXTI15_10_IRQHandler
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.thumb_set EXTI15_10_IRQHandler,Dummy_Handler
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.weak RTC_Alarm_IRQHandler
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.thumb_set RTC_Alarm_IRQHandler,Dummy_Handler
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.weak OTG_FS_WKUP_IRQHandler
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.thumb_set OTG_FS_WKUP_IRQHandler,Dummy_Handler
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.weak TIM8_BRK_TIM12_IRQHandler
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.thumb_set TIM8_BRK_TIM12_IRQHandler,Dummy_Handler
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.weak TIM8_UP_TIM13_IRQHandler
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.thumb_set TIM8_UP_TIM13_IRQHandler,Dummy_Handler
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.weak TIM8_TRG_COM_TIM14_IRQHandler
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.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Dummy_Handler
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.weak TIM8_CC_IRQHandler
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.thumb_set TIM8_CC_IRQHandler,Dummy_Handler
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.weak DMA1_Stream7_IRQHandler
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.thumb_set DMA1_Stream7_IRQHandler,Dummy_Handler
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.weak FSMC_IRQHandler
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.thumb_set FSMC_IRQHandler,Dummy_Handler
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.weak SDIO_IRQHandler
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.thumb_set SDIO_IRQHandler,Dummy_Handler
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.weak TIM5_IRQHandler
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.thumb_set TIM5_IRQHandler,Dummy_Handler
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.weak SPI3_IRQHandler
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.thumb_set SPI3_IRQHandler,Dummy_Handler
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.weak UART4_IRQHandler
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.thumb_set UART4_IRQHandler,Dummy_Handler
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.weak UART5_IRQHandler
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.thumb_set UART5_IRQHandler,Dummy_Handler
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.weak TIM6_DAC_IRQHandler
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.thumb_set TIM6_DAC_IRQHandler,Dummy_Handler
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.weak TIM7_IRQHandler
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.thumb_set TIM7_IRQHandler,Dummy_Handler
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.weak DMA2_Stream0_IRQHandler
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.thumb_set DMA2_Stream0_IRQHandler,Dummy_Handler
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.weak DMA2_Stream1_IRQHandler
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.thumb_set DMA2_Stream1_IRQHandler,Dummy_Handler
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.weak DMA2_Stream2_IRQHandler
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.thumb_set DMA2_Stream2_IRQHandler,Dummy_Handler
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.weak DMA2_Stream3_IRQHandler
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.thumb_set DMA2_Stream3_IRQHandler,Dummy_Handler
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.weak DMA2_Stream4_IRQHandler
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.thumb_set DMA2_Stream4_IRQHandler,Dummy_Handler
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.weak ETH_IRQHandler
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.thumb_set ETH_IRQHandler,Dummy_Handler
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.weak ETH_WKUP_IRQHandler
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.thumb_set ETH_WKUP_IRQHandler,Dummy_Handler
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.weak CAN2_TX_IRQHandler
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.thumb_set CAN2_TX_IRQHandler,Dummy_Handler
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.weak CAN2_RX0_IRQHandler
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.thumb_set CAN2_RX0_IRQHandler,Dummy_Handler
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.weak CAN2_RX1_IRQHandler
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.thumb_set CAN2_RX1_IRQHandler,Dummy_Handler
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.weak CAN2_SCE_IRQHandler
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.thumb_set CAN2_SCE_IRQHandler,Dummy_Handler
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.weak OTG_FS_IRQHandler
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.thumb_set OTG_FS_IRQHandler,Dummy_Handler
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.weak DMA2_Stream5_IRQHandler
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.thumb_set DMA2_Stream5_IRQHandler,Dummy_Handler
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.weak DMA2_Stream6_IRQHandler
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.thumb_set DMA2_Stream6_IRQHandler,Dummy_Handler
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.weak DMA2_Stream7_IRQHandler
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.thumb_set DMA2_Stream7_IRQHandler,Dummy_Handler
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.weak USART6_IRQHandler
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.thumb_set USART6_IRQHandler,Dummy_Handler
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.weak I2C3_EV_IRQHandler
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.thumb_set I2C3_EV_IRQHandler,Dummy_Handler
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.weak I2C3_ER_IRQHandler
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.thumb_set I2C3_ER_IRQHandler,Dummy_Handler
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.weak OTG_HS_EP1_OUT_IRQHandler
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.thumb_set OTG_HS_EP1_OUT_IRQHandler,Dummy_Handler
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.weak OTG_HS_EP1_IN_IRQHandler
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.thumb_set OTG_HS_EP1_IN_IRQHandler,Dummy_Handler
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.weak OTG_HS_WKUP_IRQHandler
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.thumb_set OTG_HS_WKUP_IRQHandler,Dummy_Handler
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.weak OTG_HS_IRQHandler
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.thumb_set OTG_HS_IRQHandler,Dummy_Handler
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.weak DCMI_IRQHandler
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.thumb_set DCMI_IRQHandler,Dummy_Handler
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.weak FPU_IRQHandler
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.thumb_set FPU_IRQHandler,Dummy_Handler
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#else
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.thumb_func
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.weak WWDG_IRQHandler
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WWDG_IRQHandler:
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b .
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.thumb_func
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.weak PVD_IRQHandler
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PVD_IRQHandler:
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b .
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.thumb_func
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.weak TAMP_STAMP_IRQHandler
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TAMP_STAMP_IRQHandler:
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b .
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.thumb_func
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.weak RTC_WKUP_IRQHandler
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RTC_WKUP_IRQHandler:
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b .
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.thumb_func
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.weak RCC_IRQHandler
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RCC_IRQHandler:
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b .
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.thumb_func
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.weak EXTI0_IRQHandler
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EXTI0_IRQHandler:
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b .
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.thumb_func
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.weak EXTI1_IRQHandler
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EXTI1_IRQHandler:
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b .
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.thumb_func
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.weak EXTI2_IRQHandler
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EXTI2_IRQHandler:
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b .
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.thumb_func
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.weak EXTI3_IRQHandler
|
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EXTI3_IRQHandler:
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b .
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|
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.thumb_func
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.weak EXTI4_IRQHandler
|
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EXTI4_IRQHandler:
|
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b .
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|
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.thumb_func
|
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.weak DMA1_Stream0_IRQHandler
|
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DMA1_Stream0_IRQHandler:
|
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b .
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|
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.thumb_func
|
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.weak DMA1_Stream1_IRQHandler
|
||||
DMA1_Stream1_IRQHandler:
|
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b .
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|
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.thumb_func
|
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.weak DMA1_Stream2_IRQHandler
|
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DMA1_Stream2_IRQHandler:
|
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b .
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|
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.thumb_func
|
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.weak DMA1_Stream3_IRQHandler
|
||||
DMA1_Stream3_IRQHandler:
|
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b .
|
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|
||||
.thumb_func
|
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.weak DMA1_Stream4_IRQHandler
|
||||
DMA1_Stream4_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
DMA1_Stream5_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
DMA1_Stream6_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak ADC_IRQHandler
|
||||
ADC_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak CAN1_TX_IRQHandler
|
||||
CAN1_TX_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
CAN1_RX0_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
CAN1_RX1_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
CAN1_SCE_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak EXTI9_5_IRQHandler
|
||||
EXTI9_5_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM1_BRK_TIM9_IRQHandler
|
||||
TIM1_BRK_TIM9_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM1_UP_TIM10_IRQHandler
|
||||
TIM1_UP_TIM10_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
TIM1_TRG_COM_TIM11_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM1_CC_IRQHandler
|
||||
TIM1_CC_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM2_IRQHandler
|
||||
TIM2_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM3_IRQHandler
|
||||
TIM3_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM4_IRQHandler
|
||||
TIM4_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak I2C1_EV_IRQHandler
|
||||
I2C1_EV_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak I2C1_ER_IRQHandler
|
||||
I2C1_ER_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak I2C2_EV_IRQHandler
|
||||
I2C2_EV_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak I2C2_ER_IRQHandler
|
||||
I2C2_ER_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak SPI1_IRQHandler
|
||||
SPI1_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak SPI2_IRQHandler
|
||||
SPI2_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak USART1_IRQHandler
|
||||
USART1_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak USART2_IRQHandler
|
||||
USART2_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak USART3_IRQHandler
|
||||
USART3_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak EXTI15_10_IRQHandler
|
||||
EXTI15_10_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
RTC_Alarm_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
OTG_FS_WKUP_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
TIM8_BRK_TIM12_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
TIM8_UP_TIM13_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
TIM8_TRG_COM_TIM14_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM8_CC_IRQHandler
|
||||
TIM8_CC_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
DMA1_Stream7_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak FSMC_IRQHandler
|
||||
FSMC_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak SDIO_IRQHandler
|
||||
SDIO_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM5_IRQHandler
|
||||
TIM5_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak SPI3_IRQHandler
|
||||
SPI3_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak UART4_IRQHandler
|
||||
UART4_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak UART5_IRQHandler
|
||||
UART5_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
TIM6_DAC_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak TIM7_IRQHandler
|
||||
TIM7_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
DMA2_Stream0_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
DMA2_Stream1_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
DMA2_Stream2_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
DMA2_Stream3_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
DMA2_Stream4_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak ETH_IRQHandler
|
||||
ETH_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak ETH_WKUP_IRQHandler
|
||||
ETH_WKUP_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak CAN2_TX_IRQHandler
|
||||
CAN2_TX_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
CAN2_RX0_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
CAN2_RX1_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
CAN2_SCE_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak OTG_FS_IRQHandler
|
||||
OTG_FS_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
DMA2_Stream5_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
DMA2_Stream6_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
DMA2_Stream7_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak USART6_IRQHandler
|
||||
USART6_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak I2C3_EV_IRQHandler
|
||||
I2C3_EV_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak I2C3_ER_IRQHandler
|
||||
I2C3_ER_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
OTG_HS_EP1_OUT_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
OTG_HS_EP1_IN_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
OTG_HS_WKUP_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak OTG_HS_IRQHandler
|
||||
OTG_HS_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak DCMI_IRQHandler
|
||||
DCMI_IRQHandler:
|
||||
b .
|
||||
|
||||
.thumb_func
|
||||
.weak FPU_IRQHandler
|
||||
FPU_IRQHandler:
|
||||
b .
|
||||
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
* Vector Table *
|
||||
*****************************************************************************/
|
||||
|
||||
.section .vectors, "ax"
|
||||
.align 0
|
||||
.global _vectors
|
||||
.extern __stack_end__
|
||||
.extern Reset_Handler
|
||||
|
||||
_vectors:
|
||||
.word __stack_end__
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word SVC_Handler
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word Dummy_Handler /* Reserved */
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Stream0_IRQHandler
|
||||
.word DMA1_Stream1_IRQHandler
|
||||
.word DMA1_Stream2_IRQHandler
|
||||
.word DMA1_Stream3_IRQHandler
|
||||
.word DMA1_Stream4_IRQHandler
|
||||
.word DMA1_Stream5_IRQHandler
|
||||
.word DMA1_Stream6_IRQHandler
|
||||
.word ADC_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM9_IRQHandler
|
||||
.word TIM1_UP_TIM10_IRQHandler
|
||||
.word TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word OTG_FS_WKUP_IRQHandler
|
||||
.word TIM8_BRK_TIM12_IRQHandler
|
||||
.word TIM8_UP_TIM13_IRQHandler
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.word TIM8_CC_IRQHandler
|
||||
.word DMA1_Stream7_IRQHandler
|
||||
.word FSMC_IRQHandler
|
||||
.word SDIO_IRQHandler
|
||||
.word TIM5_IRQHandler
|
||||
.word SPI3_IRQHandler
|
||||
.word UART4_IRQHandler
|
||||
.word UART5_IRQHandler
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Stream0_IRQHandler
|
||||
.word DMA2_Stream1_IRQHandler
|
||||
.word DMA2_Stream2_IRQHandler
|
||||
.word DMA2_Stream3_IRQHandler
|
||||
.word DMA2_Stream4_IRQHandler
|
||||
.word ETH_IRQHandler
|
||||
.word ETH_WKUP_IRQHandler
|
||||
.word CAN2_TX_IRQHandler
|
||||
.word CAN2_RX0_IRQHandler
|
||||
.word CAN2_RX1_IRQHandler
|
||||
.word CAN2_SCE_IRQHandler
|
||||
.word OTG_FS_IRQHandler
|
||||
.word DMA2_Stream5_IRQHandler
|
||||
.word DMA2_Stream6_IRQHandler
|
||||
.word DMA2_Stream7_IRQHandler
|
||||
.word USART6_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word OTG_HS_EP1_OUT_IRQHandler
|
||||
.word OTG_HS_EP1_IN_IRQHandler
|
||||
.word OTG_HS_WKUP_IRQHandler
|
||||
.word OTG_HS_IRQHandler
|
||||
.word DCMI_IRQHandler
|
||||
.word Dummy_Handler /* Reserved */
|
||||
.word Dummy_Handler /* Reserved */
|
||||
.word FPU_IRQHandler
|
||||
_vectors_end:
|
||||
|
||||
#ifdef VECTORS_IN_RAM
|
||||
.section .vectors_ram, "ax"
|
||||
.align 0
|
||||
.global _vectors_ram
|
||||
|
||||
_vectors_ram:
|
||||
.space _vectors_end - _vectors, 0
|
||||
#endif
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*****************************************************************************
|
||||
* SEGGER Microcontroller GmbH & Co. KG *
|
||||
* Solutions for real time microcontroller applications *
|
||||
*****************************************************************************
|
||||
* *
|
||||
* (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
|
||||
* *
|
||||
* Internet: www.segger.com Support: support@segger.com *
|
||||
* *
|
||||
*****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Preprocessor Definitions *
|
||||
* ------------------------ *
|
||||
* NO_FPU_ENABLE *
|
||||
* *
|
||||
* If defined, FPU will not be enabled. *
|
||||
* *
|
||||
* NO_STACK_INIT *
|
||||
* *
|
||||
* If defined, the stack pointer will not be initialised. *
|
||||
* *
|
||||
* NO_SYSTEM_INIT *
|
||||
* *
|
||||
* If defined, the SystemInit() function will not be called. By default *
|
||||
* SystemInit() is called after reset to enable the clocks and memories to *
|
||||
* be initialised prior to any C startup initialisation. *
|
||||
* *
|
||||
* NO_VTOR_CONFIG *
|
||||
* *
|
||||
* If defined, the vector table offset register will not be configured. *
|
||||
* *
|
||||
* MEMORY_INIT *
|
||||
* *
|
||||
* If defined, the MemoryInit() function will be called. By default *
|
||||
* MemoryInit() is called after SystemInit() to enable an external memory *
|
||||
* controller. *
|
||||
* *
|
||||
* STACK_INIT_VAL *
|
||||
* *
|
||||
* If defined, specifies the initial stack pointer value. If undefined, *
|
||||
* the stack pointer will be initialised to point to the end of the *
|
||||
* RAM segment. *
|
||||
* *
|
||||
* VECTORS_IN_RAM *
|
||||
* *
|
||||
* If defined, the exception vectors will be copied from Flash to RAM. *
|
||||
* *
|
||||
*****************************************************************************/
|
||||
|
||||
.syntax unified
|
||||
|
||||
.global Reset_Handler
|
||||
.extern _vectors
|
||||
|
||||
.section .init, "ax"
|
||||
.thumb_func
|
||||
|
||||
.equ VTOR_REG, 0xE000ED08
|
||||
.equ FPU_CPACR_REG, 0xE000ED88
|
||||
|
||||
#ifndef STACK_INIT_VAL
|
||||
#define STACK_INIT_VAL __RAM_segment_end__
|
||||
#endif
|
||||
|
||||
Reset_Handler:
|
||||
#ifndef NO_STACK_INIT
|
||||
/* Initialise main stack */
|
||||
ldr r0, =STACK_INIT_VAL
|
||||
bic r0, #0x7
|
||||
mov sp, r0
|
||||
#endif
|
||||
|
||||
#ifndef NO_SYSTEM_INIT
|
||||
/* Initialise system */
|
||||
ldr r0, =SystemInit
|
||||
blx r0
|
||||
#endif
|
||||
|
||||
#ifdef MEMORY_INIT
|
||||
ldr r0, =MemoryInit
|
||||
blx r0
|
||||
#endif
|
||||
|
||||
#ifdef VECTORS_IN_RAM
|
||||
/* Copy exception vectors into RAM */
|
||||
ldr r0, =__vectors_start__
|
||||
ldr r1, =__vectors_end__
|
||||
ldr r2, =__vectors_ram_start__
|
||||
1:
|
||||
cmp r0, r1
|
||||
beq 2f
|
||||
ldr r3, [r0]
|
||||
str r3, [r2]
|
||||
adds r0, r0, #4
|
||||
adds r2, r2, #4
|
||||
b 1b
|
||||
2:
|
||||
#endif
|
||||
|
||||
#ifndef NO_VTOR_CONFIG
|
||||
/* Configure vector table offset register */
|
||||
ldr r0, =VTOR_REG
|
||||
#ifdef VECTORS_IN_RAM
|
||||
ldr r1, =_vectors_ram
|
||||
#else
|
||||
ldr r1, =_vectors
|
||||
#endif
|
||||
str r1, [r0]
|
||||
#endif
|
||||
|
||||
#if (defined(__ARM_ARCH_FPV4_SP_D16__) || defined(__ARM_ARCH_FPV5_D16__)) && !defined(NO_FPU_ENABLE)
|
||||
/* Enable FPU */
|
||||
ldr r0, =FPU_CPACR_REG
|
||||
ldr r1, [r0]
|
||||
orr r1, r1, #(0xF << 20)
|
||||
str r1, [r0]
|
||||
dsb
|
||||
isb
|
||||
#endif
|
||||
|
||||
/* Jump to program start */
|
||||
b _start
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
/*****************************************************************************
|
||||
* SEGGER Microcontroller GmbH & Co. KG *
|
||||
* Solutions for real time microcontroller applications *
|
||||
*****************************************************************************
|
||||
* *
|
||||
* (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
|
||||
* *
|
||||
* Internet: www.segger.com Support: support@segger.com *
|
||||
* *
|
||||
*****************************************************************************/
|
||||
|
||||
function Reset() {
|
||||
TargetInterface.resetAndStop();
|
||||
}
|
||||
|
||||
function EnableTrace(traceInterfaceType) {
|
||||
// TODO: Enable trace
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
<!DOCTYPE Linker_Placement_File>
|
||||
<Root name="Flash Section Placement">
|
||||
<MemorySegment name="$(FLASH_NAME:FLASH)">
|
||||
<ProgramSection alignment="0x100" load="Yes" name=".vectors" start="$(FLASH_START:)" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".init" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".init_rodata" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".text" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".dtors" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".ctors" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".rodata" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".ARM.exidx" address_symbol="__exidx_start" end_symbol="__exidx_end" />
|
||||
<ProgramSection alignment="4" load="Yes" runin=".fast_run" name=".fast" />
|
||||
<ProgramSection alignment="4" load="Yes" runin=".data_run" name=".data" />
|
||||
<ProgramSection alignment="4" load="Yes" runin=".tdata_run" name=".tdata" />
|
||||
</MemorySegment>
|
||||
<MemorySegment name="$(RAM_NAME:RAM);SRAM">
|
||||
<ProgramSection alignment="0x100" load="No" name=".vectors_ram" start="$(RAM_START:$(SRAM_START:))" />
|
||||
<ProgramSection alignment="4" load="No" name=".fast_run" />
|
||||
<ProgramSection alignment="4" load="No" name=".data_run" />
|
||||
<ProgramSection alignment="4" load="No" name=".bss" />
|
||||
<ProgramSection alignment="4" load="No" name=".tbss" />
|
||||
<ProgramSection alignment="4" load="No" name=".tdata_run" />
|
||||
<ProgramSection alignment="4" load="No" name=".non_init" />
|
||||
<ProgramSection alignment="4" size="__HEAPSIZE__" load="No" name=".heap" />
|
||||
<ProgramSection alignment="8" size="__STACKSIZE__" load="No" place_from_segment_end="Yes" name=".stack" />
|
||||
<ProgramSection alignment="8" size="__STACKSIZE_PROCESS__" load="No" name=".stack_process" />
|
||||
</MemorySegment>
|
||||
<MemorySegment name="$(FLASH2_NAME:FLASH2)">
|
||||
<ProgramSection alignment="4" load="Yes" name=".text2" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".rodata2" />
|
||||
<ProgramSection alignment="4" load="Yes" runin=".data2_run" name=".data2" />
|
||||
</MemorySegment>
|
||||
<MemorySegment name="$(RAM2_NAME:RAM2)">
|
||||
<ProgramSection alignment="4" load="No" name=".data2_run" />
|
||||
<ProgramSection alignment="4" load="No" name=".bss2" />
|
||||
</MemorySegment>
|
||||
</Root>
|
||||
|
|
@ -0,0 +1,91 @@
|
|||
<!DOCTYPE CrossStudio_Project_File>
|
||||
<solution Name="stm32f4" target="8" version="2">
|
||||
<project Name="stm32f4">
|
||||
<configuration
|
||||
Name="Common"
|
||||
Placement="Flash"
|
||||
Target="STM32F407VG"
|
||||
arm_architecture="v7EM"
|
||||
arm_core_type="Cortex-M4"
|
||||
arm_endian="Little"
|
||||
arm_fp_abi="Hard"
|
||||
arm_fpu_type="FPv4-SP-D16"
|
||||
arm_interwork="No"
|
||||
arm_linker_heap_size="256"
|
||||
arm_linker_process_stack_size="0"
|
||||
arm_linker_stack_size="256"
|
||||
arm_simulator_memory_simulation_parameter="ROM;0x08000000;0x00100000;RAM;0x10000000;0x00010000;RAM;0x20000000;0x00020000"
|
||||
arm_target_debug_interface_type="ADIv5"
|
||||
arm_target_device_name="STM32F407VG"
|
||||
arm_target_interface_type="SWD"
|
||||
c_preprocessor_definitions="STM32F407xx;__STM32F4xx_FAMILY;__STM32F407_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_STM32F4;HSE_VALUE=8000000;BOARD_STM32F407G_DISC1"
|
||||
c_user_include_directories="../../src;$(rootDir)/src;$(rootDir)/hw;$(ProjectDir)/STM32F4xx/CMSIS/Device/Include;$(rootDir)/hw/mcu/st/cmsis"
|
||||
debug_register_definition_file="$(ProjectDir)/STM32F40x_Registers.xml"
|
||||
debug_target_connection="J-Link"
|
||||
gcc_entry_point="Reset_Handler"
|
||||
linker_memory_map_file="$(ProjectDir)/STM32F407VG_MemoryMap.xml"
|
||||
linker_section_placement_file="$(ProjectDir)/flash_placement.xml"
|
||||
macros="DeviceHeaderFile=$(PackagesDir)/STM32F4xx/CMSIS/Device/Include/stm32f4xx.h;DeviceLibraryIdentifier=M4lf;DeviceSystemFile=$(PackagesDir)/STM32F4xx/CMSIS/Device/Source/system_stm32f4xx.c;DeviceVectorsFile=$(PackagesDir)/STM32F4xx/Source/STM32F40x_Vectors.s;DeviceFamily=STM32F4xx;DeviceSubFamily=STM32F407;Target=STM32F407VG;Placement=Flash;rootDir=../../../../.."
|
||||
package_dependencies="STM32F4xx"
|
||||
project_directory=""
|
||||
project_type="Executable"
|
||||
target_reset_script="Reset();"
|
||||
target_trace_initialize_script="EnableTrace("$(TraceInterfaceType)")" />
|
||||
<folder Name="CMSIS Files">
|
||||
<file file_name="STM32F4xx/CMSIS/Device/Include/stm32f4xx.h" />
|
||||
<file file_name="STM32F4xx/CMSIS/Device/Source/system_stm32f4xx.c">
|
||||
<configuration
|
||||
Name="Common"
|
||||
default_code_section=".init"
|
||||
default_const_section=".init_rodata" />
|
||||
</file>
|
||||
</folder>
|
||||
<folder Name="System Files">
|
||||
<file file_name="thumb_crt0.s" />
|
||||
<file file_name="STM32F4xx_Startup.s" />
|
||||
<file file_name="STM32F40x_Vectors.s">
|
||||
<configuration Name="Common" file_type="Assembly" />
|
||||
</file>
|
||||
<file file_name="STM32F4xx_Target.js">
|
||||
<configuration Name="Common" file_type="Reset Script" />
|
||||
</file>
|
||||
</folder>
|
||||
<folder
|
||||
Name="tinyusb"
|
||||
exclude=""
|
||||
filter="*.c;*.h"
|
||||
path="../../../../../src"
|
||||
recurse="Yes" />
|
||||
<folder
|
||||
Name="src"
|
||||
exclude=""
|
||||
filter="*.c;*.h"
|
||||
path="../../src"
|
||||
recurse="Yes" />
|
||||
<folder
|
||||
Name="segger_rtt"
|
||||
exclude=""
|
||||
filter="*.c;*.h"
|
||||
path="../../../../../lib/segger_rtt"
|
||||
recurse="No" />
|
||||
<folder Name="hw">
|
||||
<folder Name="bsp">
|
||||
<folder Name="stm32f407g_disc1">
|
||||
<file file_name="../../../../../hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c" />
|
||||
<file file_name="../../../../../hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.h" />
|
||||
</folder>
|
||||
<file file_name="../../../../../hw/bsp/board.h" />
|
||||
</folder>
|
||||
<folder Name="mcu">
|
||||
<folder Name="st">
|
||||
<folder Name="system-init" />
|
||||
</folder>
|
||||
</folder>
|
||||
</folder>
|
||||
</project>
|
||||
<configuration
|
||||
Name="stm32f407g_disc1"
|
||||
c_preprocessor_definitions="DEBUG"
|
||||
gcc_debugging_level="Level 3"
|
||||
gcc_optimization_level="None" />
|
||||
</solution>
|
||||
|
|
@ -0,0 +1,415 @@
|
|||
// **********************************************************************
|
||||
// * SEGGER Microcontroller GmbH *
|
||||
// * The Embedded Experts *
|
||||
// **********************************************************************
|
||||
// * *
|
||||
// * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
|
||||
// * (c) 2001 - 2018 Rowley Associates Limited *
|
||||
// * *
|
||||
// * www.segger.com Support: support@segger.com *
|
||||
// * *
|
||||
// **********************************************************************
|
||||
// * *
|
||||
// * All rights reserved. *
|
||||
// * *
|
||||
// * Redistribution and use in source and binary forms, with or *
|
||||
// * without modification, are permitted provided that the following *
|
||||
// * conditions are met: *
|
||||
// * *
|
||||
// * - Redistributions of source code must retain the above copyright *
|
||||
// * notice, this list of conditions and the following disclaimer. *
|
||||
// * *
|
||||
// * - Neither the name of SEGGER Microcontroller GmbH *
|
||||
// * nor the names of its contributors may be used to endorse or *
|
||||
// * promote products derived from this software without specific *
|
||||
// * prior written permission. *
|
||||
// * *
|
||||
// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
|
||||
// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
|
||||
// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
|
||||
// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
|
||||
// * DISCLAIMED. *
|
||||
// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
|
||||
// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
|
||||
// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
|
||||
// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
|
||||
// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
|
||||
// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
|
||||
// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
|
||||
// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
|
||||
// * DAMAGE. *
|
||||
// * *
|
||||
// **********************************************************************
|
||||
//
|
||||
//
|
||||
// Preprocessor Definitions
|
||||
// ------------------------
|
||||
// APP_ENTRY_POINT
|
||||
//
|
||||
// Defines the application entry point function, if undefined this setting
|
||||
// defaults to "main".
|
||||
//
|
||||
// INITIALIZE_STACK
|
||||
//
|
||||
// If defined, the contents of the stack will be initialized to a the
|
||||
// value 0xCC.
|
||||
//
|
||||
// INITIALIZE_SECONDARY_SECTIONS
|
||||
//
|
||||
// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized.
|
||||
//
|
||||
// INITIALIZE_TCM_SECTIONS
|
||||
//
|
||||
// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections
|
||||
// will be initialized.
|
||||
//
|
||||
// INITIALIZE_USER_SECTIONS
|
||||
//
|
||||
// If defined, the function InitializeUserMemorySections will be called prior
|
||||
// to entering main in order to allow the user to initialize any user defined
|
||||
// memory sections.
|
||||
//
|
||||
// FULL_LIBRARY
|
||||
//
|
||||
// If defined then
|
||||
// - argc, argv are setup by the debug_getargs.
|
||||
// - the exit symbol is defined and executes on return from main.
|
||||
// - the exit symbol calls destructors, atexit functions and then debug_exit.
|
||||
//
|
||||
// If not defined then
|
||||
// - argc and argv are zero.
|
||||
// - the exit symbol is defined, executes on return from main and loops
|
||||
//
|
||||
|
||||
#ifndef APP_ENTRY_POINT
|
||||
#define APP_ENTRY_POINT main
|
||||
#endif
|
||||
|
||||
#ifndef ARGSSPACE
|
||||
#define ARGSSPACE 128
|
||||
#endif
|
||||
.syntax unified
|
||||
|
||||
.global _start
|
||||
.extern APP_ENTRY_POINT
|
||||
.global exit
|
||||
.weak exit
|
||||
|
||||
#ifdef INITIALIZE_USER_SECTIONS
|
||||
.extern InitializeUserMemorySections
|
||||
#endif
|
||||
|
||||
.section .init, "ax"
|
||||
.code 16
|
||||
.balign 2
|
||||
.thumb_func
|
||||
|
||||
_start:
|
||||
/* Set up main stack if size > 0 */
|
||||
ldr r1, =__stack_end__
|
||||
ldr r0, =__stack_start__
|
||||
subs r2, r1, r0
|
||||
beq 1f
|
||||
#ifdef __ARM_EABI__
|
||||
movs r2, #0x7
|
||||
bics r1, r2
|
||||
#endif
|
||||
mov sp, r1
|
||||
#ifdef INITIALIZE_STACK
|
||||
movs r2, #0xCC
|
||||
ldr r0, =__stack_start__
|
||||
bl memory_set
|
||||
#endif
|
||||
1:
|
||||
|
||||
/* Set up process stack if size > 0 */
|
||||
ldr r1, =__stack_process_end__
|
||||
ldr r0, =__stack_process_start__
|
||||
subs r2, r1, r0
|
||||
beq 1f
|
||||
#ifdef __ARM_EABI__
|
||||
movs r2, #0x7
|
||||
bics r1, r2
|
||||
#endif
|
||||
msr psp, r1
|
||||
movs r2, #2
|
||||
msr control, r2
|
||||
#ifdef INITIALIZE_STACK
|
||||
movs r2, #0xCC
|
||||
bl memory_set
|
||||
#endif
|
||||
1:
|
||||
|
||||
/* Copy initialized memory sections into RAM (if necessary). */
|
||||
ldr r0, =__data_load_start__
|
||||
ldr r1, =__data_start__
|
||||
ldr r2, =__data_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__text_load_start__
|
||||
ldr r1, =__text_start__
|
||||
ldr r2, =__text_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__fast_load_start__
|
||||
ldr r1, =__fast_start__
|
||||
ldr r2, =__fast_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__ctors_load_start__
|
||||
ldr r1, =__ctors_start__
|
||||
ldr r2, =__ctors_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__dtors_load_start__
|
||||
ldr r1, =__dtors_start__
|
||||
ldr r2, =__dtors_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__rodata_load_start__
|
||||
ldr r1, =__rodata_start__
|
||||
ldr r2, =__rodata_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__tdata_load_start__
|
||||
ldr r1, =__tdata_start__
|
||||
ldr r2, =__tdata_end__
|
||||
bl memory_copy
|
||||
#ifdef INITIALIZE_SECONDARY_SECTIONS
|
||||
ldr r0, =__data2_load_start__
|
||||
ldr r1, =__data2_start__
|
||||
ldr r2, =__data2_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__text2_load_start__
|
||||
ldr r1, =__text2_start__
|
||||
ldr r2, =__text2_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__rodata2_load_start__
|
||||
ldr r1, =__rodata2_start__
|
||||
ldr r2, =__rodata2_end__
|
||||
bl memory_copy
|
||||
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
|
||||
#ifdef INITIALIZE_TCM_SECTIONS
|
||||
ldr r0, =__data_tcm_load_start__
|
||||
ldr r1, =__data_tcm_start__
|
||||
ldr r2, =__data_tcm_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__text_tcm_load_start__
|
||||
ldr r1, =__text_tcm_start__
|
||||
ldr r2, =__text_tcm_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__rodata_tcm_load_start__
|
||||
ldr r1, =__rodata_tcm_start__
|
||||
ldr r2, =__rodata_tcm_end__
|
||||
bl memory_copy
|
||||
#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
|
||||
|
||||
/* Zero the bss. */
|
||||
ldr r0, =__bss_start__
|
||||
ldr r1, =__bss_end__
|
||||
movs r2, #0
|
||||
bl memory_set
|
||||
ldr r0, =__tbss_start__
|
||||
ldr r1, =__tbss_end__
|
||||
movs r2, #0
|
||||
bl memory_set
|
||||
#ifdef INITIALIZE_SECONDARY_SECTIONS
|
||||
ldr r0, =__bss2_start__
|
||||
ldr r1, =__bss2_end__
|
||||
mov r2, #0
|
||||
bl memory_set
|
||||
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
|
||||
#ifdef INITIALIZE_TCM_SECTIONS
|
||||
ldr r0, =__bss_tcm_start__
|
||||
ldr r1, =__bss_tcm_end__
|
||||
mov r2, #0
|
||||
bl memory_set
|
||||
#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
|
||||
|
||||
/* Initialize the heap */
|
||||
ldr r0, = __heap_start__
|
||||
ldr r1, = __heap_end__
|
||||
subs r1, r1, r0
|
||||
cmp r1, #8
|
||||
blt 1f
|
||||
movs r2, #0
|
||||
str r2, [r0]
|
||||
adds r0, r0, #4
|
||||
str r1, [r0]
|
||||
1:
|
||||
|
||||
#ifdef INITIALIZE_USER_SECTIONS
|
||||
ldr r2, =InitializeUserMemorySections
|
||||
blx r2
|
||||
#endif
|
||||
|
||||
/* Call constructors */
|
||||
ldr r0, =__ctors_start__
|
||||
ldr r1, =__ctors_end__
|
||||
ctor_loop:
|
||||
cmp r0, r1
|
||||
beq ctor_end
|
||||
ldr r2, [r0]
|
||||
adds r0, #4
|
||||
push {r0-r1}
|
||||
blx r2
|
||||
pop {r0-r1}
|
||||
b ctor_loop
|
||||
ctor_end:
|
||||
|
||||
/* Setup initial call frame */
|
||||
movs r0, #0
|
||||
mov lr, r0
|
||||
mov r12, sp
|
||||
|
||||
.type start, function
|
||||
start:
|
||||
/* Jump to application entry point */
|
||||
#ifdef FULL_LIBRARY
|
||||
movs r0, #ARGSSPACE
|
||||
ldr r1, =args
|
||||
ldr r2, =debug_getargs
|
||||
blx r2
|
||||
ldr r1, =args
|
||||
#else
|
||||
movs r0, #0
|
||||
movs r1, #0
|
||||
#endif
|
||||
ldr r2, =APP_ENTRY_POINT
|
||||
blx r2
|
||||
|
||||
.thumb_func
|
||||
exit:
|
||||
#ifdef FULL_LIBRARY
|
||||
mov r5, r0 // save the exit parameter/return result
|
||||
|
||||
/* Call destructors */
|
||||
ldr r0, =__dtors_start__
|
||||
ldr r1, =__dtors_end__
|
||||
dtor_loop:
|
||||
cmp r0, r1
|
||||
beq dtor_end
|
||||
ldr r2, [r0]
|
||||
add r0, #4
|
||||
push {r0-r1}
|
||||
blx r2
|
||||
pop {r0-r1}
|
||||
b dtor_loop
|
||||
dtor_end:
|
||||
|
||||
/* Call atexit functions */
|
||||
ldr r2, =_execute_at_exit_fns
|
||||
blx r2
|
||||
|
||||
/* Call debug_exit with return result/exit parameter */
|
||||
mov r0, r5
|
||||
ldr r2, =debug_exit
|
||||
blx r2
|
||||
#endif
|
||||
|
||||
/* Returned from application entry point, loop forever. */
|
||||
exit_loop:
|
||||
b exit_loop
|
||||
|
||||
.thumb_func
|
||||
memory_copy:
|
||||
cmp r0, r1
|
||||
beq 2f
|
||||
subs r2, r2, r1
|
||||
beq 2f
|
||||
1:
|
||||
ldrb r3, [r0]
|
||||
adds r0, r0, #1
|
||||
strb r3, [r1]
|
||||
adds r1, r1, #1
|
||||
subs r2, r2, #1
|
||||
bne 1b
|
||||
2:
|
||||
bx lr
|
||||
|
||||
.thumb_func
|
||||
memory_set:
|
||||
cmp r0, r1
|
||||
beq 1f
|
||||
strb r2, [r0]
|
||||
adds r0, r0, #1
|
||||
b memory_set
|
||||
1:
|
||||
bx lr
|
||||
|
||||
// default C/C++ library helpers
|
||||
|
||||
.macro HELPER helper_name
|
||||
.section .text.\helper_name, "ax", %progbits
|
||||
.balign 2
|
||||
.global \helper_name
|
||||
.weak \helper_name
|
||||
\helper_name:
|
||||
.thumb_func
|
||||
.endm
|
||||
|
||||
.macro JUMPTO name
|
||||
#if defined(__thumb__) && !defined(__thumb2__)
|
||||
mov r12, r0
|
||||
ldr r0, =\name
|
||||
push {r0}
|
||||
mov r0, r12
|
||||
pop {pc}
|
||||
#else
|
||||
b \name
|
||||
#endif
|
||||
.endm
|
||||
|
||||
HELPER __aeabi_read_tp
|
||||
ldr r0, =__tbss_start__-8
|
||||
bx lr
|
||||
HELPER abort
|
||||
b .
|
||||
HELPER __assert
|
||||
b .
|
||||
HELPER __aeabi_assert
|
||||
b .
|
||||
HELPER __sync_synchronize
|
||||
bx lr
|
||||
HELPER __getchar
|
||||
JUMPTO debug_getchar
|
||||
HELPER __putchar
|
||||
JUMPTO debug_putchar
|
||||
HELPER __open
|
||||
JUMPTO debug_fopen
|
||||
HELPER __close
|
||||
JUMPTO debug_fclose
|
||||
HELPER __write
|
||||
mov r3, r0
|
||||
mov r0, r1
|
||||
movs r1, #1
|
||||
JUMPTO debug_fwrite
|
||||
HELPER __read
|
||||
mov r3, r0
|
||||
mov r0, r1
|
||||
movs r1, #1
|
||||
JUMPTO debug_fread
|
||||
HELPER __seek
|
||||
push {r4, lr}
|
||||
mov r4, r0
|
||||
bl debug_fseek
|
||||
cmp r0, #0
|
||||
bne 1f
|
||||
mov r0, r4
|
||||
bl debug_ftell
|
||||
pop {r4, pc}
|
||||
1:
|
||||
ldr r0, =-1
|
||||
pop {r4, pc}
|
||||
// char __user_locale_name_buffer[];
|
||||
.section .bss.__user_locale_name_buffer, "aw", %nobits
|
||||
.global __user_locale_name_buffer
|
||||
.weak __user_locale_name_buffer
|
||||
__user_locale_name_buffer:
|
||||
.word 0x0
|
||||
|
||||
#ifdef FULL_LIBRARY
|
||||
.bss
|
||||
args:
|
||||
.space ARGSSPACE
|
||||
#endif
|
||||
|
||||
/* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
|
||||
.section .stack, "wa", %nobits
|
||||
.section .stack_process, "wa", %nobits
|
||||
.section .heap, "wa", %nobits
|
||||
|
||||
|
|
@ -27,8 +27,20 @@ VENDOR = st
|
|||
CHIP_FAMILY = stm32f4
|
||||
|
||||
# Path to STM32 Cube Programmer CLI
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
ifeq ($(OS),Windows_NT)
|
||||
STM32Prog = C:/Program Files/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI
|
||||
else
|
||||
UNAME_S := $(shell uname -s)
|
||||
|
||||
ifeq ($(UNAME_S),Linux)
|
||||
STM32Prog = $(HOME)/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI
|
||||
endif
|
||||
|
||||
ifeq ($(UNAME_S),Darwin)
|
||||
STM32Prog = STM32_Programmer_CLI
|
||||
endif
|
||||
endif
|
||||
|
||||
# flash target to download
|
||||
# flash target using on-board stlink
|
||||
flash: $(BUILD)/$(BOARD)-firmware.elf
|
||||
$(STM32Prog) --connect port=swd --write $< --go
|
||||
|
|
|
|||
Loading…
Reference in New Issue