Merge pull request #357 from hathach/fix-209
add disconnection detection for stm32 synopsys
This commit is contained in:
commit
c0047e376f
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@ -179,7 +179,8 @@ void dcd_init(uint8_t rhport)
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USB0.gintmsk = 0; //mask all
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USB0.gintmsk = 0; //mask all
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USB0.gotgint = ~0U; //clear OTG ints
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USB0.gotgint = ~0U; //clear OTG ints
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USB0.gintsts = ~0U; //clear pending ints
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USB0.gintsts = ~0U; //clear pending ints
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USB0.gintmsk = USB_MODEMISMSK_M |
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USB0.gintmsk = USB_OTGINTMSK_M |
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USB_MODEMISMSK_M |
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#if USE_SOF
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#if USE_SOF
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USB_SOFMSK_M |
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USB_SOFMSK_M |
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#endif
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#endif
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@ -189,7 +190,7 @@ void dcd_init(uint8_t rhport)
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USB_USBRSTMSK_M |
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USB_USBRSTMSK_M |
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USB_ENUMDONEMSK_M |
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USB_ENUMDONEMSK_M |
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USB_RESETDETMSK_M |
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USB_RESETDETMSK_M |
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USB_DISCONNINTMSK_M;
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USB_DISCONNINTMSK_M; // host most only
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}
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}
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void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
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void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
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@ -638,12 +639,6 @@ static void _dcd_int_handler(void* arg)
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const uint32_t int_status = USB0.gintsts;
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const uint32_t int_status = USB0.gintsts;
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//const uint32_t int_msk = USB0.gintmsk;
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//const uint32_t int_msk = USB0.gintmsk;
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if (int_status & USB_DISCONNINT_M) {
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - disconnected");
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USB0.gintsts = USB_DISCONNINT_M;
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dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true);
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}
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if (int_status & USB_USBRST_M) {
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if (int_status & USB_USBRST_M) {
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// start of reset
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// start of reset
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - reset");
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - reset");
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@ -666,6 +661,21 @@ static void _dcd_int_handler(void* arg)
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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}
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}
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if (int_status & USB_OTGINT_M)
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{
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// OTG INT bit is read-only
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - disconnected");
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uint32_t const otg_int = USB0.gotgint;
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if (otg_int & USB_SESENDDET_M)
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{
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dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true);
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}
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USB0.gotgint = otg_int;
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}
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#if USE_SOF
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#if USE_SOF
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if (int_status & USB_SOF_M) {
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if (int_status & USB_SOF_M) {
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USB0.gintsts = USB_SOF_M;
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USB0.gintsts = USB_SOF_M;
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@ -674,26 +684,25 @@ static void _dcd_int_handler(void* arg)
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#endif
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#endif
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if (int_status & USB_RXFLVI_M) {
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if (int_status & USB_RXFLVI_M) {
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// RXFLVL bit is read-only
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - rx!");
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - rx!");
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USB0.gintsts = USB_RXFLVI_M;
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// disable RXFLVI interrupt until we read data from FIFO
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// Mask out RXFLVL while reading data from FIFO
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USB0.gintmsk &= ~USB_RXFLVIMSK_M;
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USB0.gintmsk &= ~USB_RXFLVIMSK_M;
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read_rx_fifo();
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read_rx_fifo();
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// re-enable RXFLVI
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USB0.gintmsk |= USB_RXFLVIMSK_M;
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USB0.gintmsk |= USB_RXFLVIMSK_M;
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}
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}
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// OUT endpoint interrupt handling.
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// OUT endpoint interrupt handling.
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if (int_status & USB_OEPINT_M) {
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if (int_status & USB_OEPINT_M) {
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// OEPINT is read-only
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - OUT endpoint!");
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - OUT endpoint!");
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handle_epout_ints();
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handle_epout_ints();
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}
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}
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// IN endpoint interrupt handling.
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// IN endpoint interrupt handling.
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if (int_status & USB_IEPINT_M) {
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if (int_status & USB_IEPINT_M) {
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// IEPINT bit read-only
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - IN endpoint!");
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - IN endpoint!");
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handle_epin_ints();
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handle_epin_ints();
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}
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}
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@ -75,6 +75,11 @@
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/*------------------------------------------------------------------*/
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/*------------------------------------------------------------------*/
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/* MACRO TYPEDEF CONSTANT ENUM
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/* MACRO TYPEDEF CONSTANT ENUM
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*------------------------------------------------------------------*/
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*------------------------------------------------------------------*/
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// Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval)
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// We disable SOF for now until needed later on
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#define USE_SOF 0
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#define DEVICE_BASE (USB_OTG_DeviceTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_DEVICE_BASE)
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#define DEVICE_BASE (USB_OTG_DeviceTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_DEVICE_BASE)
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#define OUT_EP_BASE (USB_OTG_OUTEndpointTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_OUT_ENDPOINT_BASE)
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#define OUT_EP_BASE (USB_OTG_OUTEndpointTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_OUT_ENDPOINT_BASE)
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#define IN_EP_BASE (USB_OTG_INEndpointTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_IN_ENDPOINT_BASE)
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#define IN_EP_BASE (USB_OTG_INEndpointTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_IN_ENDPOINT_BASE)
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@ -187,15 +192,13 @@ void dcd_init (uint8_t rhport)
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// TODO: PHYSEL is read-only on some cores (STM32F407). Worth gating?
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// TODO: PHYSEL is read-only on some cores (STM32F407). Worth gating?
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USB_OTG_FS->GUSBCFG |= (0x06 << USB_OTG_GUSBCFG_TRDT_Pos) | USB_OTG_GUSBCFG_PHYSEL;
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USB_OTG_FS->GUSBCFG |= (0x06 << USB_OTG_GUSBCFG_TRDT_Pos) | USB_OTG_GUSBCFG_PHYSEL;
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// Clear all used interrupts
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// Clear all interrupts
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USB_OTG_FS->GINTSTS |= USB_OTG_GINTSTS_OTGINT | USB_OTG_GINTSTS_MMIS | \
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USB_OTG_FS->GINTSTS |= USB_OTG_FS->GINTSTS;
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USB_OTG_GINTSTS_USBRST | USB_OTG_GINTSTS_ENUMDNE | \
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USB_OTG_GINTSTS_ESUSP | USB_OTG_GINTSTS_USBSUSP | USB_OTG_GINTSTS_SOF;
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// Required as part of core initialization. Disable OTGINT as we don't use
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// Required as part of core initialization.
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// it right now. TODO: How should mode mismatch be handled? It will cause
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// TODO: How should mode mismatch be handled? It will cause
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// the core to stop working/require reset.
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// the core to stop working/require reset.
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USB_OTG_FS->GINTMSK |= /* USB_OTG_GINTMSK_OTGINT | */ USB_OTG_GINTMSK_MMISM;
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USB_OTG_FS->GINTMSK |= USB_OTG_GINTMSK_OTGINT | USB_OTG_GINTMSK_MMISM;
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USB_OTG_DeviceTypeDef * dev = DEVICE_BASE;
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USB_OTG_DeviceTypeDef * dev = DEVICE_BASE;
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@ -203,9 +206,9 @@ void dcd_init (uint8_t rhport)
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// (non zero-length packet), send STALL back and discard. Full speed.
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// (non zero-length packet), send STALL back and discard. Full speed.
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dev->DCFG |= USB_OTG_DCFG_NZLSOHSK | (3 << USB_OTG_DCFG_DSPD_Pos);
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dev->DCFG |= USB_OTG_DCFG_NZLSOHSK | (3 << USB_OTG_DCFG_DSPD_Pos);
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USB_OTG_FS->GINTMSK |= USB_OTG_GINTMSK_USBRST | USB_OTG_GINTMSK_ENUMDNEM | \
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USB_OTG_FS->GINTMSK |= USB_OTG_GINTMSK_USBRST | USB_OTG_GINTMSK_ENUMDNEM |
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USB_OTG_GINTMSK_SOFM | USB_OTG_GINTMSK_RXFLVLM /* SB_OTG_GINTMSK_ESUSPM | \
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USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_WUIM |
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USB_OTG_GINTMSK_USBSUSPM */;
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USB_OTG_GINTMSK_RXFLVLM | (USE_SOF ? USB_OTG_GINTMSK_SOFM : 0);
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// Enable USB transceiver.
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// Enable USB transceiver.
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USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_PWRDWN;
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USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_PWRDWN;
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@ -687,22 +690,56 @@ void dcd_int_handler(uint8_t rhport) {
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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}
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}
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if(int_status & USB_OTG_GINTSTS_USBSUSP)
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{
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USB_OTG_FS->GINTSTS = USB_OTG_GINTSTS_USBSUSP;
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dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
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}
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if(int_status & USB_OTG_GINTSTS_WKUINT)
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{
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USB_OTG_FS->GINTSTS = USB_OTG_GINTSTS_WKUINT;
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dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
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}
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if(int_status & USB_OTG_GINTSTS_OTGINT)
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{
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// OTG INT bit is read-only
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uint32_t const otg_int = USB_OTG_FS->GOTGINT;
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if (otg_int & USB_OTG_GOTGINT_SEDET)
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{
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dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true);
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}
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USB_OTG_FS->GOTGINT = otg_int;
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}
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#if USE_SOF
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if(int_status & USB_OTG_GINTSTS_SOF) {
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if(int_status & USB_OTG_GINTSTS_SOF) {
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USB_OTG_FS->GINTSTS = USB_OTG_GINTSTS_SOF;
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USB_OTG_FS->GINTSTS = USB_OTG_GINTSTS_SOF;
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dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
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dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
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}
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}
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#endif
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if(int_status & USB_OTG_GINTSTS_RXFLVL) {
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if(int_status & USB_OTG_GINTSTS_RXFLVL) {
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// RXFLVL bit is read-only
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// Mask out RXFLVL while reading data from FIFO
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USB_OTG_FS->GINTMSK &= ~USB_OTG_GINTMSK_RXFLVLM;
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read_rx_fifo(out_ep);
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read_rx_fifo(out_ep);
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USB_OTG_FS->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
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}
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}
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// OUT endpoint interrupt handling.
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// OUT endpoint interrupt handling.
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if(int_status & USB_OTG_GINTSTS_OEPINT) {
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if(int_status & USB_OTG_GINTSTS_OEPINT) {
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// OEPINT is read-only
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handle_epout_ints(dev, out_ep);
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handle_epout_ints(dev, out_ep);
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}
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}
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// IN endpoint interrupt handling.
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// IN endpoint interrupt handling.
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if(int_status & USB_OTG_GINTSTS_IEPINT) {
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if(int_status & USB_OTG_GINTSTS_IEPINT) {
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// IEPINT bit read-only
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handle_epin_ints(dev, in_ep);
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handle_epin_ints(dev, in_ep);
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}
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}
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}
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}
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