add linker and startup for lpcxpresso11u68 board

able to build and blink LED
This commit is contained in:
hathach 2019-05-14 17:37:11 +07:00
parent 6e443d1918
commit b1f8aa175e
No known key found for this signature in database
GPG Key ID: 2FA891220FBFD581
4 changed files with 640 additions and 19 deletions

View File

@ -0,0 +1,39 @@
CFLAGS += \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0plus \
-nostdlib \
-DCORE_M0PLUS \
-D__VTOR_PRESENT=0 \
-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
-D__USE_LPCOPEN \
'-DCFG_TUSB_MEM_SECTION= __attribute__((section(".data.$RAM3")))' \
'-DCFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))'
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/lpcxpresso11u68/lpc11u68.ld
SRC_C += \
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/chip_11u6x.c \
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/clock_11u6x.c \
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/gpio_11u6x.c \
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/iocon_11u6x.c \
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/syscon_11u6x.c \
hw/mcu/nxp/lpcopen/lpc_chip_11u6x/src/sysinit_11u6x.c
INC += \
$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_11u6x/inc
# For TinyUSB port source
VENDOR = nxp
CHIP_FAMILY = lpc11_13_15
# For freeRTOS port source
FREERTOS_PORT = ARM_CM0
# For flash-jlink target
JLINK_DEVICE = LPC11U68
JLINK_IF = swd
# flash using jlink
flash: flash-jlink

View File

@ -31,14 +31,8 @@
#define LED_PIN 17
#define LED_STATE_ON 0
static const struct {
uint8_t port;
uint8_t pin;
} buttons[] = { { 0, 1 } };
enum {
BOARD_BUTTON_COUNT = sizeof(buttons) / sizeof(buttons[0])
};
#define BUTTON_PORT 0
#define BUTTON_PIN 1
/* System oscillator rate and RTC oscillator rate */
const uint32_t OscRateIn = 12000000;
@ -78,14 +72,11 @@ void board_init(void)
Chip_GPIO_Init(LPC_GPIO);
//------------- LED -------------//
// LED
Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
//------------- BUTTON -------------//
//for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIOSetDir(buttons[i].port, buttons[i].pin, 0);
//------------- UART -------------//
//UARTInit(CFG_UART_BAUDRATE);
// BUTTON
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
// USB
Chip_USB_Init(); // Setup PLL clock, and power
@ -123,9 +114,8 @@ void board_led_write(bool state)
//--------------------------------------------------------------------+
uint32_t board_button_read(void)
{
// for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) GPIOGetPinValue(buttons[i].port, buttons[i].pin);
// return GPIOGetPinValue(buttons[0].port, buttons[0].pin) ? 0 : 1; // button is active low
return 0;
// active low
return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
}
//--------------------------------------------------------------------+
@ -133,7 +123,6 @@ uint32_t board_button_read(void)
//--------------------------------------------------------------------+
int board_uart_read(uint8_t* buf, int len)
{
// *buffer = get_key(); TODO cannot find available code for uart getchar
(void) buf;
(void) len;
return 0;
@ -141,7 +130,6 @@ int board_uart_read(uint8_t* buf, int len)
int board_uart_write(void const * buf, int len)
{
//UARTSend(&c, 1);
(void) buf;
(void) len;
return 0;

View File

@ -0,0 +1,352 @@
//*****************************************************************************
// LPC11U6x Microcontroller Startup code for use with LPCXpresso IDE
//
// Version : 140113
//*****************************************************************************
//
// Copyright(C) NXP Semiconductors, 2014
// All rights reserved.
//
// Software that is described herein is for illustrative purposes only
// which provides customers with programming information regarding the
// LPC products. This software is supplied "AS IS" without any warranties of
// any kind, and NXP Semiconductors and its licensor disclaim any and
// all warranties, express or implied, including all implied warranties of
// merchantability, fitness for a particular purpose and non-infringement of
// intellectual property rights. NXP Semiconductors assumes no responsibility
// or liability for the use of the software, conveys no license or rights under any
// patent, copyright, mask work right, or any other intellectual property rights in
// or to any products. NXP Semiconductors reserves the right to make changes
// in the software without notification. NXP Semiconductors also makes no
// representation or warranty that such application will be suitable for the
// specified use without further testing or modification.
//
// Permission to use, copy, modify, and distribute this software and its
// documentation is hereby granted, under NXP Semiconductors' and its
// licensor's relevant copyrights in the software, without fee, provided that it
// is used in conjunction with NXP Semiconductors microcontrollers. This
// copyright, permission, and disclaimer notice must appear in all copies of
// this code.
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern "C" {
extern void __libc_init_array(void);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
//*****************************************************************************
#if defined (__cplusplus)
extern "C" {
#endif
//*****************************************************************************
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
// Declaration of external SystemInit function
extern void SystemInit(void);
#endif
// Patch the AEABI integer divide functions to use MCU's romdivide library
#ifdef __USE_ROMDIVIDE
// Location in memory that holds the address of the ROM Driver table
#define PTR_ROM_DRIVER_TABLE ((unsigned int *)(0x1FFF1FF8))
// Variables to store addresses of idiv and udiv functions within MCU ROM
unsigned int *pDivRom_idiv;
unsigned int *pDivRom_uidiv;
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void ResetISR(void);
WEAK void NMI_Handler(void);
WEAK void HardFault_Handler(void);
WEAK void SVC_Handler(void);
WEAK void PendSV_Handler(void);
WEAK void SysTick_Handler(void);
WEAK void IntDefaultHandler(void);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
void I2C1_IRQHandler (void) ALIAS(IntDefaultHandler);
void USART1_4_IRQHandler (void) ALIAS(IntDefaultHandler);
void USART2_3_IRQHandler (void) ALIAS(IntDefaultHandler);
void SCT0_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
void I2C0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
void USART0_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
void ADCA_IRQHandler (void) ALIAS(IntDefaultHandler);
void RTC_IRQHandler (void) ALIAS(IntDefaultHandler);
void BOD_WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
void DMA_IRQHandler (void) ALIAS(IntDefaultHandler);
void ADCB_IRQHandler (void) ALIAS(IntDefaultHandler);
void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
//*****************************************************************************
// The entry point for the application.
// __main() is the entry point for redlib based applications
// main() is the entry point for newlib based applications
//*****************************************************************************
#if defined (__REDLIB__)
extern void __main(void);
#endif
extern int main(void);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern void _vStackTop(void);
//*****************************************************************************
#if defined (__cplusplus)
} // extern "C"
#endif
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
//*****************************************************************************
extern void (* const g_pfnVectors[])(void);
__attribute__ ((section(".isr_vector"))) __attribute__ ((used))
void (* const g_pfnVectors[])(void) = {
&_vStackTop, // The initial stack pointer
ResetISR, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall handler
0, // Reserved
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
// LPC11U6x specific handlers
PIN_INT0_IRQHandler, // 0 - GPIO pin interrupt 0
PIN_INT1_IRQHandler, // 1 - GPIO pin interrupt 1
PIN_INT2_IRQHandler, // 2 - GPIO pin interrupt 2
PIN_INT3_IRQHandler, // 3 - GPIO pin interrupt 3
PIN_INT4_IRQHandler, // 4 - GPIO pin interrupt 4
PIN_INT5_IRQHandler, // 5 - GPIO pin interrupt 5
PIN_INT6_IRQHandler, // 6 - GPIO pin interrupt 6
PIN_INT7_IRQHandler, // 7 - GPIO pin interrupt 7
GINT0_IRQHandler, // 8 - GPIO GROUP0 interrupt
GINT1_IRQHandler, // 9 - GPIO GROUP1 interrupt
I2C1_IRQHandler, // 10 - I2C1
USART1_4_IRQHandler, // 11 - combined USART1 & 4 interrupt
USART2_3_IRQHandler, // 12 - combined USART2 & 3 interrupt
SCT0_1_IRQHandler, // 13 - combined SCT0 and 1 interrupt
SSP1_IRQHandler, // 14 - SPI/SSP1 Interrupt
I2C0_IRQHandler, // 15 - I2C0
TIMER16_0_IRQHandler, // 16 - CT16B0 (16-bit Timer 0)
TIMER16_1_IRQHandler, // 17 - CT16B1 (16-bit Timer 1)
TIMER32_0_IRQHandler, // 18 - CT32B0 (32-bit Timer 0)
TIMER32_1_IRQHandler, // 19 - CT32B1 (32-bit Timer 1)
SSP0_IRQHandler, // 20 - SPI/SSP0 Interrupt
USART0_IRQHandler, // 21 - USART0
USB_IRQHandler, // 22 - USB IRQ
USB_FIQHandler, // 23 - USB FIQ
ADCA_IRQHandler, // 24 - ADC A(A/D Converter)
RTC_IRQHandler, // 25 - Real Time CLock interrpt
BOD_WDT_IRQHandler, // 25 - Combined Brownout/Watchdog interrupt
FMC_IRQHandler, // 27 - IP2111 Flash Memory Controller
DMA_IRQHandler, // 28 - DMA interrupt
ADCB_IRQHandler, // 24 - ADC B (A/D Converter)
USBWakeup_IRQHandler, // 30 - USB wake-up interrupt
0, // 31 - Reserved
};
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int *pulSrc = (unsigned int*) romstart;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = *pulSrc++;
}
__attribute__ ((section(".after_vectors")))
void bss_init(unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = 0;
}
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern unsigned int __data_section_table;
extern unsigned int __data_section_table_end;
extern unsigned int __bss_section_table;
extern unsigned int __bss_section_table_end;
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void
ResetISR(void) {
// Optionally enable RAM banks that may be off by default at reset
#if !defined (DONT_ENABLE_DISABLED_RAMBANKS)
volatile unsigned int *SYSCON_SYSAHBCLKCTRL = (unsigned int *) 0x40048080;
// Ensure that RAM1(26) and USBSRAM(27) bits in SYSAHBCLKCTRL are set
*SYSCON_SYSAHBCLKCTRL |= (1 << 26) | (1 <<27);
#endif
//
// Copy the data sections from flash to SRAM.
//
unsigned int LoadAddr, ExeAddr, SectionLen;
unsigned int *SectionTableAddr;
// Load base address of Global Section Table
SectionTableAddr = &__data_section_table;
// Copy the data sections from flash to SRAM.
while (SectionTableAddr < &__data_section_table_end) {
LoadAddr = *SectionTableAddr++;
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
data_init(LoadAddr, ExeAddr, SectionLen);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while (SectionTableAddr < &__bss_section_table_end) {
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
bss_init(ExeAddr, SectionLen);
}
// Patch the AEABI integer divide functions to use MCU's romdivide library
#ifdef __USE_ROMDIVIDE
// Get address of Integer division routines function table in ROM
unsigned int *div_ptr = (unsigned int *)((unsigned int *)*(PTR_ROM_DRIVER_TABLE))[4];
// Get addresses of integer divide routines in ROM
// These address are then used by the code in aeabi_romdiv_patch.s
pDivRom_idiv = (unsigned int *)div_ptr[0];
pDivRom_uidiv = (unsigned int *)div_ptr[1];
#endif
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
SystemInit();
#endif
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main() ;
#else
main();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while (1) {
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void NMI_Handler(void)
{ while(1) { }
}
__attribute__ ((section(".after_vectors")))
void HardFault_Handler(void)
{ while(1) { }
}
__attribute__ ((section(".after_vectors")))
void SVC_Handler(void)
{ while(1) { }
}
__attribute__ ((section(".after_vectors")))
void PendSV_Handler(void)
{ while(1) { }
}
__attribute__ ((section(".after_vectors")))
void SysTick_Handler(void)
{ while(1) { }
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void IntDefaultHandler(void)
{ while(1) { }
}

View File

@ -0,0 +1,242 @@
/*
* GENERATED FILE - DO NOT EDIT
* (c) Code Red Technologies Ltd, 2008-2013
* (c) NXP Semiconductors 2013-2019
* Generated linker script file for LPC11U68
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.23
* MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25] on May 14, 2019 4:55:54 PM
*/
MEMORY
{
/* Define each memory region */
MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */
Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */
Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */
}
/* Define a symbol for the top of each memory region */
__base_MFlash256 = 0x0 ; /* MFlash256 */
__base_Flash = 0x0 ; /* Flash */
__top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */
__top_Flash = 0x0 + 0x40000 ; /* 256K bytes */
__base_Ram0_32 = 0x10000000 ; /* Ram0_32 */
__base_RAM = 0x10000000 ; /* RAM */
__top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
__base_Ram1_2 = 0x20000000 ; /* Ram1_2 */
__base_RAM2 = 0x20000000 ; /* RAM2 */
__top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */
__top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */
__base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */
__base_RAM3 = 0x20004000 ; /* RAM3 */
__top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */
__top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
LONG(LOADADDR(.data_RAM3));
LONG( ADDR(.data_RAM3));
LONG( SIZEOF(.data_RAM3));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
LONG( ADDR(.bss_RAM3));
LONG( SIZEOF(.bss_RAM3));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
} > MFlash256
.text : ALIGN(4)
{
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > MFlash256
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlash256
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > MFlash256
__exidx_end = .;
_etext = .;
/* possible MTB section for Ram1_2 */
.mtb_buffer_RAM2 (NOLOAD) :
{
KEEP(*(.mtb.$RAM2*))
KEEP(*(.mtb.$Ram1_2*))
} > Ram1_2
/* DATA section for Ram1_2 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$Ram1_2)
*(.data.$RAM2*)
*(.data.$Ram1_2*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
} > Ram1_2 AT>MFlash256
/* possible MTB section for Ram2USB_2 */
.mtb_buffer_RAM3 (NOLOAD) :
{
KEEP(*(.mtb.$RAM3*))
KEEP(*(.mtb.$Ram2USB_2*))
} > Ram2USB_2
/* DATA section for Ram2USB_2 */
.data_RAM3 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM3 = .) ;
*(.ramfunc.$RAM3)
*(.ramfunc.$Ram2USB_2)
*(.data.$RAM3*)
*(.data.$Ram2USB_2*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM3 = .) ;
} > Ram2USB_2 AT>MFlash256
/* MAIN DATA SECTION */
/* Default MTB section */
.mtb_buffer_default (NOLOAD) :
{
KEEP(*(.mtb*))
} > Ram0_32
.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > Ram0_32
/* Main DATA section (Ram0_32) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
*(vtable)
*(.ramfunc*)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
} > Ram0_32 AT>MFlash256
/* BSS section for Ram1_2 */
.bss_RAM2 : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
*(.bss.$RAM2*)
*(.bss.$Ram1_2*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
} > Ram1_2
/* BSS section for Ram2USB_2 */
.bss_RAM3 : ALIGN(4)
{
PROVIDE(__start_bss_RAM3 = .) ;
*(.bss.$RAM3*)
*(.bss.$Ram2USB_2*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM3 = .) ;
} > Ram2USB_2
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > Ram0_32
/* NOINIT section for Ram1_2 */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
*(.noinit.$RAM2*)
*(.noinit.$Ram1_2*)
. = ALIGN(4) ;
} > Ram1_2
/* NOINIT section for Ram2USB_2 */
.noinit_RAM3 (NOLOAD) : ALIGN(4)
{
*(.noinit.$RAM3*)
*(.noinit.$Ram2USB_2*)
. = ALIGN(4) ;
} > Ram2USB_2
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
} > Ram0_32
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0);
/* ## Create checksum value (used in startup) ## */
PROVIDE(__valid_user_code_checksum = 0 -
(_vStackTop
+ (ResetISR + 1)
+ (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1)
+ (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1)
)
);
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}