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esp32-s2_dfu
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Code Issues Releases Activity

Move interrupt handler into device driver, and rename the OPT_MCU_STM32 constants.

This commit is contained in:
Nathan Conrad 2019-09-10 09:35:52 -04:00
parent 2cf2f35fa3
commit 65e72de7ce
6 changed files with 86 additions and 35 deletions
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2
hw/bsp/stm32f070rbnucleo/board.mk
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@ -6,7 +6,7 @@ CFLAGS += \
-mcpu=cortex-m0 \
-mfloat-abi=soft \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV
-DCFG_TUSB_MCU=OPT_MCU_STM32F0x0
ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver
ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx

6
hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c
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@ -95,12 +95,6 @@ void board_init(void)
__HAL_RCC_USB_CLK_ENABLE();
}
void dcd_fs_irqHandler(void);
void USB_IRQHandler(void)
{
dcd_fs_irqHandler();
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+

2
hw/bsp/stm32f303disco/board.mk
View File

@ -7,7 +7,7 @@ CFLAGS += \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV
-DCFG_TUSB_MCU=OPT_MCU_STM32F3x3
ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F3xx_HAL_Driver
ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F3xx

25
hw/bsp/stm32f303disco/stm32f303disco.c
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@ -109,31 +109,6 @@ void board_init(void)
#endif
}
// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP)
// FIXME: Do all three need to be handled, or just the LP one?
void dcd_fs_irqHandler(void);
// USB high-priority interrupt (Channel 19): Triggered only by a correct
// transfer event for isochronous and double-buffer bulk transfer to reach
// the highest possible transfer rate.
void USB_HP_CAN_TX_IRQHandler(void)
{
dcd_fs_irqHandler();
}
// USB low-priority interrupt (Channel 20): Triggered by all USB events
// (Correct transfer, USB reset, etc.). The firmware has to check the
// interrupt source before serving the interrupt.
void USB_LP_CAN_RX0_IRQHandler(void)
{
dcd_fs_irqHandler();
}
// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB
// Suspend mode.
void USBWakeUp_IRQHandler(void)
{
dcd_fs_irqHandler();
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+

64
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
View File

@ -103,7 +103,18 @@
#include "tusb_option.h"
#if (TUSB_OPT_DEVICE_ENABLED) && ((CFG_TUSB_MCU) == (OPT_MCU_STM32_FSDEV))
#if (TUSB_OPT_DEVICE_ENABLED) && ( \
((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x2)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x1)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x2)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32L4x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L4x3)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x3)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x4)) \
)
// In order to reduce the dependance on HAL, we undefine this.
// Some definitions are copied to our private include file.
@ -778,5 +789,56 @@ static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
}
}
// Interrupt handlers
#if ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \
((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x2))
void USB_IRQHandler(void)
{
dcd_fs_irqHandler();
}
#elif ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3))
void USB_HP_IRQHandler(void)
{
dcd_fs_irqHandler();
}
void USB_LP_IRQHandler(void)
{
dcd_fs_irqHandler();
}
void USBWakeUp_IRQHandler(void)
{
dcd_fs_irqHandler();
}
#elif((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3))
// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP)
// FIXME: Do all three need to be handled, or just the LP one?
// USB high-priority interrupt (Channel 19): Triggered only by a correct
// transfer event for isochronous and double-buffer bulk transfer to reach
// the highest possible transfer rate.
void USB_HP_CAN_TX_IRQHandler(void)
{
dcd_fs_irqHandler();
}
// USB low-priority interrupt (Channel 20): Triggered by all USB events
// (Correct transfer, USB reset, etc.). The firmware has to check the
// interrupt source before serving the interrupt.
void USB_LP_CAN_RX0_IRQHandler(void)
{
dcd_fs_irqHandler();
}
// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB
// Suspend mode.
void USBWakeUp_IRQHandler(void)
{
dcd_fs_irqHandler();
}
#else
#error Which IRQ handler do you need?
#endif
#endif

22
src/tusb_option.h
View File

@ -51,9 +51,29 @@
#define OPT_MCU_SAMD21 200 ///< MicroChip SAMD21
#define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51
// ST Synopsis OTG devices
#define OPT_MCU_STM32F4 300 ///< ST STM32F4
#define OPT_MCU_STM32_FSDEV 301 ///< ST STM32F3
#define OPT_MCU_STM32H7 302 ///< ST STM32H7
// ST FSDEV Devices
#define OPT_MCU_STM32F0x0 330 ///< ST STM32F0x0
#define OPT_MCU_STM32F0x2 331 ///< ST STM32F0x2
#define OPT_MCU_STM32F0x8 332 ///< ST STM32F0x8
#define OPT_MCU_STM32F1x2 333 ///< ST STM32F1x2
#define OPT_MCU_STM32F1x3 334 ///< ST STM32F1x3
#define OPT_MCU_STM32F3x2 335 ///< ST STM32F3x2
#define OPT_MCU_STM32F3x3 336 ///< ST STM32F3x3
#define OPT_MCU_STM32L0x1 337 ///< ST STM32L3x1
#define OPT_MCU_STM32L0x2 338 ///< ST STM32L3x2
#define OPT_MCU_STM32L1x0 339 ///< ST STM32L1x0
#define OPT_MCU_STM32L1x1 340 ///< ST STM32L1x1
#define OPT_MCU_STM32L1x2 341 ///< ST STM32L1x2
#define OPT_MCU_STM32L4x2 342 ///< ST STM32L4x2
#define OPT_MCU_STM32L4x3 343 ///< ST STM32L4x3
#define OPT_MCU_STM32G4x1 344 ///< ST STM32G4x1
#define OPT_MCU_STM32G4x3 345 ///< ST STM32G4x3
#define OPT_MCU_STM32G4x4 346 ///< ST STM32G4x4
/** @} */