update example for PR. correct share_control definition
- rename dcd,hal to dcd_samd51, hal_samd51 since some IDE has issue with duplicated names (e.g keil, ses).
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@ -61,7 +61,7 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
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// Callback invoked when received WRITE10 command.
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// Callback invoked when received WRITE10 command.
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// Process data in buffer to disk's storage and return number of written bytes
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// Process data in buffer to disk's storage and return number of written bytes
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int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize)
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int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize)
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{
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{
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uint32_t addr = lba * CFG_TUD_MSC_BLOCK_SZ + offset;
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uint32_t addr = lba * CFG_TUD_MSC_BLOCK_SZ + offset;
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@ -48,6 +48,8 @@
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control_t control_state;
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control_t control_state;
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CFG_TUSB_ATTR_USBRAM CFG_TUSB_MEM_ALIGN uint8_t _shared_control_buffer[64];
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void controld_reset(uint8_t rhport) {
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void controld_reset(uint8_t rhport) {
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control_state.current_stage = CONTROL_STAGE_SETUP;
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control_state.current_stage = CONTROL_STAGE_SETUP;
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}
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}
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@ -61,7 +61,7 @@ typedef struct {
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uint8_t config;
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uint8_t config;
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} control_t;
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} control_t;
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CFG_TUSB_ATTR_USBRAM CFG_TUSB_MEM_ALIGN uint8_t _shared_control_buffer[64];
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extern uint8_t _shared_control_buffer[64];
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tusb_error_t controld_process_setup_request(uint8_t rhport, tusb_control_request_t const * const p_request);
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tusb_error_t controld_process_setup_request(uint8_t rhport, tusb_control_request_t const * const p_request);
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